18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_cimenu "Platform support" 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/powernv/Kconfig" 58c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/pseries/Kconfig" 68c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/chrp/Kconfig" 78c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/512x/Kconfig" 88c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/52xx/Kconfig" 98c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/powermac/Kconfig" 108c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/maple/Kconfig" 118c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/pasemi/Kconfig" 128c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/ps3/Kconfig" 138c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/cell/Kconfig" 148c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/8xx/Kconfig" 158c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/82xx/Kconfig" 168c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/83xx/Kconfig" 178c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/85xx/Kconfig" 188c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/86xx/Kconfig" 198c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/embedded6xx/Kconfig" 208c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/44x/Kconfig" 218c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/40x/Kconfig" 228c2ecf20Sopenharmony_cisource "arch/powerpc/platforms/amigaone/Kconfig" 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciconfig KVM_GUEST 258c2ecf20Sopenharmony_ci bool "KVM Guest support" 268c2ecf20Sopenharmony_ci select EPAPR_PARAVIRT 278c2ecf20Sopenharmony_ci help 288c2ecf20Sopenharmony_ci This option enables various optimizations for running under the KVM 298c2ecf20Sopenharmony_ci hypervisor. Overhead for the kernel when not running inside KVM should 308c2ecf20Sopenharmony_ci be minimal. 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ci In case of doubt, say Y 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ciconfig EPAPR_PARAVIRT 358c2ecf20Sopenharmony_ci bool "ePAPR para-virtualization support" 368c2ecf20Sopenharmony_ci help 378c2ecf20Sopenharmony_ci Enables ePAPR para-virtualization support for guests. 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci In case of doubt, say Y 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ciconfig PPC_NATIVE 428c2ecf20Sopenharmony_ci bool 438c2ecf20Sopenharmony_ci depends on PPC_BOOK3S_32 || PPC64 448c2ecf20Sopenharmony_ci help 458c2ecf20Sopenharmony_ci Support for running natively on the hardware, i.e. without 468c2ecf20Sopenharmony_ci a hypervisor. This option is not user-selectable but should 478c2ecf20Sopenharmony_ci be selected by all platforms that need it. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ciconfig PPC_OF_BOOT_TRAMPOLINE 508c2ecf20Sopenharmony_ci bool "Support booting from Open Firmware or yaboot" 518c2ecf20Sopenharmony_ci depends on PPC_BOOK3S_32 || PPC64 528c2ecf20Sopenharmony_ci default y 538c2ecf20Sopenharmony_ci help 548c2ecf20Sopenharmony_ci Support from booting from Open Firmware or yaboot using an 558c2ecf20Sopenharmony_ci Open Firmware client interface. This enables the kernel to 568c2ecf20Sopenharmony_ci communicate with open firmware to retrieve system information 578c2ecf20Sopenharmony_ci such as the device tree. 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci In case of doubt, say Y 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ciconfig PPC_DT_CPU_FTRS 628c2ecf20Sopenharmony_ci bool "Device-tree based CPU feature discovery & setup" 638c2ecf20Sopenharmony_ci depends on PPC_BOOK3S_64 648c2ecf20Sopenharmony_ci default y 658c2ecf20Sopenharmony_ci help 668c2ecf20Sopenharmony_ci This enables code to use a new device tree binding for describing CPU 678c2ecf20Sopenharmony_ci compatibility and features. Saying Y here will attempt to use the new 688c2ecf20Sopenharmony_ci binding if the firmware provides it. Currently only the skiboot 698c2ecf20Sopenharmony_ci firmware provides this binding. 708c2ecf20Sopenharmony_ci If you're not sure say Y. 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ciconfig UDBG_RTAS_CONSOLE 738c2ecf20Sopenharmony_ci bool "RTAS based debug console" 748c2ecf20Sopenharmony_ci depends on PPC_RTAS 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ciconfig PPC_SMP_MUXED_IPI 778c2ecf20Sopenharmony_ci bool 788c2ecf20Sopenharmony_ci help 798c2ecf20Sopenharmony_ci Select this option if your platform supports SMP and your 808c2ecf20Sopenharmony_ci interrupt controller provides less than 4 interrupts to each 818c2ecf20Sopenharmony_ci cpu. This will enable the generic code to multiplex the 4 828c2ecf20Sopenharmony_ci messages on to one ipi. 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_ciconfig IPIC 858c2ecf20Sopenharmony_ci bool 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ciconfig MPIC 888c2ecf20Sopenharmony_ci bool 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ciconfig MPIC_TIMER 918c2ecf20Sopenharmony_ci bool "MPIC Global Timer" 928c2ecf20Sopenharmony_ci depends on MPIC && FSL_SOC 938c2ecf20Sopenharmony_ci help 948c2ecf20Sopenharmony_ci The MPIC global timer is a hardware timer inside the 958c2ecf20Sopenharmony_ci Freescale PIC complying with OpenPIC standard. When the 968c2ecf20Sopenharmony_ci specified interval times out, the hardware timer generates 978c2ecf20Sopenharmony_ci an interrupt. The driver currently is only tested on fsl 988c2ecf20Sopenharmony_ci chip, but it can potentially support other global timers 998c2ecf20Sopenharmony_ci complying with the OpenPIC standard. 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ciconfig FSL_MPIC_TIMER_WAKEUP 1028c2ecf20Sopenharmony_ci tristate "Freescale MPIC global timer wakeup driver" 1038c2ecf20Sopenharmony_ci depends on FSL_SOC && MPIC_TIMER && PM 1048c2ecf20Sopenharmony_ci help 1058c2ecf20Sopenharmony_ci The driver provides a way to wake up the system by MPIC 1068c2ecf20Sopenharmony_ci timer. 1078c2ecf20Sopenharmony_ci e.g. "echo 5 > /sys/devices/system/mpic/timer_wakeup" 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ciconfig PPC_EPAPR_HV_PIC 1108c2ecf20Sopenharmony_ci bool 1118c2ecf20Sopenharmony_ci select EPAPR_PARAVIRT 1128c2ecf20Sopenharmony_ci 1138c2ecf20Sopenharmony_ciconfig MPIC_WEIRD 1148c2ecf20Sopenharmony_ci bool 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_ciconfig MPIC_MSGR 1178c2ecf20Sopenharmony_ci bool "MPIC message register support" 1188c2ecf20Sopenharmony_ci depends on MPIC 1198c2ecf20Sopenharmony_ci help 1208c2ecf20Sopenharmony_ci Enables support for the MPIC message registers. These 1218c2ecf20Sopenharmony_ci registers are used for inter-processor communication. 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ciconfig PPC_I8259 1248c2ecf20Sopenharmony_ci bool 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ciconfig U3_DART 1278c2ecf20Sopenharmony_ci bool 1288c2ecf20Sopenharmony_ci depends on PPC64 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ciconfig PPC_RTAS 1318c2ecf20Sopenharmony_ci bool 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciconfig RTAS_ERROR_LOGGING 1348c2ecf20Sopenharmony_ci bool 1358c2ecf20Sopenharmony_ci depends on PPC_RTAS 1368c2ecf20Sopenharmony_ci 1378c2ecf20Sopenharmony_ciconfig PPC_RTAS_DAEMON 1388c2ecf20Sopenharmony_ci bool 1398c2ecf20Sopenharmony_ci depends on PPC_RTAS 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ciconfig RTAS_PROC 1428c2ecf20Sopenharmony_ci bool "Proc interface to RTAS" 1438c2ecf20Sopenharmony_ci depends on PPC_RTAS && PROC_FS 1448c2ecf20Sopenharmony_ci default y 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ciconfig RTAS_FLASH 1478c2ecf20Sopenharmony_ci tristate "Firmware flash interface" 1488c2ecf20Sopenharmony_ci depends on PPC64 && RTAS_PROC 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ciconfig MMIO_NVRAM 1518c2ecf20Sopenharmony_ci bool 1528c2ecf20Sopenharmony_ci 1538c2ecf20Sopenharmony_ciconfig MPIC_U3_HT_IRQS 1548c2ecf20Sopenharmony_ci bool 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ciconfig MPIC_BROKEN_REGREAD 1578c2ecf20Sopenharmony_ci bool 1588c2ecf20Sopenharmony_ci depends on MPIC 1598c2ecf20Sopenharmony_ci help 1608c2ecf20Sopenharmony_ci This option enables a MPIC driver workaround for some chips 1618c2ecf20Sopenharmony_ci that have a bug that causes some interrupt source information 1628c2ecf20Sopenharmony_ci to not read back properly. It is safe to use on other chips as 1638c2ecf20Sopenharmony_ci well, but enabling it uses about 8KB of memory to keep copies 1648c2ecf20Sopenharmony_ci of the register contents in software. 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ciconfig EEH 1678c2ecf20Sopenharmony_ci bool 1688c2ecf20Sopenharmony_ci depends on (PPC_POWERNV || PPC_PSERIES) && PCI 1698c2ecf20Sopenharmony_ci default y 1708c2ecf20Sopenharmony_ci 1718c2ecf20Sopenharmony_ciconfig PPC_MPC106 1728c2ecf20Sopenharmony_ci bool 1738c2ecf20Sopenharmony_ci 1748c2ecf20Sopenharmony_ciconfig PPC_970_NAP 1758c2ecf20Sopenharmony_ci bool 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ciconfig PPC_P7_NAP 1788c2ecf20Sopenharmony_ci bool 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_ciconfig PPC_BOOK3S_IDLE 1818c2ecf20Sopenharmony_ci def_bool y 1828c2ecf20Sopenharmony_ci depends on (PPC_970_NAP || PPC_P7_NAP) 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ciconfig PPC_INDIRECT_PIO 1858c2ecf20Sopenharmony_ci bool 1868c2ecf20Sopenharmony_ci select GENERIC_IOMAP 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ciconfig PPC_INDIRECT_MMIO 1898c2ecf20Sopenharmony_ci bool 1908c2ecf20Sopenharmony_ci 1918c2ecf20Sopenharmony_ciconfig PPC_IO_WORKAROUNDS 1928c2ecf20Sopenharmony_ci bool 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_cisource "drivers/cpufreq/Kconfig" 1958c2ecf20Sopenharmony_ci 1968c2ecf20Sopenharmony_cimenu "CPUIdle driver" 1978c2ecf20Sopenharmony_ci 1988c2ecf20Sopenharmony_cisource "drivers/cpuidle/Kconfig" 1998c2ecf20Sopenharmony_ci 2008c2ecf20Sopenharmony_ciendmenu 2018c2ecf20Sopenharmony_ci 2028c2ecf20Sopenharmony_ciconfig TAU 2038c2ecf20Sopenharmony_ci bool "On-chip CPU temperature sensor support" 2048c2ecf20Sopenharmony_ci depends on PPC_BOOK3S_32 2058c2ecf20Sopenharmony_ci help 2068c2ecf20Sopenharmony_ci G3 and G4 processors have an on-chip temperature sensor called the 2078c2ecf20Sopenharmony_ci 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 2088c2ecf20Sopenharmony_ci temperature within 2-4 degrees Celsius. This option shows the current 2098c2ecf20Sopenharmony_ci on-die temperature in /proc/cpuinfo if the cpu supports it. 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci Unfortunately, this sensor is very inaccurate when uncalibrated, so 2128c2ecf20Sopenharmony_ci don't assume the cpu temp is actually what /proc/cpuinfo says it is. 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ciconfig TAU_INT 2158c2ecf20Sopenharmony_ci bool "Interrupt driven TAU driver (EXPERIMENTAL)" 2168c2ecf20Sopenharmony_ci depends on TAU 2178c2ecf20Sopenharmony_ci help 2188c2ecf20Sopenharmony_ci The TAU supports an interrupt driven mode which causes an interrupt 2198c2ecf20Sopenharmony_ci whenever the temperature goes out of range. This is the fastest way 2208c2ecf20Sopenharmony_ci to get notified the temp has exceeded a range. With this option off, 2218c2ecf20Sopenharmony_ci a timer is used to re-check the temperature periodically. 2228c2ecf20Sopenharmony_ci 2238c2ecf20Sopenharmony_ci If in doubt, say N here. 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ciconfig TAU_AVERAGE 2268c2ecf20Sopenharmony_ci bool "Average high and low temp" 2278c2ecf20Sopenharmony_ci depends on TAU 2288c2ecf20Sopenharmony_ci help 2298c2ecf20Sopenharmony_ci The TAU hardware can compare the temperature to an upper and lower 2308c2ecf20Sopenharmony_ci bound. The default behavior is to show both the upper and lower 2318c2ecf20Sopenharmony_ci bound in /proc/cpuinfo. If the range is large, the temperature is 2328c2ecf20Sopenharmony_ci either changing a lot, or the TAU hardware is broken (likely on some 2338c2ecf20Sopenharmony_ci G4's). If the range is small (around 4 degrees), the temperature is 2348c2ecf20Sopenharmony_ci relatively stable. If you say Y here, a single temperature value, 2358c2ecf20Sopenharmony_ci halfway between the upper and lower bounds, will be reported in 2368c2ecf20Sopenharmony_ci /proc/cpuinfo. 2378c2ecf20Sopenharmony_ci 2388c2ecf20Sopenharmony_ci If in doubt, say N here. 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_ciconfig QE_GPIO 2418c2ecf20Sopenharmony_ci bool "QE GPIO support" 2428c2ecf20Sopenharmony_ci depends on QUICC_ENGINE 2438c2ecf20Sopenharmony_ci select GPIOLIB 2448c2ecf20Sopenharmony_ci help 2458c2ecf20Sopenharmony_ci Say Y here if you're going to use hardware that connects to the 2468c2ecf20Sopenharmony_ci QE GPIOs. 2478c2ecf20Sopenharmony_ci 2488c2ecf20Sopenharmony_ciconfig CPM2 2498c2ecf20Sopenharmony_ci bool "Enable support for the CPM2 (Communications Processor Module)" 2508c2ecf20Sopenharmony_ci depends on (FSL_SOC_BOOKE && PPC32) || 8260 2518c2ecf20Sopenharmony_ci select CPM 2528c2ecf20Sopenharmony_ci select HAVE_PCI 2538c2ecf20Sopenharmony_ci select GPIOLIB 2548c2ecf20Sopenharmony_ci help 2558c2ecf20Sopenharmony_ci The CPM2 (Communications Processor Module) is a coprocessor on 2568c2ecf20Sopenharmony_ci embedded CPUs made by Freescale. Selecting this option means that 2578c2ecf20Sopenharmony_ci you wish to build a kernel for a machine with a CPM2 coprocessor 2588c2ecf20Sopenharmony_ci on it (826x, 827x, 8560). 2598c2ecf20Sopenharmony_ci 2608c2ecf20Sopenharmony_ciconfig FSL_ULI1575 2618c2ecf20Sopenharmony_ci bool 2628c2ecf20Sopenharmony_ci select GENERIC_ISA_DMA 2638c2ecf20Sopenharmony_ci help 2648c2ecf20Sopenharmony_ci Supports for the ULI1575 PCIe south bridge that exists on some 2658c2ecf20Sopenharmony_ci Freescale reference boards. The boards all use the ULI in pretty 2668c2ecf20Sopenharmony_ci much the same way. 2678c2ecf20Sopenharmony_ci 2688c2ecf20Sopenharmony_ciconfig CPM 2698c2ecf20Sopenharmony_ci bool 2708c2ecf20Sopenharmony_ci select GENERIC_ALLOCATOR 2718c2ecf20Sopenharmony_ci 2728c2ecf20Sopenharmony_ciconfig OF_RTC 2738c2ecf20Sopenharmony_ci bool 2748c2ecf20Sopenharmony_ci help 2758c2ecf20Sopenharmony_ci Uses information from the OF or flattened device tree to instantiate 2768c2ecf20Sopenharmony_ci platform devices for direct mapped RTC chips like the DS1742 or DS1743. 2778c2ecf20Sopenharmony_ci 2788c2ecf20Sopenharmony_ciconfig GEN_RTC 2798c2ecf20Sopenharmony_ci bool "Use the platform RTC operations from user space" 2808c2ecf20Sopenharmony_ci select RTC_CLASS 2818c2ecf20Sopenharmony_ci select RTC_DRV_GENERIC 2828c2ecf20Sopenharmony_ci help 2838c2ecf20Sopenharmony_ci This option provides backwards compatibility with the old gen_rtc.ko 2848c2ecf20Sopenharmony_ci module that was traditionally used for old PowerPC machines. 2858c2ecf20Sopenharmony_ci Platforms should migrate to enabling the RTC_DRV_GENERIC by hand 2868c2ecf20Sopenharmony_ci replacing their get_rtc_time/set_rtc_time callbacks with 2878c2ecf20Sopenharmony_ci a proper RTC device driver. 2888c2ecf20Sopenharmony_ci 2898c2ecf20Sopenharmony_ciconfig MCU_MPC8349EMITX 2908c2ecf20Sopenharmony_ci bool "MPC8349E-mITX MCU driver" 2918c2ecf20Sopenharmony_ci depends on I2C=y && PPC_83xx 2928c2ecf20Sopenharmony_ci select GPIOLIB 2938c2ecf20Sopenharmony_ci help 2948c2ecf20Sopenharmony_ci Say Y here to enable soft power-off functionality on the Freescale 2958c2ecf20Sopenharmony_ci boards with the MPC8349E-mITX-compatible MCU chips. This driver will 2968c2ecf20Sopenharmony_ci also register MCU GPIOs with the generic GPIO API, so you'll able 2978c2ecf20Sopenharmony_ci to use MCU pins as GPIOs. 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_ciendmenu 300