18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ciconfig CPM1 38c2ecf20Sopenharmony_ci bool 48c2ecf20Sopenharmony_ci select CPM 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_cichoice 78c2ecf20Sopenharmony_ci prompt "8xx Machine Type" 88c2ecf20Sopenharmony_ci depends on PPC_8xx 98c2ecf20Sopenharmony_ci default MPC885ADS 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ciconfig MPC8XXFADS 128c2ecf20Sopenharmony_ci bool "FADS" 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ciconfig MPC86XADS 158c2ecf20Sopenharmony_ci bool "MPC86XADS" 168c2ecf20Sopenharmony_ci select CPM1 178c2ecf20Sopenharmony_ci help 188c2ecf20Sopenharmony_ci MPC86x Application Development System by Freescale Semiconductor. 198c2ecf20Sopenharmony_ci The MPC86xADS is meant to serve as a platform for s/w and h/w 208c2ecf20Sopenharmony_ci development around the MPC86X processor families. 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ciconfig MPC885ADS 238c2ecf20Sopenharmony_ci bool "MPC885ADS" 248c2ecf20Sopenharmony_ci select CPM1 258c2ecf20Sopenharmony_ci select OF_DYNAMIC 268c2ecf20Sopenharmony_ci help 278c2ecf20Sopenharmony_ci Freescale Semiconductor MPC885 Application Development System (ADS). 288c2ecf20Sopenharmony_ci Also known as DUET. 298c2ecf20Sopenharmony_ci The MPC885ADS is meant to serve as a platform for s/w and h/w 308c2ecf20Sopenharmony_ci development around the MPC885 processor family. 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_ciconfig PPC_EP88XC 338c2ecf20Sopenharmony_ci bool "Embedded Planet EP88xC (a.k.a. CWH-PPC-885XN-VE)" 348c2ecf20Sopenharmony_ci select CPM1 358c2ecf20Sopenharmony_ci help 368c2ecf20Sopenharmony_ci This enables support for the Embedded Planet EP88xC board. 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci This board is also resold by Freescale as the QUICCStart 398c2ecf20Sopenharmony_ci MPC885 Evaluation System and/or the CWH-PPC-885XN-VE. 408c2ecf20Sopenharmony_ci 418c2ecf20Sopenharmony_ciconfig PPC_ADDER875 428c2ecf20Sopenharmony_ci bool "Analogue & Micro Adder 875" 438c2ecf20Sopenharmony_ci select CPM1 448c2ecf20Sopenharmony_ci help 458c2ecf20Sopenharmony_ci This enables support for the Analogue & Micro Adder 875 468c2ecf20Sopenharmony_ci board. 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ciconfig TQM8XX 498c2ecf20Sopenharmony_ci bool "TQM8XX" 508c2ecf20Sopenharmony_ci select CPM1 518c2ecf20Sopenharmony_ci help 528c2ecf20Sopenharmony_ci support for the mpc8xx based boards from TQM. 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ciendchoice 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_cimenu "Freescale Ethernet driver platform-specific options" 578c2ecf20Sopenharmony_ci depends on (FS_ENET && MPC885ADS) 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci config MPC8xx_SECOND_ETH 608c2ecf20Sopenharmony_ci bool "Second Ethernet channel" 618c2ecf20Sopenharmony_ci depends on MPC885ADS 628c2ecf20Sopenharmony_ci default y 638c2ecf20Sopenharmony_ci help 648c2ecf20Sopenharmony_ci This enables support for second Ethernet on MPC885ADS and MPC86xADS boards. 658c2ecf20Sopenharmony_ci The latter will use SCC1, for 885ADS you can select it below. 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci choice 688c2ecf20Sopenharmony_ci prompt "Second Ethernet channel" 698c2ecf20Sopenharmony_ci depends on MPC8xx_SECOND_ETH 708c2ecf20Sopenharmony_ci default MPC8xx_SECOND_ETH_FEC2 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci config MPC8xx_SECOND_ETH_FEC2 738c2ecf20Sopenharmony_ci bool "FEC2" 748c2ecf20Sopenharmony_ci depends on MPC885ADS 758c2ecf20Sopenharmony_ci help 768c2ecf20Sopenharmony_ci Enable FEC2 to serve as 2-nd Ethernet channel. Note that SMC2 778c2ecf20Sopenharmony_ci (often 2-nd UART) will not work if this is enabled. 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci config MPC8xx_SECOND_ETH_SCC3 808c2ecf20Sopenharmony_ci bool "SCC3" 818c2ecf20Sopenharmony_ci depends on MPC885ADS 828c2ecf20Sopenharmony_ci help 838c2ecf20Sopenharmony_ci Enable SCC3 to serve as 2-nd Ethernet channel. Note that SMC1 848c2ecf20Sopenharmony_ci (often 1-nd UART) will not work if this is enabled. 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci endchoice 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ciendmenu 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci# 918c2ecf20Sopenharmony_ci# MPC8xx Communication options 928c2ecf20Sopenharmony_ci# 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_cimenu "MPC8xx CPM Options" 958c2ecf20Sopenharmony_ci depends on PPC_8xx 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci# This doesn't really belong here, but it is convenient to ask 988c2ecf20Sopenharmony_ci# 8xx specific questions. 998c2ecf20Sopenharmony_cicomment "Generic MPC8xx Options" 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ciconfig 8xx_GPIO 1028c2ecf20Sopenharmony_ci bool "GPIO API Support" 1038c2ecf20Sopenharmony_ci select GPIOLIB 1048c2ecf20Sopenharmony_ci help 1058c2ecf20Sopenharmony_ci Saying Y here will cause the ports on an MPC8xx processor to be used 1068c2ecf20Sopenharmony_ci with the GPIO API. If you say N here, the kernel needs less memory. 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci If in doubt, say Y here. 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ciconfig 8xx_CPU15 1118c2ecf20Sopenharmony_ci bool "CPU15 Silicon Errata" 1128c2ecf20Sopenharmony_ci depends on !HUGETLB_PAGE 1138c2ecf20Sopenharmony_ci default y 1148c2ecf20Sopenharmony_ci help 1158c2ecf20Sopenharmony_ci This enables a workaround for erratum CPU15 on MPC8xx chips. 1168c2ecf20Sopenharmony_ci This bug can cause incorrect code execution under certain 1178c2ecf20Sopenharmony_ci circumstances. This workaround adds some overhead (a TLB miss 1188c2ecf20Sopenharmony_ci every time execution crosses a page boundary), and you may wish 1198c2ecf20Sopenharmony_ci to disable it if you have worked around the bug in the compiler 1208c2ecf20Sopenharmony_ci (by not placing conditional branches or branches to LR or CTR 1218c2ecf20Sopenharmony_ci in the last word of a page, with a target of the last cache 1228c2ecf20Sopenharmony_ci line in the next page), or if you have used some other 1238c2ecf20Sopenharmony_ci workaround. 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ci If in doubt, say Y here. 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_cichoice 1288c2ecf20Sopenharmony_ci prompt "Microcode patch selection" 1298c2ecf20Sopenharmony_ci default NO_UCODE_PATCH 1308c2ecf20Sopenharmony_ci help 1318c2ecf20Sopenharmony_ci Help not implemented yet, coming soon. 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciconfig NO_UCODE_PATCH 1348c2ecf20Sopenharmony_ci bool "None" 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ciconfig USB_SOF_UCODE_PATCH 1378c2ecf20Sopenharmony_ci bool "USB SOF patch" 1388c2ecf20Sopenharmony_ci help 1398c2ecf20Sopenharmony_ci Help not implemented yet, coming soon. 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ciconfig I2C_SPI_UCODE_PATCH 1428c2ecf20Sopenharmony_ci bool "I2C/SPI relocation patch" 1438c2ecf20Sopenharmony_ci help 1448c2ecf20Sopenharmony_ci Help not implemented yet, coming soon. 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ciconfig I2C_SPI_SMC1_UCODE_PATCH 1478c2ecf20Sopenharmony_ci bool "I2C/SPI/SMC1 relocation patch" 1488c2ecf20Sopenharmony_ci help 1498c2ecf20Sopenharmony_ci Help not implemented yet, coming soon. 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ciconfig SMC_UCODE_PATCH 1528c2ecf20Sopenharmony_ci bool "SMC relocation patch" 1538c2ecf20Sopenharmony_ci help 1548c2ecf20Sopenharmony_ci This microcode relocates SMC1 and SMC2 parameter RAMs at 1558c2ecf20Sopenharmony_ci offset 0x1ec0 and 0x1fc0 to allow extended parameter RAM 1568c2ecf20Sopenharmony_ci for SCC3 and SCC4. 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ciendchoice 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ciconfig UCODE_PATCH 1618c2ecf20Sopenharmony_ci bool 1628c2ecf20Sopenharmony_ci default y 1638c2ecf20Sopenharmony_ci depends on !NO_UCODE_PATCH 1648c2ecf20Sopenharmony_ci 1658c2ecf20Sopenharmony_cimenu "8xx advanced setup" 1668c2ecf20Sopenharmony_ci depends on PPC_8xx 1678c2ecf20Sopenharmony_ci 1688c2ecf20Sopenharmony_ciconfig PIN_TLB 1698c2ecf20Sopenharmony_ci bool "Pinned Kernel TLBs" 1708c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS 1718c2ecf20Sopenharmony_ci help 1728c2ecf20Sopenharmony_ci On the 8xx, we have 32 instruction TLBs and 32 data TLBs. In each 1738c2ecf20Sopenharmony_ci table 4 TLBs can be pinned. 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_ci It reduces the amount of usable TLBs to 28 (ie by 12%). That's the 1768c2ecf20Sopenharmony_ci reason why we make it selectable. 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ci This option does nothing, it just activate the selection of what 1798c2ecf20Sopenharmony_ci to pin. 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_ciconfig PIN_TLB_DATA 1828c2ecf20Sopenharmony_ci bool "Pinned TLB for DATA" 1838c2ecf20Sopenharmony_ci depends on PIN_TLB 1848c2ecf20Sopenharmony_ci default y 1858c2ecf20Sopenharmony_ci help 1868c2ecf20Sopenharmony_ci This pins the first 32 Mbytes of memory with 8M pages. 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ciconfig PIN_TLB_IMMR 1898c2ecf20Sopenharmony_ci bool "Pinned TLB for IMMR" 1908c2ecf20Sopenharmony_ci depends on PIN_TLB 1918c2ecf20Sopenharmony_ci default y 1928c2ecf20Sopenharmony_ci help 1938c2ecf20Sopenharmony_ci This pins the IMMR area with a 512kbytes page. In case 1948c2ecf20Sopenharmony_ci CONFIG_PIN_TLB_DATA is also selected, it will reduce 1958c2ecf20Sopenharmony_ci CONFIG_PIN_TLB_DATA to 24 Mbytes. 1968c2ecf20Sopenharmony_ci 1978c2ecf20Sopenharmony_ciconfig PIN_TLB_TEXT 1988c2ecf20Sopenharmony_ci bool "Pinned TLB for TEXT" 1998c2ecf20Sopenharmony_ci depends on PIN_TLB 2008c2ecf20Sopenharmony_ci default y 2018c2ecf20Sopenharmony_ci help 2028c2ecf20Sopenharmony_ci This pins kernel text with 8M pages. 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ciendmenu 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ciendmenu 207