18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Paravirt target for a generic QEMU e500 machine
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * This is intended to be a flexible device-tree-driven platform, not fixed
68c2ecf20Sopenharmony_ci * to a particular piece of hardware or a particular spec of virtual hardware,
78c2ecf20Sopenharmony_ci * beyond the assumption of an e500-family CPU.  Some things are still hardcoded
88c2ecf20Sopenharmony_ci * here, such as MPIC, but this is a limitation of the current code rather than
98c2ecf20Sopenharmony_ci * an interface contract with QEMU.
108c2ecf20Sopenharmony_ci *
118c2ecf20Sopenharmony_ci * Copyright 2012 Freescale Semiconductor Inc.
128c2ecf20Sopenharmony_ci */
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#include <linux/kernel.h>
158c2ecf20Sopenharmony_ci#include <linux/of_fdt.h>
168c2ecf20Sopenharmony_ci#include <linux/pgtable.h>
178c2ecf20Sopenharmony_ci#include <asm/machdep.h>
188c2ecf20Sopenharmony_ci#include <asm/time.h>
198c2ecf20Sopenharmony_ci#include <asm/udbg.h>
208c2ecf20Sopenharmony_ci#include <asm/mpic.h>
218c2ecf20Sopenharmony_ci#include <asm/swiotlb.h>
228c2ecf20Sopenharmony_ci#include <sysdev/fsl_soc.h>
238c2ecf20Sopenharmony_ci#include <sysdev/fsl_pci.h>
248c2ecf20Sopenharmony_ci#include "smp.h"
258c2ecf20Sopenharmony_ci#include "mpc85xx.h"
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_civoid __init qemu_e500_pic_init(void)
288c2ecf20Sopenharmony_ci{
298c2ecf20Sopenharmony_ci	struct mpic *mpic;
308c2ecf20Sopenharmony_ci	unsigned int flags = MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU |
318c2ecf20Sopenharmony_ci		MPIC_ENABLE_COREINT;
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci	mpic = mpic_alloc(NULL, 0, flags, 0, 256, " OpenPIC  ");
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci	BUG_ON(mpic == NULL);
368c2ecf20Sopenharmony_ci	mpic_init(mpic);
378c2ecf20Sopenharmony_ci}
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic void __init qemu_e500_setup_arch(void)
408c2ecf20Sopenharmony_ci{
418c2ecf20Sopenharmony_ci	ppc_md.progress("qemu_e500_setup_arch()", 0);
428c2ecf20Sopenharmony_ci
438c2ecf20Sopenharmony_ci	fsl_pci_assign_primary();
448c2ecf20Sopenharmony_ci	swiotlb_detect_4g();
458c2ecf20Sopenharmony_ci	mpc85xx_smp_init();
468c2ecf20Sopenharmony_ci}
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_ci/*
498c2ecf20Sopenharmony_ci * Called very early, device-tree isn't unflattened
508c2ecf20Sopenharmony_ci */
518c2ecf20Sopenharmony_cistatic int __init qemu_e500_probe(void)
528c2ecf20Sopenharmony_ci{
538c2ecf20Sopenharmony_ci	return !!of_machine_is_compatible("fsl,qemu-e500");
548c2ecf20Sopenharmony_ci}
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_cimachine_arch_initcall(qemu_e500, mpc85xx_common_publish_devices);
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_cidefine_machine(qemu_e500) {
598c2ecf20Sopenharmony_ci	.name			= "QEMU e500",
608c2ecf20Sopenharmony_ci	.probe			= qemu_e500_probe,
618c2ecf20Sopenharmony_ci	.setup_arch		= qemu_e500_setup_arch,
628c2ecf20Sopenharmony_ci	.init_IRQ		= qemu_e500_pic_init,
638c2ecf20Sopenharmony_ci#ifdef CONFIG_PCI
648c2ecf20Sopenharmony_ci	.pcibios_fixup_bus	= fsl_pcibios_fixup_bus,
658c2ecf20Sopenharmony_ci	.pcibios_fixup_phb      = fsl_pcibios_fixup_phb,
668c2ecf20Sopenharmony_ci#endif
678c2ecf20Sopenharmony_ci	.get_irq		= mpic_get_coreint_irq,
688c2ecf20Sopenharmony_ci	.calibrate_decr		= generic_calibrate_decr,
698c2ecf20Sopenharmony_ci	.progress		= udbg_progress,
708c2ecf20Sopenharmony_ci};
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