18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * PowerPC 476FPE board specific routines 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright © 2013 Tony Breeds IBM Corporation 68c2ecf20Sopenharmony_ci * Copyright © 2013 Alistair Popple IBM Corporation 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Based on earlier code: 98c2ecf20Sopenharmony_ci * Matt Porter <mporter@kernel.crashing.org> 108c2ecf20Sopenharmony_ci * Copyright 2002-2005 MontaVista Software Inc. 118c2ecf20Sopenharmony_ci * 128c2ecf20Sopenharmony_ci * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net> 138c2ecf20Sopenharmony_ci * Copyright (c) 2003-2005 Zultys Technologies 148c2ecf20Sopenharmony_ci * 158c2ecf20Sopenharmony_ci * Rewritten and ported to the merged powerpc tree: 168c2ecf20Sopenharmony_ci * Copyright 2007 David Gibson <dwg@au1.ibm.com>, IBM Corporation. 178c2ecf20Sopenharmony_ci * Copyright © 2011 David Kliekamp IBM Corporation 188c2ecf20Sopenharmony_ci */ 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#include <linux/init.h> 218c2ecf20Sopenharmony_ci#include <linux/of.h> 228c2ecf20Sopenharmony_ci#include <linux/of_platform.h> 238c2ecf20Sopenharmony_ci#include <linux/rtc.h> 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#include <asm/machdep.h> 268c2ecf20Sopenharmony_ci#include <asm/prom.h> 278c2ecf20Sopenharmony_ci#include <asm/udbg.h> 288c2ecf20Sopenharmony_ci#include <asm/time.h> 298c2ecf20Sopenharmony_ci#include <asm/uic.h> 308c2ecf20Sopenharmony_ci#include <asm/ppc4xx.h> 318c2ecf20Sopenharmony_ci#include <asm/mpic.h> 328c2ecf20Sopenharmony_ci#include <asm/mmu.h> 338c2ecf20Sopenharmony_ci#include <asm/swiotlb.h> 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#include <linux/pci.h> 368c2ecf20Sopenharmony_ci#include <linux/i2c.h> 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_cistatic const struct of_device_id ppc47x_of_bus[] __initconst = { 398c2ecf20Sopenharmony_ci { .compatible = "ibm,plb4", }, 408c2ecf20Sopenharmony_ci { .compatible = "ibm,plb6", }, 418c2ecf20Sopenharmony_ci { .compatible = "ibm,opb", }, 428c2ecf20Sopenharmony_ci { .compatible = "ibm,ebc", }, 438c2ecf20Sopenharmony_ci {}, 448c2ecf20Sopenharmony_ci}; 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci/* The EEPROM is missing and the default values are bogus. This forces USB in 478c2ecf20Sopenharmony_ci * to EHCI mode */ 488c2ecf20Sopenharmony_cistatic void quirk_ppc_currituck_usb_fixup(struct pci_dev *dev) 498c2ecf20Sopenharmony_ci{ 508c2ecf20Sopenharmony_ci if (of_machine_is_compatible("ibm,currituck")) { 518c2ecf20Sopenharmony_ci pci_write_config_dword(dev, 0xe0, 0x0114231f); 528c2ecf20Sopenharmony_ci pci_write_config_dword(dev, 0xe4, 0x00006c40); 538c2ecf20Sopenharmony_ci } 548c2ecf20Sopenharmony_ci} 558c2ecf20Sopenharmony_ciDECLARE_PCI_FIXUP_HEADER(0x1033, 0x0035, quirk_ppc_currituck_usb_fixup); 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci/* Akebono has an AVR microcontroller attached to the I2C bus 588c2ecf20Sopenharmony_ci * which is used to power off/reset the system. */ 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci/* AVR I2C Commands */ 618c2ecf20Sopenharmony_ci#define AVR_PWRCTL_CMD (0x26) 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* Flags for the power control I2C commands */ 648c2ecf20Sopenharmony_ci#define AVR_PWRCTL_PWROFF (0x01) 658c2ecf20Sopenharmony_ci#define AVR_PWRCTL_RESET (0x02) 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_cistatic struct i2c_client *avr_i2c_client; 688c2ecf20Sopenharmony_cistatic void __noreturn avr_halt_system(int pwrctl_flags) 698c2ecf20Sopenharmony_ci{ 708c2ecf20Sopenharmony_ci /* Request the AVR to reset the system */ 718c2ecf20Sopenharmony_ci i2c_smbus_write_byte_data(avr_i2c_client, 728c2ecf20Sopenharmony_ci AVR_PWRCTL_CMD, pwrctl_flags); 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ci /* Wait for system to be reset */ 758c2ecf20Sopenharmony_ci while (1) 768c2ecf20Sopenharmony_ci ; 778c2ecf20Sopenharmony_ci} 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_cistatic void avr_power_off_system(void) 808c2ecf20Sopenharmony_ci{ 818c2ecf20Sopenharmony_ci avr_halt_system(AVR_PWRCTL_PWROFF); 828c2ecf20Sopenharmony_ci} 838c2ecf20Sopenharmony_ci 848c2ecf20Sopenharmony_cistatic void __noreturn avr_reset_system(char *cmd) 858c2ecf20Sopenharmony_ci{ 868c2ecf20Sopenharmony_ci avr_halt_system(AVR_PWRCTL_RESET); 878c2ecf20Sopenharmony_ci} 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_cistatic int avr_probe(struct i2c_client *client) 908c2ecf20Sopenharmony_ci{ 918c2ecf20Sopenharmony_ci avr_i2c_client = client; 928c2ecf20Sopenharmony_ci ppc_md.restart = avr_reset_system; 938c2ecf20Sopenharmony_ci pm_power_off = avr_power_off_system; 948c2ecf20Sopenharmony_ci return 0; 958c2ecf20Sopenharmony_ci} 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_cistatic const struct i2c_device_id avr_id[] = { 988c2ecf20Sopenharmony_ci { "akebono-avr", 0 }, 998c2ecf20Sopenharmony_ci { } 1008c2ecf20Sopenharmony_ci}; 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_cistatic struct i2c_driver avr_driver = { 1038c2ecf20Sopenharmony_ci .driver = { 1048c2ecf20Sopenharmony_ci .name = "akebono-avr", 1058c2ecf20Sopenharmony_ci }, 1068c2ecf20Sopenharmony_ci .probe_new = avr_probe, 1078c2ecf20Sopenharmony_ci .id_table = avr_id, 1088c2ecf20Sopenharmony_ci}; 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_cistatic int __init ppc47x_device_probe(void) 1118c2ecf20Sopenharmony_ci{ 1128c2ecf20Sopenharmony_ci i2c_add_driver(&avr_driver); 1138c2ecf20Sopenharmony_ci of_platform_bus_probe(NULL, ppc47x_of_bus, NULL); 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci return 0; 1168c2ecf20Sopenharmony_ci} 1178c2ecf20Sopenharmony_cimachine_device_initcall(ppc47x, ppc47x_device_probe); 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_cistatic void __init ppc47x_init_irq(void) 1208c2ecf20Sopenharmony_ci{ 1218c2ecf20Sopenharmony_ci struct device_node *np; 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci /* Find top level interrupt controller */ 1248c2ecf20Sopenharmony_ci for_each_node_with_property(np, "interrupt-controller") { 1258c2ecf20Sopenharmony_ci if (of_get_property(np, "interrupts", NULL) == NULL) 1268c2ecf20Sopenharmony_ci break; 1278c2ecf20Sopenharmony_ci } 1288c2ecf20Sopenharmony_ci if (np == NULL) 1298c2ecf20Sopenharmony_ci panic("Can't find top level interrupt controller"); 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci /* Check type and do appropriate initialization */ 1328c2ecf20Sopenharmony_ci if (of_device_is_compatible(np, "chrp,open-pic")) { 1338c2ecf20Sopenharmony_ci /* The MPIC driver will get everything it needs from the 1348c2ecf20Sopenharmony_ci * device-tree, just pass 0 to all arguments 1358c2ecf20Sopenharmony_ci */ 1368c2ecf20Sopenharmony_ci struct mpic *mpic = 1378c2ecf20Sopenharmony_ci mpic_alloc(np, 0, MPIC_NO_RESET, 0, 0, " MPIC "); 1388c2ecf20Sopenharmony_ci BUG_ON(mpic == NULL); 1398c2ecf20Sopenharmony_ci mpic_init(mpic); 1408c2ecf20Sopenharmony_ci ppc_md.get_irq = mpic_get_irq; 1418c2ecf20Sopenharmony_ci } else 1428c2ecf20Sopenharmony_ci panic("Unrecognized top level interrupt controller"); 1438c2ecf20Sopenharmony_ci} 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci#ifdef CONFIG_SMP 1468c2ecf20Sopenharmony_cistatic void smp_ppc47x_setup_cpu(int cpu) 1478c2ecf20Sopenharmony_ci{ 1488c2ecf20Sopenharmony_ci mpic_setup_this_cpu(); 1498c2ecf20Sopenharmony_ci} 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_cistatic int smp_ppc47x_kick_cpu(int cpu) 1528c2ecf20Sopenharmony_ci{ 1538c2ecf20Sopenharmony_ci struct device_node *cpunode = of_get_cpu_node(cpu, NULL); 1548c2ecf20Sopenharmony_ci const u64 *spin_table_addr_prop; 1558c2ecf20Sopenharmony_ci u32 *spin_table; 1568c2ecf20Sopenharmony_ci extern void start_secondary_47x(void); 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci BUG_ON(cpunode == NULL); 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_ci /* Assume spin table. We could test for the enable-method in 1618c2ecf20Sopenharmony_ci * the device-tree but currently there's little point as it's 1628c2ecf20Sopenharmony_ci * our only supported method 1638c2ecf20Sopenharmony_ci */ 1648c2ecf20Sopenharmony_ci spin_table_addr_prop = 1658c2ecf20Sopenharmony_ci of_get_property(cpunode, "cpu-release-addr", NULL); 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci if (spin_table_addr_prop == NULL) { 1688c2ecf20Sopenharmony_ci pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", 1698c2ecf20Sopenharmony_ci cpu); 1708c2ecf20Sopenharmony_ci return 1; 1718c2ecf20Sopenharmony_ci } 1728c2ecf20Sopenharmony_ci 1738c2ecf20Sopenharmony_ci /* Assume it's mapped as part of the linear mapping. This is a bit 1748c2ecf20Sopenharmony_ci * fishy but will work fine for now 1758c2ecf20Sopenharmony_ci * 1768c2ecf20Sopenharmony_ci * XXX: Is there any reason to assume differently? 1778c2ecf20Sopenharmony_ci */ 1788c2ecf20Sopenharmony_ci spin_table = (u32 *)__va(*spin_table_addr_prop); 1798c2ecf20Sopenharmony_ci pr_debug("CPU%d: Spin table mapped at %p\n", cpu, spin_table); 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_ci spin_table[3] = cpu; 1828c2ecf20Sopenharmony_ci smp_wmb(); 1838c2ecf20Sopenharmony_ci spin_table[1] = __pa(start_secondary_47x); 1848c2ecf20Sopenharmony_ci mb(); 1858c2ecf20Sopenharmony_ci 1868c2ecf20Sopenharmony_ci return 0; 1878c2ecf20Sopenharmony_ci} 1888c2ecf20Sopenharmony_ci 1898c2ecf20Sopenharmony_cistatic struct smp_ops_t ppc47x_smp_ops = { 1908c2ecf20Sopenharmony_ci .probe = smp_mpic_probe, 1918c2ecf20Sopenharmony_ci .message_pass = smp_mpic_message_pass, 1928c2ecf20Sopenharmony_ci .setup_cpu = smp_ppc47x_setup_cpu, 1938c2ecf20Sopenharmony_ci .kick_cpu = smp_ppc47x_kick_cpu, 1948c2ecf20Sopenharmony_ci .give_timebase = smp_generic_give_timebase, 1958c2ecf20Sopenharmony_ci .take_timebase = smp_generic_take_timebase, 1968c2ecf20Sopenharmony_ci}; 1978c2ecf20Sopenharmony_ci 1988c2ecf20Sopenharmony_cistatic void __init ppc47x_smp_init(void) 1998c2ecf20Sopenharmony_ci{ 2008c2ecf20Sopenharmony_ci if (mmu_has_feature(MMU_FTR_TYPE_47x)) 2018c2ecf20Sopenharmony_ci smp_ops = &ppc47x_smp_ops; 2028c2ecf20Sopenharmony_ci} 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci#else /* CONFIG_SMP */ 2058c2ecf20Sopenharmony_cistatic void __init ppc47x_smp_init(void) { } 2068c2ecf20Sopenharmony_ci#endif /* CONFIG_SMP */ 2078c2ecf20Sopenharmony_ci 2088c2ecf20Sopenharmony_cistatic void __init ppc47x_setup_arch(void) 2098c2ecf20Sopenharmony_ci{ 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci /* No need to check the DMA config as we /know/ our windows are all of 2128c2ecf20Sopenharmony_ci * RAM. Lets hope that doesn't change */ 2138c2ecf20Sopenharmony_ci swiotlb_detect_4g(); 2148c2ecf20Sopenharmony_ci 2158c2ecf20Sopenharmony_ci ppc47x_smp_init(); 2168c2ecf20Sopenharmony_ci} 2178c2ecf20Sopenharmony_ci 2188c2ecf20Sopenharmony_cistatic int board_rev = -1; 2198c2ecf20Sopenharmony_cistatic int __init ppc47x_get_board_rev(void) 2208c2ecf20Sopenharmony_ci{ 2218c2ecf20Sopenharmony_ci int reg; 2228c2ecf20Sopenharmony_ci u8 *fpga; 2238c2ecf20Sopenharmony_ci struct device_node *np = NULL; 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ci if (of_machine_is_compatible("ibm,currituck")) { 2268c2ecf20Sopenharmony_ci np = of_find_compatible_node(NULL, NULL, "ibm,currituck-fpga"); 2278c2ecf20Sopenharmony_ci reg = 0; 2288c2ecf20Sopenharmony_ci } else if (of_machine_is_compatible("ibm,akebono")) { 2298c2ecf20Sopenharmony_ci np = of_find_compatible_node(NULL, NULL, "ibm,akebono-fpga"); 2308c2ecf20Sopenharmony_ci reg = 2; 2318c2ecf20Sopenharmony_ci } 2328c2ecf20Sopenharmony_ci 2338c2ecf20Sopenharmony_ci if (!np) 2348c2ecf20Sopenharmony_ci goto fail; 2358c2ecf20Sopenharmony_ci 2368c2ecf20Sopenharmony_ci fpga = (u8 *) of_iomap(np, 0); 2378c2ecf20Sopenharmony_ci of_node_put(np); 2388c2ecf20Sopenharmony_ci if (!fpga) 2398c2ecf20Sopenharmony_ci goto fail; 2408c2ecf20Sopenharmony_ci 2418c2ecf20Sopenharmony_ci board_rev = ioread8(fpga + reg) & 0x03; 2428c2ecf20Sopenharmony_ci pr_info("%s: Found board revision %d\n", __func__, board_rev); 2438c2ecf20Sopenharmony_ci iounmap(fpga); 2448c2ecf20Sopenharmony_ci return 0; 2458c2ecf20Sopenharmony_ci 2468c2ecf20Sopenharmony_cifail: 2478c2ecf20Sopenharmony_ci pr_info("%s: Unable to find board revision\n", __func__); 2488c2ecf20Sopenharmony_ci return 0; 2498c2ecf20Sopenharmony_ci} 2508c2ecf20Sopenharmony_cimachine_arch_initcall(ppc47x, ppc47x_get_board_rev); 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ci/* Use USB controller should have been hardware swizzled but it wasn't :( */ 2538c2ecf20Sopenharmony_cistatic void ppc47x_pci_irq_fixup(struct pci_dev *dev) 2548c2ecf20Sopenharmony_ci{ 2558c2ecf20Sopenharmony_ci if (dev->vendor == 0x1033 && (dev->device == 0x0035 || 2568c2ecf20Sopenharmony_ci dev->device == 0x00e0)) { 2578c2ecf20Sopenharmony_ci if (board_rev == 0) { 2588c2ecf20Sopenharmony_ci dev->irq = irq_create_mapping(NULL, 47); 2598c2ecf20Sopenharmony_ci pr_info("%s: Mapping irq %d\n", __func__, dev->irq); 2608c2ecf20Sopenharmony_ci } else if (board_rev == 2) { 2618c2ecf20Sopenharmony_ci dev->irq = irq_create_mapping(NULL, 49); 2628c2ecf20Sopenharmony_ci pr_info("%s: Mapping irq %d\n", __func__, dev->irq); 2638c2ecf20Sopenharmony_ci } else { 2648c2ecf20Sopenharmony_ci pr_alert("%s: Unknown board revision\n", __func__); 2658c2ecf20Sopenharmony_ci } 2668c2ecf20Sopenharmony_ci } 2678c2ecf20Sopenharmony_ci} 2688c2ecf20Sopenharmony_ci 2698c2ecf20Sopenharmony_ci/* 2708c2ecf20Sopenharmony_ci * Called very early, MMU is off, device-tree isn't unflattened 2718c2ecf20Sopenharmony_ci */ 2728c2ecf20Sopenharmony_cistatic int __init ppc47x_probe(void) 2738c2ecf20Sopenharmony_ci{ 2748c2ecf20Sopenharmony_ci if (of_machine_is_compatible("ibm,akebono")) 2758c2ecf20Sopenharmony_ci return 1; 2768c2ecf20Sopenharmony_ci 2778c2ecf20Sopenharmony_ci if (of_machine_is_compatible("ibm,currituck")) { 2788c2ecf20Sopenharmony_ci ppc_md.pci_irq_fixup = ppc47x_pci_irq_fixup; 2798c2ecf20Sopenharmony_ci return 1; 2808c2ecf20Sopenharmony_ci } 2818c2ecf20Sopenharmony_ci 2828c2ecf20Sopenharmony_ci return 0; 2838c2ecf20Sopenharmony_ci} 2848c2ecf20Sopenharmony_ci 2858c2ecf20Sopenharmony_cidefine_machine(ppc47x) { 2868c2ecf20Sopenharmony_ci .name = "PowerPC 47x", 2878c2ecf20Sopenharmony_ci .probe = ppc47x_probe, 2888c2ecf20Sopenharmony_ci .progress = udbg_progress, 2898c2ecf20Sopenharmony_ci .init_IRQ = ppc47x_init_irq, 2908c2ecf20Sopenharmony_ci .setup_arch = ppc47x_setup_arch, 2918c2ecf20Sopenharmony_ci .restart = ppc4xx_reset_system, 2928c2ecf20Sopenharmony_ci .calibrate_decr = generic_calibrate_decr, 2938c2ecf20Sopenharmony_ci}; 294