1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
4 * E500 Book E processors.
5 *
6 * Copyright 2004,2010 Freescale Semiconductor, Inc.
7 *
8 * This file contains the routines for initializing the MMU
9 * on the 4xx series of chips.
10 *  -- paulus
11 *
12 *  Derived from arch/ppc/mm/init.c:
13 *    Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
14 *
15 *  Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
16 *  and Cort Dougan (PReP) (cort@cs.nmt.edu)
17 *    Copyright (C) 1996 Paul Mackerras
18 *
19 *  Derived from "arch/i386/mm/init.c"
20 *    Copyright (C) 1991, 1992, 1993, 1994  Linus Torvalds
21 */
22
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/errno.h>
27#include <linux/string.h>
28#include <linux/types.h>
29#include <linux/ptrace.h>
30#include <linux/mman.h>
31#include <linux/mm.h>
32#include <linux/swap.h>
33#include <linux/stddef.h>
34#include <linux/vmalloc.h>
35#include <linux/init.h>
36#include <linux/delay.h>
37#include <linux/highmem.h>
38#include <linux/memblock.h>
39
40#include <asm/prom.h>
41#include <asm/io.h>
42#include <asm/mmu_context.h>
43#include <asm/mmu.h>
44#include <linux/uaccess.h>
45#include <asm/smp.h>
46#include <asm/machdep.h>
47#include <asm/setup.h>
48#include <asm/paca.h>
49
50#include <mm/mmu_decl.h>
51
52unsigned int tlbcam_index;
53
54#define NUM_TLBCAMS	(64)
55struct tlbcam TLBCAM[NUM_TLBCAMS];
56
57struct tlbcamrange {
58	unsigned long start;
59	unsigned long limit;
60	phys_addr_t phys;
61} tlbcam_addrs[NUM_TLBCAMS];
62
63unsigned long tlbcam_sz(int idx)
64{
65	return tlbcam_addrs[idx].limit - tlbcam_addrs[idx].start + 1;
66}
67
68#ifdef CONFIG_FSL_BOOKE
69/*
70 * Return PA for this VA if it is mapped by a CAM, or 0
71 */
72phys_addr_t v_block_mapped(unsigned long va)
73{
74	int b;
75	for (b = 0; b < tlbcam_index; ++b)
76		if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
77			return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
78	return 0;
79}
80
81/*
82 * Return VA for a given PA or 0 if not mapped
83 */
84unsigned long p_block_mapped(phys_addr_t pa)
85{
86	int b;
87	for (b = 0; b < tlbcam_index; ++b)
88		if (pa >= tlbcam_addrs[b].phys
89			&& pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
90		              +tlbcam_addrs[b].phys)
91			return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
92	return 0;
93}
94#endif
95
96/*
97 * Set up a variable-size TLB entry (tlbcam). The parameters are not checked;
98 * in particular size must be a power of 4 between 4k and the max supported by
99 * an implementation; max may further be limited by what can be represented in
100 * an unsigned long (for example, 32-bit implementations cannot support a 4GB
101 * size).
102 */
103static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
104		unsigned long size, unsigned long flags, unsigned int pid)
105{
106	unsigned int tsize;
107
108	tsize = __ilog2(size) - 10;
109
110#if defined(CONFIG_SMP) || defined(CONFIG_PPC_E500MC)
111	if ((flags & _PAGE_NO_CACHE) == 0)
112		flags |= _PAGE_COHERENT;
113#endif
114
115	TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
116	TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
117	TLBCAM[index].MAS2 = virt & PAGE_MASK;
118
119	TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
120	TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
121	TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
122	TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
123	TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
124
125	TLBCAM[index].MAS3 = (phys & MAS3_RPN) | MAS3_SX | MAS3_SR;
126	TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
127	if (mmu_has_feature(MMU_FTR_BIG_PHYS))
128		TLBCAM[index].MAS7 = (u64)phys >> 32;
129
130	/* Below is unlikely -- only for large user pages or similar */
131	if (pte_user(__pte(flags))) {
132	   TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
133	   TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
134	}
135
136	tlbcam_addrs[index].start = virt;
137	tlbcam_addrs[index].limit = virt + size - 1;
138	tlbcam_addrs[index].phys = phys;
139}
140
141unsigned long calc_cam_sz(unsigned long ram, unsigned long virt,
142			  phys_addr_t phys)
143{
144	unsigned int camsize = __ilog2(ram);
145	unsigned int align = __ffs(virt | phys);
146	unsigned long max_cam;
147
148	if ((mfspr(SPRN_MMUCFG) & MMUCFG_MAVN) == MMUCFG_MAVN_V1) {
149		/* Convert (4^max) kB to (2^max) bytes */
150		max_cam = ((mfspr(SPRN_TLB1CFG) >> 16) & 0xf) * 2 + 10;
151		camsize &= ~1U;
152		align &= ~1U;
153	} else {
154		/* Convert (2^max) kB to (2^max) bytes */
155		max_cam = __ilog2(mfspr(SPRN_TLB1PS)) + 10;
156	}
157
158	if (camsize > align)
159		camsize = align;
160	if (camsize > max_cam)
161		camsize = max_cam;
162
163	return 1UL << camsize;
164}
165
166static unsigned long map_mem_in_cams_addr(phys_addr_t phys, unsigned long virt,
167					unsigned long ram, int max_cam_idx,
168					bool dryrun)
169{
170	int i;
171	unsigned long amount_mapped = 0;
172
173	/* Calculate CAM values */
174	for (i = 0; ram && i < max_cam_idx; i++) {
175		unsigned long cam_sz;
176
177		cam_sz = calc_cam_sz(ram, virt, phys);
178		if (!dryrun)
179			settlbcam(i, virt, phys, cam_sz,
180				  pgprot_val(PAGE_KERNEL_X), 0);
181
182		ram -= cam_sz;
183		amount_mapped += cam_sz;
184		virt += cam_sz;
185		phys += cam_sz;
186	}
187
188	if (dryrun)
189		return amount_mapped;
190
191	loadcam_multi(0, i, max_cam_idx);
192	tlbcam_index = i;
193
194#ifdef CONFIG_PPC64
195	get_paca()->tcd.esel_next = i;
196	get_paca()->tcd.esel_max = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
197	get_paca()->tcd.esel_first = i;
198#endif
199
200	return amount_mapped;
201}
202
203unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, bool dryrun)
204{
205	unsigned long virt = PAGE_OFFSET;
206	phys_addr_t phys = memstart_addr;
207
208	return map_mem_in_cams_addr(phys, virt, ram, max_cam_idx, dryrun);
209}
210
211#ifdef CONFIG_PPC32
212
213#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
214#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
215#endif
216
217unsigned long __init mmu_mapin_ram(unsigned long base, unsigned long top)
218{
219	return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
220}
221
222void flush_instruction_cache(void)
223{
224	unsigned long tmp;
225
226	if (IS_ENABLED(CONFIG_E200)) {
227		tmp = mfspr(SPRN_L1CSR0);
228		tmp |= L1CSR0_CFI | L1CSR0_CLFC;
229		mtspr(SPRN_L1CSR0, tmp);
230	} else {
231		tmp = mfspr(SPRN_L1CSR1);
232		tmp |= L1CSR1_ICFI | L1CSR1_ICLFR;
233		mtspr(SPRN_L1CSR1, tmp);
234	}
235	isync();
236}
237
238/*
239 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
240 */
241void __init MMU_init_hw(void)
242{
243	flush_instruction_cache();
244}
245
246void __init adjust_total_lowmem(void)
247{
248	unsigned long ram;
249	int i;
250
251	/* adjust lowmem size to __max_low_memory */
252	ram = min((phys_addr_t)__max_low_memory, (phys_addr_t)total_lowmem);
253
254	i = switch_to_as1();
255	__max_low_memory = map_mem_in_cams(ram, CONFIG_LOWMEM_CAM_NUM, false);
256	restore_to_as0(i, 0, 0, 1);
257
258	pr_info("Memory CAM mapping: ");
259	for (i = 0; i < tlbcam_index - 1; i++)
260		pr_cont("%lu/", tlbcam_sz(i) >> 20);
261	pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
262	        (unsigned int)((total_lowmem - __max_low_memory) >> 20));
263
264	memblock_set_current_limit(memstart_addr + __max_low_memory);
265}
266
267void setup_initial_memory_limit(phys_addr_t first_memblock_base,
268				phys_addr_t first_memblock_size)
269{
270	phys_addr_t limit = first_memblock_base + first_memblock_size;
271
272	/* 64M mapped initially according to head_fsl_booke.S */
273	memblock_set_current_limit(min_t(u64, limit, 0x04000000));
274}
275
276#ifdef CONFIG_RELOCATABLE
277int __initdata is_second_reloc;
278notrace void __init relocate_init(u64 dt_ptr, phys_addr_t start)
279{
280	unsigned long base = kernstart_virt_addr;
281	phys_addr_t size;
282
283	kernstart_addr = start;
284	if (is_second_reloc) {
285		virt_phys_offset = PAGE_OFFSET - memstart_addr;
286		kaslr_late_init();
287		return;
288	}
289
290	/*
291	 * Relocatable kernel support based on processing of dynamic
292	 * relocation entries. Before we get the real memstart_addr,
293	 * We will compute the virt_phys_offset like this:
294	 * virt_phys_offset = stext.run - kernstart_addr
295	 *
296	 * stext.run = (KERNELBASE & ~0x3ffffff) +
297	 *				(kernstart_addr & 0x3ffffff)
298	 * When we relocate, we have :
299	 *
300	 *	(kernstart_addr & 0x3ffffff) = (stext.run & 0x3ffffff)
301	 *
302	 * hence:
303	 *  virt_phys_offset = (KERNELBASE & ~0x3ffffff) -
304	 *                              (kernstart_addr & ~0x3ffffff)
305	 *
306	 */
307	start &= ~0x3ffffff;
308	base &= ~0x3ffffff;
309	virt_phys_offset = base - start;
310	early_get_first_memblock_info(__va(dt_ptr), &size);
311	/*
312	 * We now get the memstart_addr, then we should check if this
313	 * address is the same as what the PAGE_OFFSET map to now. If
314	 * not we have to change the map of PAGE_OFFSET to memstart_addr
315	 * and do a second relocation.
316	 */
317	if (start != memstart_addr) {
318		int n;
319		long offset = start - memstart_addr;
320
321		is_second_reloc = 1;
322		n = switch_to_as1();
323		/* map a 64M area for the second relocation */
324		if (memstart_addr > start)
325			map_mem_in_cams(0x4000000, CONFIG_LOWMEM_CAM_NUM,
326					false);
327		else
328			map_mem_in_cams_addr(start, PAGE_OFFSET + offset,
329					0x4000000, CONFIG_LOWMEM_CAM_NUM,
330					false);
331		restore_to_as0(n, offset, __va(dt_ptr), 1);
332		/* We should never reach here */
333		panic("Relocation error");
334	}
335
336	kaslr_early_init(__va(dt_ptr), size);
337}
338#endif
339#endif
340