18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * This file describes the structure passed from the BootX application 48c2ecf20Sopenharmony_ci * (for MacOS) when it is used to boot Linux. 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Written by Benjamin Herrenschmidt. 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#ifndef _UAPI__ASM_BOOTX_H__ 118c2ecf20Sopenharmony_ci#define _UAPI__ASM_BOOTX_H__ 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include <linux/types.h> 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#ifdef macintosh 168c2ecf20Sopenharmony_ci#include <Types.h> 178c2ecf20Sopenharmony_ci#include "linux_type_defs.h" 188c2ecf20Sopenharmony_ci#endif 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_ci#ifdef macintosh 218c2ecf20Sopenharmony_ci/* All this requires PowerPC alignment */ 228c2ecf20Sopenharmony_ci#pragma options align=power 238c2ecf20Sopenharmony_ci#endif 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* On kernel entry: 268c2ecf20Sopenharmony_ci * 278c2ecf20Sopenharmony_ci * r3 = 0x426f6f58 ('BooX') 288c2ecf20Sopenharmony_ci * r4 = pointer to boot_infos 298c2ecf20Sopenharmony_ci * r5 = NULL 308c2ecf20Sopenharmony_ci * 318c2ecf20Sopenharmony_ci * Data and instruction translation disabled, interrupts 328c2ecf20Sopenharmony_ci * disabled, kernel loaded at physical 0x00000000 on PCI 338c2ecf20Sopenharmony_ci * machines (will be different on NuBus). 348c2ecf20Sopenharmony_ci */ 358c2ecf20Sopenharmony_ci 368c2ecf20Sopenharmony_ci#define BOOT_INFO_VERSION 5 378c2ecf20Sopenharmony_ci#define BOOT_INFO_COMPATIBLE_VERSION 1 388c2ecf20Sopenharmony_ci 398c2ecf20Sopenharmony_ci/* Bit in the architecture flag mask. More to be defined in 408c2ecf20Sopenharmony_ci future versions. Note that either BOOT_ARCH_PCI or 418c2ecf20Sopenharmony_ci BOOT_ARCH_NUBUS is set. The other BOOT_ARCH_NUBUS_xxx are 428c2ecf20Sopenharmony_ci set additionally when BOOT_ARCH_NUBUS is set. 438c2ecf20Sopenharmony_ci */ 448c2ecf20Sopenharmony_ci#define BOOT_ARCH_PCI 0x00000001UL 458c2ecf20Sopenharmony_ci#define BOOT_ARCH_NUBUS 0x00000002UL 468c2ecf20Sopenharmony_ci#define BOOT_ARCH_NUBUS_PDM 0x00000010UL 478c2ecf20Sopenharmony_ci#define BOOT_ARCH_NUBUS_PERFORMA 0x00000020UL 488c2ecf20Sopenharmony_ci#define BOOT_ARCH_NUBUS_POWERBOOK 0x00000040UL 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci/* Maximum number of ranges in phys memory map */ 518c2ecf20Sopenharmony_ci#define MAX_MEM_MAP_SIZE 26 528c2ecf20Sopenharmony_ci 538c2ecf20Sopenharmony_ci/* This is the format of an element in the physical memory map. Note that 548c2ecf20Sopenharmony_ci the map is optional and current BootX will only build it for pre-PCI 558c2ecf20Sopenharmony_ci machines */ 568c2ecf20Sopenharmony_citypedef struct boot_info_map_entry 578c2ecf20Sopenharmony_ci{ 588c2ecf20Sopenharmony_ci __u32 physAddr; /* Physical starting address */ 598c2ecf20Sopenharmony_ci __u32 size; /* Size in bytes */ 608c2ecf20Sopenharmony_ci} boot_info_map_entry_t; 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* Here are the boot informations that are passed to the bootstrap 648c2ecf20Sopenharmony_ci * Note that the kernel arguments and the device tree are appended 658c2ecf20Sopenharmony_ci * at the end of this structure. */ 668c2ecf20Sopenharmony_citypedef struct boot_infos 678c2ecf20Sopenharmony_ci{ 688c2ecf20Sopenharmony_ci /* Version of this structure */ 698c2ecf20Sopenharmony_ci __u32 version; 708c2ecf20Sopenharmony_ci /* backward compatible down to version: */ 718c2ecf20Sopenharmony_ci __u32 compatible_version; 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci /* NEW (vers. 2) this holds the current _logical_ base addr of 748c2ecf20Sopenharmony_ci the frame buffer (for use by early boot message) */ 758c2ecf20Sopenharmony_ci __u8* logicalDisplayBase; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci /* NEW (vers. 4) Apple's machine identification */ 788c2ecf20Sopenharmony_ci __u32 machineID; 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ci /* NEW (vers. 4) Detected hw architecture */ 818c2ecf20Sopenharmony_ci __u32 architecture; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci /* The device tree (internal addresses relative to the beginning of the tree, 848c2ecf20Sopenharmony_ci * device tree offset relative to the beginning of this structure). 858c2ecf20Sopenharmony_ci * On pre-PCI macintosh (BOOT_ARCH_PCI bit set to 0 in architecture), this 868c2ecf20Sopenharmony_ci * field is 0. 878c2ecf20Sopenharmony_ci */ 888c2ecf20Sopenharmony_ci __u32 deviceTreeOffset; /* Device tree offset */ 898c2ecf20Sopenharmony_ci __u32 deviceTreeSize; /* Size of the device tree */ 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci /* Some infos about the current MacOS display */ 928c2ecf20Sopenharmony_ci __u32 dispDeviceRect[4]; /* left,top,right,bottom */ 938c2ecf20Sopenharmony_ci __u32 dispDeviceDepth; /* (8, 16 or 32) */ 948c2ecf20Sopenharmony_ci __u8* dispDeviceBase; /* base address (physical) */ 958c2ecf20Sopenharmony_ci __u32 dispDeviceRowBytes; /* rowbytes (in bytes) */ 968c2ecf20Sopenharmony_ci __u32 dispDeviceColorsOffset; /* Colormap (8 bits only) or 0 (*) */ 978c2ecf20Sopenharmony_ci /* Optional offset in the registry to the current 988c2ecf20Sopenharmony_ci * MacOS display. (Can be 0 when not detected) */ 998c2ecf20Sopenharmony_ci __u32 dispDeviceRegEntryOffset; 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci /* Optional pointer to boot ramdisk (offset from this structure) */ 1028c2ecf20Sopenharmony_ci __u32 ramDisk; 1038c2ecf20Sopenharmony_ci __u32 ramDiskSize; /* size of ramdisk image */ 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci /* Kernel command line arguments (offset from this structure) */ 1068c2ecf20Sopenharmony_ci __u32 kernelParamsOffset; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci /* ALL BELOW NEW (vers. 4) */ 1098c2ecf20Sopenharmony_ci 1108c2ecf20Sopenharmony_ci /* This defines the physical memory. Valid with BOOT_ARCH_NUBUS flag 1118c2ecf20Sopenharmony_ci (non-PCI) only. On PCI, memory is contiguous and it's size is in the 1128c2ecf20Sopenharmony_ci device-tree. */ 1138c2ecf20Sopenharmony_ci boot_info_map_entry_t 1148c2ecf20Sopenharmony_ci physMemoryMap[MAX_MEM_MAP_SIZE]; /* Where the phys memory is */ 1158c2ecf20Sopenharmony_ci __u32 physMemoryMapSize; /* How many entries in map */ 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ci 1188c2ecf20Sopenharmony_ci /* The framebuffer size (optional, currently 0) */ 1198c2ecf20Sopenharmony_ci __u32 frameBufferSize; /* Represents a max size, can be 0. */ 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci /* NEW (vers. 5) */ 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci /* Total params size (args + colormap + device tree + ramdisk) */ 1248c2ecf20Sopenharmony_ci __u32 totalParamsSize; 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci} boot_infos_t; 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci#ifdef macintosh 1308c2ecf20Sopenharmony_ci#pragma options align=reset 1318c2ecf20Sopenharmony_ci#endif 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ci#endif /* _UAPI__ASM_BOOTX_H__ */ 134