18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Definition of platform feature hooks for PowerMacs 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 58c2ecf20Sopenharmony_ci * License. See the file "COPYING" in the main directory of this archive 68c2ecf20Sopenharmony_ci * for more details. 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci * Copyright (C) 1998 Paul Mackerras & 98c2ecf20Sopenharmony_ci * Ben. Herrenschmidt. 108c2ecf20Sopenharmony_ci * 118c2ecf20Sopenharmony_ci * 128c2ecf20Sopenharmony_ci * Note: I removed media-bay details from the feature stuff, I believe it's 138c2ecf20Sopenharmony_ci * not worth it, the media-bay driver can directly use the mac-io 148c2ecf20Sopenharmony_ci * ASIC registers. 158c2ecf20Sopenharmony_ci * 168c2ecf20Sopenharmony_ci * Implementation note: Currently, none of these functions will block. 178c2ecf20Sopenharmony_ci * However, they may internally protect themselves with a spinlock 188c2ecf20Sopenharmony_ci * for way too long. Be prepared for at least some of these to block 198c2ecf20Sopenharmony_ci * in the future. 208c2ecf20Sopenharmony_ci * 218c2ecf20Sopenharmony_ci * Unless specifically defined, the result code is assumed to be an 228c2ecf20Sopenharmony_ci * error when negative, 0 is the default success result. Some functions 238c2ecf20Sopenharmony_ci * may return additional positive result values. 248c2ecf20Sopenharmony_ci * 258c2ecf20Sopenharmony_ci * To keep implementation simple, all feature calls are assumed to have 268c2ecf20Sopenharmony_ci * the prototype parameters (struct device_node* node, int value). 278c2ecf20Sopenharmony_ci * When either is not used, pass 0. 288c2ecf20Sopenharmony_ci */ 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#ifdef __KERNEL__ 318c2ecf20Sopenharmony_ci#ifndef __ASM_POWERPC_PMAC_FEATURE_H 328c2ecf20Sopenharmony_ci#define __ASM_POWERPC_PMAC_FEATURE_H 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci#include <asm/macio.h> 358c2ecf20Sopenharmony_ci#include <asm/machdep.h> 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci/* 388c2ecf20Sopenharmony_ci * Known Mac motherboard models 398c2ecf20Sopenharmony_ci * 408c2ecf20Sopenharmony_ci * Please, report any error here to benh@kernel.crashing.org, thanks ! 418c2ecf20Sopenharmony_ci * 428c2ecf20Sopenharmony_ci * Note that I don't fully maintain this list for Core99 & MacRISC2 438c2ecf20Sopenharmony_ci * and I'm considering removing all NewWorld entries from it and 448c2ecf20Sopenharmony_ci * entirely rely on the model string. 458c2ecf20Sopenharmony_ci */ 468c2ecf20Sopenharmony_ci 478c2ecf20Sopenharmony_ci/* PowerSurge are the first generation of PCI Pmacs. This include 488c2ecf20Sopenharmony_ci * all of the Grand-Central based machines. We currently don't 498c2ecf20Sopenharmony_ci * differentiate most of them. 508c2ecf20Sopenharmony_ci */ 518c2ecf20Sopenharmony_ci#define PMAC_TYPE_PSURGE 0x10 /* PowerSurge */ 528c2ecf20Sopenharmony_ci#define PMAC_TYPE_ANS 0x11 /* Apple Network Server */ 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci/* Here is the infamous serie of OHare based machines 558c2ecf20Sopenharmony_ci */ 568c2ecf20Sopenharmony_ci#define PMAC_TYPE_COMET 0x20 /* Believed to be PowerBook 2400 */ 578c2ecf20Sopenharmony_ci#define PMAC_TYPE_HOOPER 0x21 /* Believed to be PowerBook 3400 */ 588c2ecf20Sopenharmony_ci#define PMAC_TYPE_KANGA 0x22 /* PowerBook 3500 (first G3) */ 598c2ecf20Sopenharmony_ci#define PMAC_TYPE_ALCHEMY 0x23 /* Alchemy motherboard base */ 608c2ecf20Sopenharmony_ci#define PMAC_TYPE_GAZELLE 0x24 /* Spartacus, some 5xxx/6xxx */ 618c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_OHARE 0x2f /* Unknown, but OHare based */ 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* Here are the Heathrow based machines 648c2ecf20Sopenharmony_ci * FIXME: Differenciate wallstreet,mainstreet,wallstreetII 658c2ecf20Sopenharmony_ci */ 668c2ecf20Sopenharmony_ci#define PMAC_TYPE_GOSSAMER 0x30 /* Gossamer motherboard */ 678c2ecf20Sopenharmony_ci#define PMAC_TYPE_SILK 0x31 /* Desktop PowerMac G3 */ 688c2ecf20Sopenharmony_ci#define PMAC_TYPE_WALLSTREET 0x32 /* Wallstreet/Mainstreet PowerBook*/ 698c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_HEATHROW 0x3f /* Unknown but heathrow based */ 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci/* Here are newworld machines based on Paddington (heathrow derivative) 728c2ecf20Sopenharmony_ci */ 738c2ecf20Sopenharmony_ci#define PMAC_TYPE_101_PBOOK 0x40 /* 101 PowerBook (aka Lombard) */ 748c2ecf20Sopenharmony_ci#define PMAC_TYPE_ORIG_IMAC 0x41 /* First generation iMac */ 758c2ecf20Sopenharmony_ci#define PMAC_TYPE_YOSEMITE 0x42 /* B&W G3 */ 768c2ecf20Sopenharmony_ci#define PMAC_TYPE_YIKES 0x43 /* Yikes G4 (PCI graphics) */ 778c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_PADDINGTON 0x4f /* Unknown but paddington based */ 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci/* Core99 machines based on UniNorth 1.0 and 1.5 808c2ecf20Sopenharmony_ci * 818c2ecf20Sopenharmony_ci * Note: A single entry here may cover several actual models according 828c2ecf20Sopenharmony_ci * to the device-tree. (Sawtooth is most tower G4s, FW_IMAC is most 838c2ecf20Sopenharmony_ci * FireWire based iMacs, etc...). Those machines are too similar to be 848c2ecf20Sopenharmony_ci * distinguished here, when they need to be differencied, use the 858c2ecf20Sopenharmony_ci * device-tree "model" or "compatible" property. 868c2ecf20Sopenharmony_ci */ 878c2ecf20Sopenharmony_ci#define PMAC_TYPE_ORIG_IBOOK 0x40 /* First iBook model (no firewire) */ 888c2ecf20Sopenharmony_ci#define PMAC_TYPE_SAWTOOTH 0x41 /* Desktop G4s */ 898c2ecf20Sopenharmony_ci#define PMAC_TYPE_FW_IMAC 0x42 /* FireWire iMacs (except Pangea based) */ 908c2ecf20Sopenharmony_ci#define PMAC_TYPE_FW_IBOOK 0x43 /* FireWire iBooks (except iBook2) */ 918c2ecf20Sopenharmony_ci#define PMAC_TYPE_CUBE 0x44 /* Cube PowerMac */ 928c2ecf20Sopenharmony_ci#define PMAC_TYPE_QUICKSILVER 0x45 /* QuickSilver G4s */ 938c2ecf20Sopenharmony_ci#define PMAC_TYPE_PISMO 0x46 /* Pismo PowerBook */ 948c2ecf20Sopenharmony_ci#define PMAC_TYPE_TITANIUM 0x47 /* Titanium PowerBook */ 958c2ecf20Sopenharmony_ci#define PMAC_TYPE_TITANIUM2 0x48 /* Titanium II PowerBook (no L3, M6) */ 968c2ecf20Sopenharmony_ci#define PMAC_TYPE_TITANIUM3 0x49 /* Titanium III PowerBook (with L3 & M7) */ 978c2ecf20Sopenharmony_ci#define PMAC_TYPE_TITANIUM4 0x50 /* Titanium IV PowerBook (with L3 & M9) */ 988c2ecf20Sopenharmony_ci#define PMAC_TYPE_EMAC 0x50 /* eMac */ 998c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_CORE99 0x5f 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci/* MacRisc2 with UniNorth 2.0 */ 1028c2ecf20Sopenharmony_ci#define PMAC_TYPE_RACKMAC 0x80 /* XServe */ 1038c2ecf20Sopenharmony_ci#define PMAC_TYPE_WINDTUNNEL 0x81 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ci/* MacRISC2 machines based on the Pangea chipset 1068c2ecf20Sopenharmony_ci */ 1078c2ecf20Sopenharmony_ci#define PMAC_TYPE_PANGEA_IMAC 0x100 /* Flower Power iMac */ 1088c2ecf20Sopenharmony_ci#define PMAC_TYPE_IBOOK2 0x101 /* iBook2 (polycarbonate) */ 1098c2ecf20Sopenharmony_ci#define PMAC_TYPE_FLAT_PANEL_IMAC 0x102 /* Flat panel iMac */ 1108c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_PANGEA 0x10f 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ci/* MacRISC2 machines based on the Intrepid chipset 1138c2ecf20Sopenharmony_ci */ 1148c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_INTREPID 0x11f /* Generic */ 1158c2ecf20Sopenharmony_ci 1168c2ecf20Sopenharmony_ci/* MacRISC4 / G5 machines. We don't have per-machine selection here anymore, 1178c2ecf20Sopenharmony_ci * but rather machine families 1188c2ecf20Sopenharmony_ci */ 1198c2ecf20Sopenharmony_ci#define PMAC_TYPE_POWERMAC_G5 0x150 /* U3 & U3H based */ 1208c2ecf20Sopenharmony_ci#define PMAC_TYPE_POWERMAC_G5_U3L 0x151 /* U3L based desktop */ 1218c2ecf20Sopenharmony_ci#define PMAC_TYPE_IMAC_G5 0x152 /* iMac G5 */ 1228c2ecf20Sopenharmony_ci#define PMAC_TYPE_XSERVE_G5 0x153 /* Xserve G5 */ 1238c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_K2 0x19f /* Any other K2 based */ 1248c2ecf20Sopenharmony_ci#define PMAC_TYPE_UNKNOWN_SHASTA 0x19e /* Any other Shasta based */ 1258c2ecf20Sopenharmony_ci 1268c2ecf20Sopenharmony_ci/* 1278c2ecf20Sopenharmony_ci * Motherboard flags 1288c2ecf20Sopenharmony_ci */ 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci#define PMAC_MB_CAN_SLEEP 0x00000001 1318c2ecf20Sopenharmony_ci#define PMAC_MB_HAS_FW_POWER 0x00000002 1328c2ecf20Sopenharmony_ci#define PMAC_MB_OLD_CORE99 0x00000004 1338c2ecf20Sopenharmony_ci#define PMAC_MB_MOBILE 0x00000008 1348c2ecf20Sopenharmony_ci#define PMAC_MB_MAY_SLEEP 0x00000010 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_ci/* 1378c2ecf20Sopenharmony_ci * Feature calls supported on pmac 1388c2ecf20Sopenharmony_ci * 1398c2ecf20Sopenharmony_ci */ 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ci/* 1428c2ecf20Sopenharmony_ci * Use this inline wrapper 1438c2ecf20Sopenharmony_ci */ 1448c2ecf20Sopenharmony_cistruct device_node; 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_cistatic inline long pmac_call_feature(int selector, struct device_node* node, 1478c2ecf20Sopenharmony_ci long param, long value) 1488c2ecf20Sopenharmony_ci{ 1498c2ecf20Sopenharmony_ci if (!ppc_md.feature_call || !machine_is(powermac)) 1508c2ecf20Sopenharmony_ci return -ENODEV; 1518c2ecf20Sopenharmony_ci return ppc_md.feature_call(selector, node, param, value); 1528c2ecf20Sopenharmony_ci} 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci/* PMAC_FTR_SERIAL_ENABLE (struct device_node* node, int param, int value) 1558c2ecf20Sopenharmony_ci * enable/disable an SCC side. Pass the node corresponding to the 1568c2ecf20Sopenharmony_ci * channel side as a parameter. 1578c2ecf20Sopenharmony_ci * param is the type of port 1588c2ecf20Sopenharmony_ci * if param is ored with PMAC_SCC_FLAG_XMON, then the SCC is locked enabled 1598c2ecf20Sopenharmony_ci * for use by xmon. 1608c2ecf20Sopenharmony_ci */ 1618c2ecf20Sopenharmony_ci#define PMAC_FTR_SCC_ENABLE PMAC_FTR_DEF(0) 1628c2ecf20Sopenharmony_ci #define PMAC_SCC_ASYNC 0 1638c2ecf20Sopenharmony_ci #define PMAC_SCC_IRDA 1 1648c2ecf20Sopenharmony_ci #define PMAC_SCC_I2S1 2 1658c2ecf20Sopenharmony_ci #define PMAC_SCC_FLAG_XMON 0x00001000 1668c2ecf20Sopenharmony_ci 1678c2ecf20Sopenharmony_ci/* PMAC_FTR_MODEM_ENABLE (struct device_node* node, 0, int value) 1688c2ecf20Sopenharmony_ci * enable/disable the internal modem. 1698c2ecf20Sopenharmony_ci */ 1708c2ecf20Sopenharmony_ci#define PMAC_FTR_MODEM_ENABLE PMAC_FTR_DEF(1) 1718c2ecf20Sopenharmony_ci 1728c2ecf20Sopenharmony_ci/* PMAC_FTR_SWIM3_ENABLE (struct device_node* node, 0,int value) 1738c2ecf20Sopenharmony_ci * enable/disable the swim3 (floppy) cell of a mac-io ASIC 1748c2ecf20Sopenharmony_ci */ 1758c2ecf20Sopenharmony_ci#define PMAC_FTR_SWIM3_ENABLE PMAC_FTR_DEF(2) 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ci/* PMAC_FTR_MESH_ENABLE (struct device_node* node, 0, int value) 1788c2ecf20Sopenharmony_ci * enable/disable the mesh (scsi) cell of a mac-io ASIC 1798c2ecf20Sopenharmony_ci */ 1808c2ecf20Sopenharmony_ci#define PMAC_FTR_MESH_ENABLE PMAC_FTR_DEF(3) 1818c2ecf20Sopenharmony_ci 1828c2ecf20Sopenharmony_ci/* PMAC_FTR_IDE_ENABLE (struct device_node* node, int busID, int value) 1838c2ecf20Sopenharmony_ci * enable/disable an IDE port of a mac-io ASIC 1848c2ecf20Sopenharmony_ci * pass the busID parameter 1858c2ecf20Sopenharmony_ci */ 1868c2ecf20Sopenharmony_ci#define PMAC_FTR_IDE_ENABLE PMAC_FTR_DEF(4) 1878c2ecf20Sopenharmony_ci 1888c2ecf20Sopenharmony_ci/* PMAC_FTR_IDE_RESET (struct device_node* node, int busID, int value) 1898c2ecf20Sopenharmony_ci * assert(1)/release(0) an IDE reset line (mac-io IDE only) 1908c2ecf20Sopenharmony_ci */ 1918c2ecf20Sopenharmony_ci#define PMAC_FTR_IDE_RESET PMAC_FTR_DEF(5) 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci/* PMAC_FTR_BMAC_ENABLE (struct device_node* node, 0, int value) 1948c2ecf20Sopenharmony_ci * enable/disable the bmac (ethernet) cell of a mac-io ASIC, also drive 1958c2ecf20Sopenharmony_ci * it's reset line 1968c2ecf20Sopenharmony_ci */ 1978c2ecf20Sopenharmony_ci#define PMAC_FTR_BMAC_ENABLE PMAC_FTR_DEF(6) 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ci/* PMAC_FTR_GMAC_ENABLE (struct device_node* node, 0, int value) 2008c2ecf20Sopenharmony_ci * enable/disable the gmac (ethernet) cell of an uninorth ASIC. This 2018c2ecf20Sopenharmony_ci * control the cell's clock. 2028c2ecf20Sopenharmony_ci */ 2038c2ecf20Sopenharmony_ci#define PMAC_FTR_GMAC_ENABLE PMAC_FTR_DEF(7) 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ci/* PMAC_FTR_GMAC_PHY_RESET (struct device_node* node, 0, 0) 2068c2ecf20Sopenharmony_ci * Perform a HW reset of the PHY connected to a gmac controller. 2078c2ecf20Sopenharmony_ci * Pass the gmac device node, not the PHY node. 2088c2ecf20Sopenharmony_ci */ 2098c2ecf20Sopenharmony_ci#define PMAC_FTR_GMAC_PHY_RESET PMAC_FTR_DEF(8) 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci/* PMAC_FTR_SOUND_CHIP_ENABLE (struct device_node* node, 0, int value) 2128c2ecf20Sopenharmony_ci * enable/disable the sound chip, whatever it is and provided it can 2138c2ecf20Sopenharmony_ci * actually be controlled 2148c2ecf20Sopenharmony_ci */ 2158c2ecf20Sopenharmony_ci#define PMAC_FTR_SOUND_CHIP_ENABLE PMAC_FTR_DEF(9) 2168c2ecf20Sopenharmony_ci 2178c2ecf20Sopenharmony_ci/* -- add various tweaks related to sound routing -- */ 2188c2ecf20Sopenharmony_ci 2198c2ecf20Sopenharmony_ci/* PMAC_FTR_AIRPORT_ENABLE (struct device_node* node, 0, int value) 2208c2ecf20Sopenharmony_ci * enable/disable the airport card 2218c2ecf20Sopenharmony_ci */ 2228c2ecf20Sopenharmony_ci#define PMAC_FTR_AIRPORT_ENABLE PMAC_FTR_DEF(10) 2238c2ecf20Sopenharmony_ci 2248c2ecf20Sopenharmony_ci/* PMAC_FTR_RESET_CPU (NULL, int cpu_nr, 0) 2258c2ecf20Sopenharmony_ci * toggle the reset line of a CPU on an uninorth-based SMP machine 2268c2ecf20Sopenharmony_ci */ 2278c2ecf20Sopenharmony_ci#define PMAC_FTR_RESET_CPU PMAC_FTR_DEF(11) 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_ci/* PMAC_FTR_USB_ENABLE (struct device_node* node, 0, int value) 2308c2ecf20Sopenharmony_ci * enable/disable an USB cell, along with the power of the USB "pad" 2318c2ecf20Sopenharmony_ci * on keylargo based machines 2328c2ecf20Sopenharmony_ci */ 2338c2ecf20Sopenharmony_ci#define PMAC_FTR_USB_ENABLE PMAC_FTR_DEF(12) 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_ci/* PMAC_FTR_1394_ENABLE (struct device_node* node, 0, int value) 2368c2ecf20Sopenharmony_ci * enable/disable the firewire cell of an uninorth ASIC. 2378c2ecf20Sopenharmony_ci */ 2388c2ecf20Sopenharmony_ci#define PMAC_FTR_1394_ENABLE PMAC_FTR_DEF(13) 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_ci/* PMAC_FTR_1394_CABLE_POWER (struct device_node* node, 0, int value) 2418c2ecf20Sopenharmony_ci * enable/disable the firewire cable power supply of the uninorth 2428c2ecf20Sopenharmony_ci * firewire cell 2438c2ecf20Sopenharmony_ci */ 2448c2ecf20Sopenharmony_ci#define PMAC_FTR_1394_CABLE_POWER PMAC_FTR_DEF(14) 2458c2ecf20Sopenharmony_ci 2468c2ecf20Sopenharmony_ci/* PMAC_FTR_SLEEP_STATE (struct device_node* node, 0, int value) 2478c2ecf20Sopenharmony_ci * set the sleep state of the motherboard. 2488c2ecf20Sopenharmony_ci * 2498c2ecf20Sopenharmony_ci * Pass -1 as value to query for sleep capability 2508c2ecf20Sopenharmony_ci * Pass 1 to set IOs to sleep 2518c2ecf20Sopenharmony_ci * Pass 0 to set IOs to wake 2528c2ecf20Sopenharmony_ci */ 2538c2ecf20Sopenharmony_ci#define PMAC_FTR_SLEEP_STATE PMAC_FTR_DEF(15) 2548c2ecf20Sopenharmony_ci 2558c2ecf20Sopenharmony_ci/* PMAC_FTR_GET_MB_INFO (NULL, selector, 0) 2568c2ecf20Sopenharmony_ci * 2578c2ecf20Sopenharmony_ci * returns some motherboard infos. 2588c2ecf20Sopenharmony_ci * selector: 0 - model id 2598c2ecf20Sopenharmony_ci * 1 - model flags (capabilities) 2608c2ecf20Sopenharmony_ci * 2 - model name (cast to const char *) 2618c2ecf20Sopenharmony_ci */ 2628c2ecf20Sopenharmony_ci#define PMAC_FTR_GET_MB_INFO PMAC_FTR_DEF(16) 2638c2ecf20Sopenharmony_ci#define PMAC_MB_INFO_MODEL 0 2648c2ecf20Sopenharmony_ci#define PMAC_MB_INFO_FLAGS 1 2658c2ecf20Sopenharmony_ci#define PMAC_MB_INFO_NAME 2 2668c2ecf20Sopenharmony_ci 2678c2ecf20Sopenharmony_ci/* PMAC_FTR_READ_GPIO (NULL, int index, 0) 2688c2ecf20Sopenharmony_ci * 2698c2ecf20Sopenharmony_ci * read a GPIO from a mac-io controller of type KeyLargo or Pangea. 2708c2ecf20Sopenharmony_ci * the value returned is a byte (positive), or a negative error code 2718c2ecf20Sopenharmony_ci */ 2728c2ecf20Sopenharmony_ci#define PMAC_FTR_READ_GPIO PMAC_FTR_DEF(17) 2738c2ecf20Sopenharmony_ci 2748c2ecf20Sopenharmony_ci/* PMAC_FTR_WRITE_GPIO (NULL, int index, int value) 2758c2ecf20Sopenharmony_ci * 2768c2ecf20Sopenharmony_ci * write a GPIO of a mac-io controller of type KeyLargo or Pangea. 2778c2ecf20Sopenharmony_ci */ 2788c2ecf20Sopenharmony_ci#define PMAC_FTR_WRITE_GPIO PMAC_FTR_DEF(18) 2798c2ecf20Sopenharmony_ci 2808c2ecf20Sopenharmony_ci/* PMAC_FTR_ENABLE_MPIC 2818c2ecf20Sopenharmony_ci * 2828c2ecf20Sopenharmony_ci * Enable the MPIC cell 2838c2ecf20Sopenharmony_ci */ 2848c2ecf20Sopenharmony_ci#define PMAC_FTR_ENABLE_MPIC PMAC_FTR_DEF(19) 2858c2ecf20Sopenharmony_ci 2868c2ecf20Sopenharmony_ci/* PMAC_FTR_AACK_DELAY_ENABLE (NULL, int enable, 0) 2878c2ecf20Sopenharmony_ci * 2888c2ecf20Sopenharmony_ci * Enable/disable the AACK delay on the northbridge for systems using DFS 2898c2ecf20Sopenharmony_ci */ 2908c2ecf20Sopenharmony_ci#define PMAC_FTR_AACK_DELAY_ENABLE PMAC_FTR_DEF(20) 2918c2ecf20Sopenharmony_ci 2928c2ecf20Sopenharmony_ci/* PMAC_FTR_DEVICE_CAN_WAKE 2938c2ecf20Sopenharmony_ci * 2948c2ecf20Sopenharmony_ci * Used by video drivers to inform system that they can actually perform 2958c2ecf20Sopenharmony_ci * wakeup from sleep 2968c2ecf20Sopenharmony_ci */ 2978c2ecf20Sopenharmony_ci#define PMAC_FTR_DEVICE_CAN_WAKE PMAC_FTR_DEF(22) 2988c2ecf20Sopenharmony_ci 2998c2ecf20Sopenharmony_ci 3008c2ecf20Sopenharmony_ci/* Don't use those directly, they are for the sake of pmac_setup.c */ 3018c2ecf20Sopenharmony_ciextern long pmac_do_feature_call(unsigned int selector, ...); 3028c2ecf20Sopenharmony_ciextern void pmac_feature_init(void); 3038c2ecf20Sopenharmony_ci 3048c2ecf20Sopenharmony_ci/* Video suspend tweak */ 3058c2ecf20Sopenharmony_ciextern void pmac_set_early_video_resume(void (*proc)(void *data), void *data); 3068c2ecf20Sopenharmony_ciextern void pmac_call_early_video_resume(void); 3078c2ecf20Sopenharmony_ci 3088c2ecf20Sopenharmony_ci#define PMAC_FTR_DEF(x) ((0x6660000) | (x)) 3098c2ecf20Sopenharmony_ci 3108c2ecf20Sopenharmony_ci/* The AGP driver registers itself here */ 3118c2ecf20Sopenharmony_ciextern void pmac_register_agp_pm(struct pci_dev *bridge, 3128c2ecf20Sopenharmony_ci int (*suspend)(struct pci_dev *bridge), 3138c2ecf20Sopenharmony_ci int (*resume)(struct pci_dev *bridge)); 3148c2ecf20Sopenharmony_ci 3158c2ecf20Sopenharmony_ci/* Those are meant to be used by video drivers to deal with AGP 3168c2ecf20Sopenharmony_ci * suspend resume properly 3178c2ecf20Sopenharmony_ci */ 3188c2ecf20Sopenharmony_ciextern void pmac_suspend_agp_for_card(struct pci_dev *dev); 3198c2ecf20Sopenharmony_ciextern void pmac_resume_agp_for_card(struct pci_dev *dev); 3208c2ecf20Sopenharmony_ci 3218c2ecf20Sopenharmony_ci/* 3228c2ecf20Sopenharmony_ci * The part below is for use by macio_asic.c only, do not rely 3238c2ecf20Sopenharmony_ci * on the data structures or constants below in a normal driver 3248c2ecf20Sopenharmony_ci * 3258c2ecf20Sopenharmony_ci */ 3268c2ecf20Sopenharmony_ci 3278c2ecf20Sopenharmony_ci#define MAX_MACIO_CHIPS 2 3288c2ecf20Sopenharmony_ci 3298c2ecf20Sopenharmony_cienum { 3308c2ecf20Sopenharmony_ci macio_unknown = 0, 3318c2ecf20Sopenharmony_ci macio_grand_central, 3328c2ecf20Sopenharmony_ci macio_ohare, 3338c2ecf20Sopenharmony_ci macio_ohareII, 3348c2ecf20Sopenharmony_ci macio_heathrow, 3358c2ecf20Sopenharmony_ci macio_gatwick, 3368c2ecf20Sopenharmony_ci macio_paddington, 3378c2ecf20Sopenharmony_ci macio_keylargo, 3388c2ecf20Sopenharmony_ci macio_pangea, 3398c2ecf20Sopenharmony_ci macio_intrepid, 3408c2ecf20Sopenharmony_ci macio_keylargo2, 3418c2ecf20Sopenharmony_ci macio_shasta, 3428c2ecf20Sopenharmony_ci}; 3438c2ecf20Sopenharmony_ci 3448c2ecf20Sopenharmony_cistruct macio_chip 3458c2ecf20Sopenharmony_ci{ 3468c2ecf20Sopenharmony_ci struct device_node *of_node; 3478c2ecf20Sopenharmony_ci int type; 3488c2ecf20Sopenharmony_ci const char *name; 3498c2ecf20Sopenharmony_ci int rev; 3508c2ecf20Sopenharmony_ci volatile u32 __iomem *base; 3518c2ecf20Sopenharmony_ci unsigned long flags; 3528c2ecf20Sopenharmony_ci 3538c2ecf20Sopenharmony_ci /* For use by macio_asic PCI driver */ 3548c2ecf20Sopenharmony_ci struct macio_bus lbus; 3558c2ecf20Sopenharmony_ci}; 3568c2ecf20Sopenharmony_ci 3578c2ecf20Sopenharmony_ciextern struct macio_chip macio_chips[MAX_MACIO_CHIPS]; 3588c2ecf20Sopenharmony_ci 3598c2ecf20Sopenharmony_ci#define MACIO_FLAG_SCCA_ON 0x00000001 3608c2ecf20Sopenharmony_ci#define MACIO_FLAG_SCCB_ON 0x00000002 3618c2ecf20Sopenharmony_ci#define MACIO_FLAG_SCC_LOCKED 0x00000004 3628c2ecf20Sopenharmony_ci#define MACIO_FLAG_AIRPORT_ON 0x00000010 3638c2ecf20Sopenharmony_ci#define MACIO_FLAG_FW_SUPPORTED 0x00000020 3648c2ecf20Sopenharmony_ci 3658c2ecf20Sopenharmony_ciextern struct macio_chip* macio_find(struct device_node* child, int type); 3668c2ecf20Sopenharmony_ci 3678c2ecf20Sopenharmony_ci#define MACIO_FCR32(macio, r) ((macio)->base + ((r) >> 2)) 3688c2ecf20Sopenharmony_ci#define MACIO_FCR8(macio, r) (((volatile u8 __iomem *)((macio)->base)) + (r)) 3698c2ecf20Sopenharmony_ci 3708c2ecf20Sopenharmony_ci#define MACIO_IN32(r) (in_le32(MACIO_FCR32(macio,r))) 3718c2ecf20Sopenharmony_ci#define MACIO_OUT32(r,v) (out_le32(MACIO_FCR32(macio,r), (v))) 3728c2ecf20Sopenharmony_ci#define MACIO_BIS(r,v) (MACIO_OUT32((r), MACIO_IN32(r) | (v))) 3738c2ecf20Sopenharmony_ci#define MACIO_BIC(r,v) (MACIO_OUT32((r), MACIO_IN32(r) & ~(v))) 3748c2ecf20Sopenharmony_ci#define MACIO_IN8(r) (in_8(MACIO_FCR8(macio,r))) 3758c2ecf20Sopenharmony_ci#define MACIO_OUT8(r,v) (out_8(MACIO_FCR8(macio,r), (v))) 3768c2ecf20Sopenharmony_ci 3778c2ecf20Sopenharmony_ci/* 3788c2ecf20Sopenharmony_ci * Those are exported by pmac feature for internal use by arch code 3798c2ecf20Sopenharmony_ci * only like the platform function callbacks, do not use directly in drivers 3808c2ecf20Sopenharmony_ci */ 3818c2ecf20Sopenharmony_ciextern raw_spinlock_t feature_lock; 3828c2ecf20Sopenharmony_ciextern struct device_node *uninorth_node; 3838c2ecf20Sopenharmony_ciextern u32 __iomem *uninorth_base; 3848c2ecf20Sopenharmony_ci 3858c2ecf20Sopenharmony_ci/* 3868c2ecf20Sopenharmony_ci * Uninorth reg. access. Note that Uni-N regs are big endian 3878c2ecf20Sopenharmony_ci */ 3888c2ecf20Sopenharmony_ci 3898c2ecf20Sopenharmony_ci#define UN_REG(r) (uninorth_base + ((r) >> 2)) 3908c2ecf20Sopenharmony_ci#define UN_IN(r) (in_be32(UN_REG(r))) 3918c2ecf20Sopenharmony_ci#define UN_OUT(r,v) (out_be32(UN_REG(r), (v))) 3928c2ecf20Sopenharmony_ci#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 3938c2ecf20Sopenharmony_ci#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 3948c2ecf20Sopenharmony_ci 3958c2ecf20Sopenharmony_ci/* Uninorth variant: 3968c2ecf20Sopenharmony_ci * 3978c2ecf20Sopenharmony_ci * 0 = not uninorth 3988c2ecf20Sopenharmony_ci * 1 = U1.x or U2.x 3998c2ecf20Sopenharmony_ci * 3 = U3 4008c2ecf20Sopenharmony_ci * 4 = U4 4018c2ecf20Sopenharmony_ci */ 4028c2ecf20Sopenharmony_ciextern int pmac_get_uninorth_variant(void); 4038c2ecf20Sopenharmony_ci 4048c2ecf20Sopenharmony_ci#endif /* __ASM_POWERPC_PMAC_FEATURE_H */ 4058c2ecf20Sopenharmony_ci#endif /* __KERNEL__ */ 406