1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
3#define _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H
4
5#include <asm-generic/pgtable-nop4d.h>
6
7/*
8 * Entries per page directory level.  The PTE level must use a 64b record
9 * for each page table entry.  The PMD and PGD level use a 32b record for
10 * each entry by assuming that each entry is page aligned.
11 */
12#define PTE_INDEX_SIZE  9
13#define PMD_INDEX_SIZE  7
14#define PUD_INDEX_SIZE  9
15#define PGD_INDEX_SIZE  9
16
17#ifndef __ASSEMBLY__
18#define PTE_TABLE_SIZE	(sizeof(pte_t) << PTE_INDEX_SIZE)
19#define PMD_TABLE_SIZE	(sizeof(pmd_t) << PMD_INDEX_SIZE)
20#define PUD_TABLE_SIZE	(sizeof(pud_t) << PUD_INDEX_SIZE)
21#define PGD_TABLE_SIZE	(sizeof(pgd_t) << PGD_INDEX_SIZE)
22#endif	/* __ASSEMBLY__ */
23
24#define PTRS_PER_PTE	(1 << PTE_INDEX_SIZE)
25#define PTRS_PER_PMD	(1 << PMD_INDEX_SIZE)
26#define PTRS_PER_PUD	(1 << PUD_INDEX_SIZE)
27#define PTRS_PER_PGD	(1 << PGD_INDEX_SIZE)
28
29/* PMD_SHIFT determines what a second-level page table entry can map */
30#define PMD_SHIFT	(PAGE_SHIFT + PTE_INDEX_SIZE)
31#define PMD_SIZE	(1UL << PMD_SHIFT)
32#define PMD_MASK	(~(PMD_SIZE-1))
33
34/* PUD_SHIFT determines what a third-level page table entry can map */
35#define PUD_SHIFT	(PMD_SHIFT + PMD_INDEX_SIZE)
36#define PUD_SIZE	(1UL << PUD_SHIFT)
37#define PUD_MASK	(~(PUD_SIZE-1))
38
39/* PGDIR_SHIFT determines what a fourth-level page table entry can map */
40#define PGDIR_SHIFT	(PUD_SHIFT + PUD_INDEX_SIZE)
41#define PGDIR_SIZE	(1UL << PGDIR_SHIFT)
42#define PGDIR_MASK	(~(PGDIR_SIZE-1))
43
44/* Bits to mask out from a PMD to get to the PTE page */
45#define PMD_MASKED_BITS		0
46/* Bits to mask out from a PUD to get to the PMD page */
47#define PUD_MASKED_BITS		0
48/* Bits to mask out from a P4D to get to the PUD page */
49#define P4D_MASKED_BITS		0
50
51
52/*
53 * 4-level page tables related bits
54 */
55
56#define p4d_none(p4d)		(!p4d_val(p4d))
57#define p4d_bad(p4d)		(p4d_val(p4d) == 0)
58#define p4d_present(p4d)	(p4d_val(p4d) != 0)
59
60#ifndef __ASSEMBLY__
61
62static inline pud_t *p4d_pgtable(p4d_t p4d)
63{
64	return (pud_t *) (p4d_val(p4d) & ~P4D_MASKED_BITS);
65}
66
67static inline void p4d_clear(p4d_t *p4dp)
68{
69	*p4dp = __p4d(0);
70}
71
72static inline pte_t p4d_pte(p4d_t p4d)
73{
74	return __pte(p4d_val(p4d));
75}
76
77static inline p4d_t pte_p4d(pte_t pte)
78{
79	return __p4d(pte_val(pte));
80}
81extern struct page *p4d_page(p4d_t p4d);
82
83#endif /* !__ASSEMBLY__ */
84
85#define pud_ERROR(e) \
86	pr_err("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pud_val(e))
87
88/*
89 * On all 4K setups, remap_4k_pfn() equates to remap_pfn_range() */
90#define remap_4k_pfn(vma, addr, pfn, prot)	\
91	remap_pfn_range((vma), (addr), (pfn), PAGE_SIZE, (prot))
92
93#endif /* _ _ASM_POWERPC_NOHASH_64_PGTABLE_4K_H */
94