1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 *
4 * Copyright IBM Corp. 2007
5 *
6 * Authors: Hollis Blanchard <hollisb@us.ibm.com>
7 */
8
9#ifndef __POWERPC_KVM_HOST_H__
10#define __POWERPC_KVM_HOST_H__
11
12#include <linux/mutex.h>
13#include <linux/hrtimer.h>
14#include <linux/interrupt.h>
15#include <linux/types.h>
16#include <linux/kvm_types.h>
17#include <linux/threads.h>
18#include <linux/spinlock.h>
19#include <linux/kvm_para.h>
20#include <linux/list.h>
21#include <linux/atomic.h>
22#include <asm/kvm_asm.h>
23#include <asm/processor.h>
24#include <asm/page.h>
25#include <asm/cacheflush.h>
26#include <asm/hvcall.h>
27#include <asm/mce.h>
28
29#define KVM_MAX_VCPUS		NR_CPUS
30#define KVM_MAX_VCORES		NR_CPUS
31#define KVM_USER_MEM_SLOTS	512
32
33#include <asm/cputhreads.h>
34
35#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
36#include <asm/kvm_book3s_asm.h>		/* for MAX_SMT_THREADS */
37#define KVM_MAX_VCPU_ID		(MAX_SMT_THREADS * KVM_MAX_VCORES)
38#define KVM_MAX_NESTED_GUESTS	KVMPPC_NR_LPIDS
39
40#else
41#define KVM_MAX_VCPU_ID		KVM_MAX_VCPUS
42#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
43
44#define __KVM_HAVE_ARCH_INTC_INITIALIZED
45
46#define KVM_HALT_POLL_NS_DEFAULT 10000	/* 10 us */
47
48/* These values are internal and can be increased later */
49#define KVM_NR_IRQCHIPS          1
50#define KVM_IRQCHIP_NUM_PINS     256
51
52/* PPC-specific vcpu->requests bit members */
53#define KVM_REQ_WATCHDOG	KVM_ARCH_REQ(0)
54#define KVM_REQ_EPR_EXIT	KVM_ARCH_REQ(1)
55
56#include <linux/mmu_notifier.h>
57
58#define KVM_ARCH_WANT_MMU_NOTIFIER
59
60extern int kvm_unmap_hva_range(struct kvm *kvm,
61			       unsigned long start, unsigned long end,
62			       unsigned flags);
63extern int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end);
64extern int kvm_test_age_hva(struct kvm *kvm, unsigned long hva);
65extern int kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte);
66
67#define HPTEG_CACHE_NUM			(1 << 15)
68#define HPTEG_HASH_BITS_PTE		13
69#define HPTEG_HASH_BITS_PTE_LONG	12
70#define HPTEG_HASH_BITS_VPTE		13
71#define HPTEG_HASH_BITS_VPTE_LONG	5
72#define HPTEG_HASH_BITS_VPTE_64K	11
73#define HPTEG_HASH_NUM_PTE		(1 << HPTEG_HASH_BITS_PTE)
74#define HPTEG_HASH_NUM_PTE_LONG		(1 << HPTEG_HASH_BITS_PTE_LONG)
75#define HPTEG_HASH_NUM_VPTE		(1 << HPTEG_HASH_BITS_VPTE)
76#define HPTEG_HASH_NUM_VPTE_LONG	(1 << HPTEG_HASH_BITS_VPTE_LONG)
77#define HPTEG_HASH_NUM_VPTE_64K		(1 << HPTEG_HASH_BITS_VPTE_64K)
78
79/* Physical Address Mask - allowed range of real mode RAM access */
80#define KVM_PAM			0x0fffffffffffffffULL
81
82struct lppaca;
83struct slb_shadow;
84struct dtl_entry;
85
86struct kvmppc_vcpu_book3s;
87struct kvmppc_book3s_shadow_vcpu;
88struct kvm_nested_guest;
89
90struct kvm_vm_stat {
91	ulong remote_tlb_flush;
92	ulong num_2M_pages;
93	ulong num_1G_pages;
94};
95
96struct kvm_vcpu_stat {
97	u64 sum_exits;
98	u64 mmio_exits;
99	u64 signal_exits;
100	u64 light_exits;
101	/* Account for special types of light exits: */
102	u64 itlb_real_miss_exits;
103	u64 itlb_virt_miss_exits;
104	u64 dtlb_real_miss_exits;
105	u64 dtlb_virt_miss_exits;
106	u64 syscall_exits;
107	u64 isi_exits;
108	u64 dsi_exits;
109	u64 emulated_inst_exits;
110	u64 dec_exits;
111	u64 ext_intr_exits;
112	u64 halt_poll_success_ns;
113	u64 halt_poll_fail_ns;
114	u64 halt_wait_ns;
115	u64 halt_successful_poll;
116	u64 halt_attempted_poll;
117	u64 halt_successful_wait;
118	u64 halt_poll_invalid;
119	u64 halt_wakeup;
120	u64 dbell_exits;
121	u64 gdbell_exits;
122	u64 ld;
123	u64 st;
124#ifdef CONFIG_PPC_BOOK3S
125	u64 pf_storage;
126	u64 pf_instruc;
127	u64 sp_storage;
128	u64 sp_instruc;
129	u64 queue_intr;
130	u64 ld_slow;
131	u64 st_slow;
132#endif
133	u64 pthru_all;
134	u64 pthru_host;
135	u64 pthru_bad_aff;
136};
137
138enum kvm_exit_types {
139	MMIO_EXITS,
140	SIGNAL_EXITS,
141	ITLB_REAL_MISS_EXITS,
142	ITLB_VIRT_MISS_EXITS,
143	DTLB_REAL_MISS_EXITS,
144	DTLB_VIRT_MISS_EXITS,
145	SYSCALL_EXITS,
146	ISI_EXITS,
147	DSI_EXITS,
148	EMULATED_INST_EXITS,
149	EMULATED_MTMSRWE_EXITS,
150	EMULATED_WRTEE_EXITS,
151	EMULATED_MTSPR_EXITS,
152	EMULATED_MFSPR_EXITS,
153	EMULATED_MTMSR_EXITS,
154	EMULATED_MFMSR_EXITS,
155	EMULATED_TLBSX_EXITS,
156	EMULATED_TLBWE_EXITS,
157	EMULATED_RFI_EXITS,
158	EMULATED_RFCI_EXITS,
159	EMULATED_RFDI_EXITS,
160	DEC_EXITS,
161	EXT_INTR_EXITS,
162	HALT_WAKEUP,
163	USR_PR_INST,
164	FP_UNAVAIL,
165	DEBUG_EXITS,
166	TIMEINGUEST,
167	DBELL_EXITS,
168	GDBELL_EXITS,
169	__NUMBER_OF_KVM_EXIT_TYPES
170};
171
172/* allow access to big endian 32bit upper/lower parts and 64bit var */
173struct kvmppc_exit_timing {
174	union {
175		u64 tv64;
176		struct {
177			u32 tbu, tbl;
178		} tv32;
179	};
180};
181
182struct kvmppc_pginfo {
183	unsigned long pfn;
184	atomic_t refcnt;
185};
186
187struct kvmppc_spapr_tce_iommu_table {
188	struct rcu_head rcu;
189	struct list_head next;
190	struct iommu_table *tbl;
191	struct kref kref;
192};
193
194#define TCES_PER_PAGE	(PAGE_SIZE / sizeof(u64))
195
196struct kvmppc_spapr_tce_table {
197	struct list_head list;
198	struct kvm *kvm;
199	u64 liobn;
200	struct rcu_head rcu;
201	u32 page_shift;
202	u64 offset;		/* in pages */
203	u64 size;		/* window size in pages */
204	struct list_head iommu_tables;
205	struct mutex alloc_lock;
206	struct page *pages[0];
207};
208
209/* XICS components, defined in book3s_xics.c */
210struct kvmppc_xics;
211struct kvmppc_icp;
212extern struct kvm_device_ops kvm_xics_ops;
213
214/* XIVE components, defined in book3s_xive.c */
215struct kvmppc_xive;
216struct kvmppc_xive_vcpu;
217extern struct kvm_device_ops kvm_xive_ops;
218extern struct kvm_device_ops kvm_xive_native_ops;
219
220struct kvmppc_passthru_irqmap;
221
222/*
223 * The reverse mapping array has one entry for each HPTE,
224 * which stores the guest's view of the second word of the HPTE
225 * (including the guest physical address of the mapping),
226 * plus forward and backward pointers in a doubly-linked ring
227 * of HPTEs that map the same host page.  The pointers in this
228 * ring are 32-bit HPTE indexes, to save space.
229 */
230struct revmap_entry {
231	unsigned long guest_rpte;
232	unsigned int forw, back;
233};
234
235/*
236 * The rmap array of size number of guest pages is allocated for each memslot.
237 * This array is used to store usage specific information about the guest page.
238 * Below are the encodings of the various possible usage types.
239 */
240/* Free bits which can be used to define a new usage */
241#define KVMPPC_RMAP_TYPE_MASK	0xff00000000000000
242#define KVMPPC_RMAP_NESTED	0xc000000000000000	/* Nested rmap array */
243#define KVMPPC_RMAP_HPT		0x0100000000000000	/* HPT guest */
244
245/*
246 * rmap usage definition for a hash page table (hpt) guest:
247 * 0x0000080000000000	Lock bit
248 * 0x0000018000000000	RC bits
249 * 0x0000000100000000	Present bit
250 * 0x00000000ffffffff	HPT index bits
251 * The bottom 32 bits are the index in the guest HPT of a HPTE that points to
252 * the page.
253 */
254#define KVMPPC_RMAP_LOCK_BIT	43
255#define KVMPPC_RMAP_RC_SHIFT	32
256#define KVMPPC_RMAP_REFERENCED	(HPTE_R_R << KVMPPC_RMAP_RC_SHIFT)
257#define KVMPPC_RMAP_PRESENT	0x100000000ul
258#define KVMPPC_RMAP_INDEX	0xfffffffful
259
260struct kvm_arch_memory_slot {
261#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
262	unsigned long *rmap;
263#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
264};
265
266struct kvm_hpt_info {
267	/* Host virtual (linear mapping) address of guest HPT */
268	unsigned long virt;
269	/* Array of reverse mapping entries for each guest HPTE */
270	struct revmap_entry *rev;
271	/* Guest HPT size is 2**(order) bytes */
272	u32 order;
273	/* 1 if HPT allocated with CMA, 0 otherwise */
274	int cma;
275};
276
277struct kvm_resize_hpt;
278
279/* Flag values for kvm_arch.secure_guest */
280#define KVMPPC_SECURE_INIT_START 0x1 /* H_SVM_INIT_START has been called */
281#define KVMPPC_SECURE_INIT_DONE  0x2 /* H_SVM_INIT_DONE completed */
282#define KVMPPC_SECURE_INIT_ABORT 0x4 /* H_SVM_INIT_ABORT issued */
283
284struct kvm_arch {
285	unsigned int lpid;
286	unsigned int smt_mode;		/* # vcpus per virtual core */
287	unsigned int emul_smt_mode;	/* emualted SMT mode, on P9 */
288#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
289	unsigned int tlb_sets;
290	struct kvm_hpt_info hpt;
291	atomic64_t mmio_update;
292	unsigned int host_lpid;
293	unsigned long host_lpcr;
294	unsigned long sdr1;
295	unsigned long host_sdr1;
296	unsigned long lpcr;
297	unsigned long vrma_slb_v;
298	int mmu_ready;
299	atomic_t vcpus_running;
300	u32 online_vcores;
301	atomic_t hpte_mod_interest;
302	cpumask_t need_tlb_flush;
303	cpumask_t cpu_in_guest;
304	u8 radix;
305	u8 fwnmi_enabled;
306	u8 secure_guest;
307	u8 svm_enabled;
308	bool threads_indep;
309	bool nested_enable;
310	pgd_t *pgtable;
311	u64 process_table;
312	struct dentry *debugfs_dir;
313	struct kvm_resize_hpt *resize_hpt; /* protected by kvm->lock */
314#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
315#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
316	struct mutex hpt_mutex;
317#endif
318#ifdef CONFIG_PPC_BOOK3S_64
319	struct list_head spapr_tce_tables;
320	struct list_head rtas_tokens;
321	struct mutex rtas_token_lock;
322	DECLARE_BITMAP(enabled_hcalls, MAX_HCALL_OPCODE/4 + 1);
323#endif
324#ifdef CONFIG_KVM_MPIC
325	struct openpic *mpic;
326#endif
327#ifdef CONFIG_KVM_XICS
328	struct kvmppc_xics *xics;
329	struct kvmppc_xics *xics_device;
330	struct kvmppc_xive *xive;    /* Current XIVE device in use */
331	struct {
332		struct kvmppc_xive *native;
333		struct kvmppc_xive *xics_on_xive;
334	} xive_devices;
335	struct kvmppc_passthru_irqmap *pimap;
336#endif
337	struct kvmppc_ops *kvm_ops;
338#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
339	struct mutex uvmem_lock;
340	struct list_head uvmem_pfns;
341	struct mutex mmu_setup_lock;	/* nests inside vcpu mutexes */
342	u64 l1_ptcr;
343	int max_nested_lpid;
344	struct kvm_nested_guest *nested_guests[KVM_MAX_NESTED_GUESTS];
345	/* This array can grow quite large, keep it at the end */
346	struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
347#endif
348};
349
350#define VCORE_ENTRY_MAP(vc)	((vc)->entry_exit_map & 0xff)
351#define VCORE_EXIT_MAP(vc)	((vc)->entry_exit_map >> 8)
352#define VCORE_IS_EXITING(vc)	(VCORE_EXIT_MAP(vc) != 0)
353
354/* This bit is used when a vcore exit is triggered from outside the vcore */
355#define VCORE_EXIT_REQ		0x10000
356
357/*
358 * Values for vcore_state.
359 * Note that these are arranged such that lower values
360 * (< VCORE_SLEEPING) don't require stolen time accounting
361 * on load/unload, and higher values do.
362 */
363#define VCORE_INACTIVE	0
364#define VCORE_PREEMPT	1
365#define VCORE_PIGGYBACK	2
366#define VCORE_SLEEPING	3
367#define VCORE_RUNNING	4
368#define VCORE_EXITING	5
369#define VCORE_POLLING	6
370
371/*
372 * Struct used to manage memory for a virtual processor area
373 * registered by a PAPR guest.  There are three types of area
374 * that a guest can register.
375 */
376struct kvmppc_vpa {
377	unsigned long gpa;	/* Current guest phys addr */
378	void *pinned_addr;	/* Address in kernel linear mapping */
379	void *pinned_end;	/* End of region */
380	unsigned long next_gpa;	/* Guest phys addr for update */
381	unsigned long len;	/* Number of bytes required */
382	u8 update_pending;	/* 1 => update pinned_addr from next_gpa */
383	bool dirty;		/* true => area has been modified by kernel */
384};
385
386struct kvmppc_pte {
387	ulong eaddr;
388	u64 vpage;
389	ulong raddr;
390	bool may_read		: 1;
391	bool may_write		: 1;
392	bool may_execute	: 1;
393	unsigned long wimg;
394	unsigned long rc;
395	u8 page_size;		/* MMU_PAGE_xxx */
396	u8 page_shift;
397};
398
399struct kvmppc_mmu {
400	/* book3s_64 only */
401	void (*slbmte)(struct kvm_vcpu *vcpu, u64 rb, u64 rs);
402	u64  (*slbmfee)(struct kvm_vcpu *vcpu, u64 slb_nr);
403	u64  (*slbmfev)(struct kvm_vcpu *vcpu, u64 slb_nr);
404	int  (*slbfee)(struct kvm_vcpu *vcpu, gva_t eaddr, ulong *ret_slb);
405	void (*slbie)(struct kvm_vcpu *vcpu, u64 slb_nr);
406	void (*slbia)(struct kvm_vcpu *vcpu);
407	/* book3s */
408	void (*mtsrin)(struct kvm_vcpu *vcpu, u32 srnum, ulong value);
409	u32  (*mfsrin)(struct kvm_vcpu *vcpu, u32 srnum);
410	int  (*xlate)(struct kvm_vcpu *vcpu, gva_t eaddr,
411		      struct kvmppc_pte *pte, bool data, bool iswrite);
412	void (*tlbie)(struct kvm_vcpu *vcpu, ulong addr, bool large);
413	int  (*esid_to_vsid)(struct kvm_vcpu *vcpu, ulong esid, u64 *vsid);
414	u64  (*ea_to_vp)(struct kvm_vcpu *vcpu, gva_t eaddr, bool data);
415	bool (*is_dcbz32)(struct kvm_vcpu *vcpu);
416};
417
418struct kvmppc_slb {
419	u64 esid;
420	u64 vsid;
421	u64 orige;
422	u64 origv;
423	bool valid	: 1;
424	bool Ks		: 1;
425	bool Kp		: 1;
426	bool nx		: 1;
427	bool large	: 1;	/* PTEs are 16MB */
428	bool tb		: 1;	/* 1TB segment */
429	bool class	: 1;
430	u8 base_page_size;	/* MMU_PAGE_xxx */
431};
432
433/* Struct used to accumulate timing information in HV real mode code */
434struct kvmhv_tb_accumulator {
435	u64	seqcount;	/* used to synchronize access, also count * 2 */
436	u64	tb_total;	/* total time in timebase ticks */
437	u64	tb_min;		/* min time */
438	u64	tb_max;		/* max time */
439};
440
441#ifdef CONFIG_PPC_BOOK3S_64
442struct kvmppc_irq_map {
443	u32	r_hwirq;
444	u32	v_hwirq;
445	struct irq_desc *desc;
446};
447
448#define	KVMPPC_PIRQ_MAPPED	1024
449struct kvmppc_passthru_irqmap {
450	int n_mapped;
451	struct kvmppc_irq_map mapped[KVMPPC_PIRQ_MAPPED];
452};
453#endif
454
455# ifdef CONFIG_PPC_FSL_BOOK3E
456#define KVMPPC_BOOKE_IAC_NUM	2
457#define KVMPPC_BOOKE_DAC_NUM	2
458# else
459#define KVMPPC_BOOKE_IAC_NUM	4
460#define KVMPPC_BOOKE_DAC_NUM	2
461# endif
462#define KVMPPC_BOOKE_MAX_IAC	4
463#define KVMPPC_BOOKE_MAX_DAC	2
464
465/* KVMPPC_EPR_USER takes precedence over KVMPPC_EPR_KERNEL */
466#define KVMPPC_EPR_NONE		0 /* EPR not supported */
467#define KVMPPC_EPR_USER		1 /* exit to userspace to fill EPR */
468#define KVMPPC_EPR_KERNEL	2 /* in-kernel irqchip */
469
470#define KVMPPC_IRQ_DEFAULT	0
471#define KVMPPC_IRQ_MPIC		1
472#define KVMPPC_IRQ_XICS		2 /* Includes a XIVE option */
473#define KVMPPC_IRQ_XIVE		3 /* XIVE native exploitation mode */
474
475#define MMIO_HPTE_CACHE_SIZE	4
476
477struct mmio_hpte_cache_entry {
478	unsigned long hpte_v;
479	unsigned long hpte_r;
480	unsigned long rpte;
481	unsigned long pte_index;
482	unsigned long eaddr;
483	unsigned long slb_v;
484	long mmio_update;
485	unsigned int slb_base_pshift;
486};
487
488struct mmio_hpte_cache {
489	struct mmio_hpte_cache_entry entry[MMIO_HPTE_CACHE_SIZE];
490	unsigned int index;
491};
492
493#define KVMPPC_VSX_COPY_NONE		0
494#define KVMPPC_VSX_COPY_WORD		1
495#define KVMPPC_VSX_COPY_DWORD		2
496#define KVMPPC_VSX_COPY_DWORD_LOAD_DUMP	3
497#define KVMPPC_VSX_COPY_WORD_LOAD_DUMP	4
498
499#define KVMPPC_VMX_COPY_BYTE		8
500#define KVMPPC_VMX_COPY_HWORD		9
501#define KVMPPC_VMX_COPY_WORD		10
502#define KVMPPC_VMX_COPY_DWORD		11
503
504struct openpic;
505
506/* W0 and W1 of a XIVE thread management context */
507union xive_tma_w01 {
508	struct {
509		u8	nsr;
510		u8	cppr;
511		u8	ipb;
512		u8	lsmfb;
513		u8	ack;
514		u8	inc;
515		u8	age;
516		u8	pipr;
517	};
518	__be64 w01;
519};
520
521struct kvm_vcpu_arch {
522	ulong host_stack;
523	u32 host_pid;
524#ifdef CONFIG_PPC_BOOK3S
525	struct kvmppc_slb slb[64];
526	int slb_max;		/* 1 + index of last valid entry in slb[] */
527	int slb_nr;		/* total number of entries in SLB */
528	struct kvmppc_mmu mmu;
529	struct kvmppc_vcpu_book3s *book3s;
530#endif
531#ifdef CONFIG_PPC_BOOK3S_32
532	struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
533#endif
534
535	struct pt_regs regs;
536
537	struct thread_fp_state fp;
538
539#ifdef CONFIG_SPE
540	ulong evr[32];
541	ulong spefscr;
542	ulong host_spefscr;
543	u64 acc;
544#endif
545#ifdef CONFIG_ALTIVEC
546	struct thread_vr_state vr;
547#endif
548
549#ifdef CONFIG_KVM_BOOKE_HV
550	u32 host_mas4;
551	u32 host_mas6;
552	u32 shadow_epcr;
553	u32 shadow_msrp;
554	u32 eplc;
555	u32 epsc;
556	u32 oldpir;
557#endif
558
559#if defined(CONFIG_BOOKE)
560#if defined(CONFIG_KVM_BOOKE_HV) || defined(CONFIG_64BIT)
561	u32 epcr;
562#endif
563#endif
564
565#ifdef CONFIG_PPC_BOOK3S
566	/* For Gekko paired singles */
567	u32 qpr[32];
568#endif
569
570#ifdef CONFIG_PPC_BOOK3S
571	ulong tar;
572#endif
573
574#ifdef CONFIG_PPC_BOOK3S
575	ulong hflags;
576	ulong guest_owned_ext;
577	ulong purr;
578	ulong spurr;
579	ulong ic;
580	ulong dscr;
581	ulong amr;
582	ulong uamor;
583	ulong iamr;
584	u32 ctrl;
585	u32 dabrx;
586	ulong dabr;
587	ulong dawr;
588	ulong dawrx;
589	ulong ciabr;
590	ulong cfar;
591	ulong ppr;
592	u32 pspb;
593	ulong fscr;
594	ulong shadow_fscr;
595	ulong ebbhr;
596	ulong ebbrr;
597	ulong bescr;
598	ulong csigr;
599	ulong tacr;
600	ulong tcscr;
601	ulong acop;
602	ulong wort;
603	ulong tid;
604	ulong psscr;
605	ulong hfscr;
606	ulong shadow_srr1;
607#endif
608	u32 vrsave; /* also USPRG0 */
609	u32 mmucr;
610	/* shadow_msr is unused for BookE HV */
611	ulong shadow_msr;
612	ulong csrr0;
613	ulong csrr1;
614	ulong dsrr0;
615	ulong dsrr1;
616	ulong mcsrr0;
617	ulong mcsrr1;
618	ulong mcsr;
619	ulong dec;
620#ifdef CONFIG_BOOKE
621	u32 decar;
622#endif
623	/* Time base value when we entered the guest */
624	u64 entry_tb;
625	u64 entry_vtb;
626	u64 entry_ic;
627	u32 tcr;
628	ulong tsr; /* we need to perform set/clr_bits() which requires ulong */
629	u32 ivor[64];
630	ulong ivpr;
631	u32 pvr;
632
633	u32 shadow_pid;
634	u32 shadow_pid1;
635	u32 pid;
636	u32 swap_pid;
637
638	u32 ccr0;
639	u32 ccr1;
640	u32 dbsr;
641
642	u64 mmcr[4];	/* MMCR0, MMCR1, MMCR2, MMCR3 */
643	u64 mmcra;
644	u64 mmcrs;
645	u32 pmc[8];
646	u32 spmc[2];
647	u64 siar;
648	u64 sdar;
649	u64 sier[3];
650#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
651	u64 tfhar;
652	u64 texasr;
653	u64 tfiar;
654	u64 orig_texasr;
655
656	u32 cr_tm;
657	u64 xer_tm;
658	u64 lr_tm;
659	u64 ctr_tm;
660	u64 amr_tm;
661	u64 ppr_tm;
662	u64 dscr_tm;
663	u64 tar_tm;
664
665	ulong gpr_tm[32];
666
667	struct thread_fp_state fp_tm;
668
669	struct thread_vr_state vr_tm;
670	u32 vrsave_tm; /* also USPRG0 */
671#endif
672
673#ifdef CONFIG_KVM_EXIT_TIMING
674	struct mutex exit_timing_lock;
675	struct kvmppc_exit_timing timing_exit;
676	struct kvmppc_exit_timing timing_last_enter;
677	u32 last_exit_type;
678	u32 timing_count_type[__NUMBER_OF_KVM_EXIT_TYPES];
679	u64 timing_sum_duration[__NUMBER_OF_KVM_EXIT_TYPES];
680	u64 timing_sum_quad_duration[__NUMBER_OF_KVM_EXIT_TYPES];
681	u64 timing_min_duration[__NUMBER_OF_KVM_EXIT_TYPES];
682	u64 timing_max_duration[__NUMBER_OF_KVM_EXIT_TYPES];
683	u64 timing_last_exit;
684	struct dentry *debugfs_exit_timing;
685#endif
686
687#ifdef CONFIG_PPC_BOOK3S
688	ulong fault_dar;
689	u32 fault_dsisr;
690	unsigned long intr_msr;
691	ulong fault_gpa;	/* guest real address of page fault (POWER9) */
692#endif
693
694#ifdef CONFIG_BOOKE
695	ulong fault_dear;
696	ulong fault_esr;
697	ulong queued_dear;
698	ulong queued_esr;
699	spinlock_t wdt_lock;
700	struct timer_list wdt_timer;
701	u32 tlbcfg[4];
702	u32 tlbps[4];
703	u32 mmucfg;
704	u32 eptcfg;
705	u32 epr;
706	u64 sprg9;
707	u32 pwrmgtcr0;
708	u32 crit_save;
709	/* guest debug registers*/
710	struct debug_reg dbg_reg;
711#endif
712	gpa_t paddr_accessed;
713	gva_t vaddr_accessed;
714	pgd_t *pgdir;
715
716	u16 io_gpr; /* GPR used as IO source/target */
717	u8 mmio_host_swabbed;
718	u8 mmio_sign_extend;
719	/* conversion between single and double precision */
720	u8 mmio_sp64_extend;
721	/*
722	 * Number of simulations for vsx.
723	 * If we use 2*8bytes to simulate 1*16bytes,
724	 * then the number should be 2 and
725	 * mmio_copy_type=KVMPPC_VSX_COPY_DWORD.
726	 * If we use 4*4bytes to simulate 1*16bytes,
727	 * the number should be 4 and
728	 * mmio_vsx_copy_type=KVMPPC_VSX_COPY_WORD.
729	 */
730	u8 mmio_vsx_copy_nums;
731	u8 mmio_vsx_offset;
732	u8 mmio_vmx_copy_nums;
733	u8 mmio_vmx_offset;
734	u8 mmio_copy_type;
735	u8 osi_needed;
736	u8 osi_enabled;
737	u8 papr_enabled;
738	u8 watchdog_enabled;
739	u8 sane;
740	u8 cpu_type;
741	u8 hcall_needed;
742	u8 epr_flags; /* KVMPPC_EPR_xxx */
743	u8 epr_needed;
744	u8 external_oneshot;	/* clear external irq after delivery */
745
746	u32 cpr0_cfgaddr; /* holds the last set cpr0_cfgaddr */
747
748	struct hrtimer dec_timer;
749	u64 dec_jiffies;
750	u64 dec_expires;
751	unsigned long pending_exceptions;
752	u8 ceded;
753	u8 prodded;
754	u8 doorbell_request;
755	u8 irq_pending; /* Used by XIVE to signal pending guest irqs */
756	u32 last_inst;
757
758	struct rcuwait *waitp;
759	struct kvmppc_vcore *vcore;
760	int ret;
761	int trap;
762	int state;
763	int ptid;
764	int thread_cpu;
765	int prev_cpu;
766	bool timer_running;
767	wait_queue_head_t cpu_run;
768	struct machine_check_event mce_evt; /* Valid if trap == 0x200 */
769
770	struct kvm_vcpu_arch_shared *shared;
771#if defined(CONFIG_PPC_BOOK3S_64) && defined(CONFIG_KVM_BOOK3S_PR_POSSIBLE)
772	bool shared_big_endian;
773#endif
774	unsigned long magic_page_pa; /* phys addr to map the magic page to */
775	unsigned long magic_page_ea; /* effect. addr to map the magic page to */
776	bool disable_kernel_nx;
777
778	int irq_type;		/* one of KVM_IRQ_* */
779	int irq_cpu_id;
780	struct openpic *mpic;	/* KVM_IRQ_MPIC */
781#ifdef CONFIG_KVM_XICS
782	struct kvmppc_icp *icp; /* XICS presentation controller */
783	struct kvmppc_xive_vcpu *xive_vcpu; /* XIVE virtual CPU data */
784	__be32 xive_cam_word;    /* Cooked W2 in proper endian with valid bit */
785	u8 xive_pushed;		 /* Is the VP pushed on the physical CPU ? */
786	u8 xive_esc_on;		 /* Is the escalation irq enabled ? */
787	union xive_tma_w01 xive_saved_state; /* W0..1 of XIVE thread state */
788	u64 xive_esc_raddr;	 /* Escalation interrupt ESB real addr */
789	u64 xive_esc_vaddr;	 /* Escalation interrupt ESB virt addr */
790#endif
791
792#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
793	struct kvm_vcpu_arch_shared shregs;
794
795	struct mmio_hpte_cache mmio_cache;
796	unsigned long pgfault_addr;
797	long pgfault_index;
798	unsigned long pgfault_hpte[2];
799	struct mmio_hpte_cache_entry *pgfault_cache;
800
801	struct task_struct *run_task;
802
803	spinlock_t vpa_update_lock;
804	struct kvmppc_vpa vpa;
805	struct kvmppc_vpa dtl;
806	struct dtl_entry *dtl_ptr;
807	unsigned long dtl_index;
808	u64 stolen_logged;
809	struct kvmppc_vpa slb_shadow;
810
811	spinlock_t tbacct_lock;
812	u64 busy_stolen;
813	u64 busy_preempt;
814
815	u32 emul_inst;
816
817	u32 online;
818
819	/* For support of nested guests */
820	struct kvm_nested_guest *nested;
821	u32 nested_vcpu_id;
822	gpa_t nested_io_gpr;
823#endif
824
825#ifdef CONFIG_KVM_BOOK3S_HV_EXIT_TIMING
826	struct kvmhv_tb_accumulator *cur_activity;	/* What we're timing */
827	u64	cur_tb_start;			/* when it started */
828	struct kvmhv_tb_accumulator rm_entry;	/* real-mode entry code */
829	struct kvmhv_tb_accumulator rm_intr;	/* real-mode intr handling */
830	struct kvmhv_tb_accumulator rm_exit;	/* real-mode exit code */
831	struct kvmhv_tb_accumulator guest_time;	/* guest execution */
832	struct kvmhv_tb_accumulator cede_time;	/* time napping inside guest */
833
834	struct dentry *debugfs_dir;
835#endif /* CONFIG_KVM_BOOK3S_HV_EXIT_TIMING */
836};
837
838#define VCPU_FPR(vcpu, i)	(vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
839#define VCPU_VSX_FPR(vcpu, i, j)	((vcpu)->arch.fp.fpr[i][j])
840#define VCPU_VSX_VR(vcpu, i)		((vcpu)->arch.vr.vr[i])
841
842/* Values for vcpu->arch.state */
843#define KVMPPC_VCPU_NOTREADY		0
844#define KVMPPC_VCPU_RUNNABLE		1
845#define KVMPPC_VCPU_BUSY_IN_HOST	2
846
847/* Values for vcpu->arch.io_gpr */
848#define KVM_MMIO_REG_MASK	0x003f
849#define KVM_MMIO_REG_EXT_MASK	0xffc0
850#define KVM_MMIO_REG_GPR	0x0000
851#define KVM_MMIO_REG_FPR	0x0040
852#define KVM_MMIO_REG_QPR	0x0080
853#define KVM_MMIO_REG_FQPR	0x00c0
854#define KVM_MMIO_REG_VSX	0x0100
855#define KVM_MMIO_REG_VMX	0x0180
856#define KVM_MMIO_REG_NESTED_GPR	0xffc0
857
858
859#define __KVM_HAVE_ARCH_WQP
860#define __KVM_HAVE_CREATE_DEVICE
861
862static inline void kvm_arch_hardware_disable(void) {}
863static inline void kvm_arch_hardware_unsetup(void) {}
864static inline void kvm_arch_sync_events(struct kvm *kvm) {}
865static inline void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen) {}
866static inline void kvm_arch_flush_shadow_all(struct kvm *kvm) {}
867static inline void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu) {}
868static inline void kvm_arch_exit(void) {}
869static inline void kvm_arch_vcpu_blocking(struct kvm_vcpu *vcpu) {}
870static inline void kvm_arch_vcpu_unblocking(struct kvm_vcpu *vcpu) {}
871static inline void kvm_arch_vcpu_block_finish(struct kvm_vcpu *vcpu) {}
872
873#endif /* __POWERPC_KVM_HOST_H__ */
874