18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2001 Mike Corrigan & Dave Engebretsen, IBM Corporation 48c2ecf20Sopenharmony_ci * Rewrite, cleanup: 58c2ecf20Sopenharmony_ci * Copyright (C) 2004 Olof Johansson <olof@lixom.net>, IBM Corporation 68c2ecf20Sopenharmony_ci */ 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#ifndef _ASM_IOMMU_H 98c2ecf20Sopenharmony_ci#define _ASM_IOMMU_H 108c2ecf20Sopenharmony_ci#ifdef __KERNEL__ 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#include <linux/compiler.h> 138c2ecf20Sopenharmony_ci#include <linux/spinlock.h> 148c2ecf20Sopenharmony_ci#include <linux/device.h> 158c2ecf20Sopenharmony_ci#include <linux/dma-map-ops.h> 168c2ecf20Sopenharmony_ci#include <linux/bitops.h> 178c2ecf20Sopenharmony_ci#include <asm/machdep.h> 188c2ecf20Sopenharmony_ci#include <asm/types.h> 198c2ecf20Sopenharmony_ci#include <asm/pci-bridge.h> 208c2ecf20Sopenharmony_ci#include <asm/asm-const.h> 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#define IOMMU_PAGE_SHIFT_4K 12 238c2ecf20Sopenharmony_ci#define IOMMU_PAGE_SIZE_4K (ASM_CONST(1) << IOMMU_PAGE_SHIFT_4K) 248c2ecf20Sopenharmony_ci#define IOMMU_PAGE_MASK_4K (~((1 << IOMMU_PAGE_SHIFT_4K) - 1)) 258c2ecf20Sopenharmony_ci#define IOMMU_PAGE_ALIGN_4K(addr) ALIGN(addr, IOMMU_PAGE_SIZE_4K) 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#define IOMMU_PAGE_SIZE(tblptr) (ASM_CONST(1) << (tblptr)->it_page_shift) 288c2ecf20Sopenharmony_ci#define IOMMU_PAGE_MASK(tblptr) (~((1 << (tblptr)->it_page_shift) - 1)) 298c2ecf20Sopenharmony_ci#define IOMMU_PAGE_ALIGN(addr, tblptr) ALIGN(addr, IOMMU_PAGE_SIZE(tblptr)) 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci/* Boot time flags */ 328c2ecf20Sopenharmony_ciextern int iommu_is_off; 338c2ecf20Sopenharmony_ciextern int iommu_force_on; 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_cistruct iommu_table_ops { 368c2ecf20Sopenharmony_ci /* 378c2ecf20Sopenharmony_ci * When called with direction==DMA_NONE, it is equal to clear(). 388c2ecf20Sopenharmony_ci * uaddr is a linear map address. 398c2ecf20Sopenharmony_ci */ 408c2ecf20Sopenharmony_ci int (*set)(struct iommu_table *tbl, 418c2ecf20Sopenharmony_ci long index, long npages, 428c2ecf20Sopenharmony_ci unsigned long uaddr, 438c2ecf20Sopenharmony_ci enum dma_data_direction direction, 448c2ecf20Sopenharmony_ci unsigned long attrs); 458c2ecf20Sopenharmony_ci#ifdef CONFIG_IOMMU_API 468c2ecf20Sopenharmony_ci /* 478c2ecf20Sopenharmony_ci * Exchanges existing TCE with new TCE plus direction bits; 488c2ecf20Sopenharmony_ci * returns old TCE and DMA direction mask. 498c2ecf20Sopenharmony_ci * @tce is a physical address. 508c2ecf20Sopenharmony_ci */ 518c2ecf20Sopenharmony_ci int (*xchg_no_kill)(struct iommu_table *tbl, 528c2ecf20Sopenharmony_ci long index, 538c2ecf20Sopenharmony_ci unsigned long *hpa, 548c2ecf20Sopenharmony_ci enum dma_data_direction *direction, 558c2ecf20Sopenharmony_ci bool realmode); 568c2ecf20Sopenharmony_ci 578c2ecf20Sopenharmony_ci void (*tce_kill)(struct iommu_table *tbl, 588c2ecf20Sopenharmony_ci unsigned long index, 598c2ecf20Sopenharmony_ci unsigned long pages, 608c2ecf20Sopenharmony_ci bool realmode); 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci __be64 *(*useraddrptr)(struct iommu_table *tbl, long index, bool alloc); 638c2ecf20Sopenharmony_ci#endif 648c2ecf20Sopenharmony_ci void (*clear)(struct iommu_table *tbl, 658c2ecf20Sopenharmony_ci long index, long npages); 668c2ecf20Sopenharmony_ci /* get() returns a physical address */ 678c2ecf20Sopenharmony_ci unsigned long (*get)(struct iommu_table *tbl, long index); 688c2ecf20Sopenharmony_ci void (*flush)(struct iommu_table *tbl); 698c2ecf20Sopenharmony_ci void (*free)(struct iommu_table *tbl); 708c2ecf20Sopenharmony_ci}; 718c2ecf20Sopenharmony_ci 728c2ecf20Sopenharmony_ci/* These are used by VIO */ 738c2ecf20Sopenharmony_ciextern struct iommu_table_ops iommu_table_lpar_multi_ops; 748c2ecf20Sopenharmony_ciextern struct iommu_table_ops iommu_table_pseries_ops; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci/* 778c2ecf20Sopenharmony_ci * IOMAP_MAX_ORDER defines the largest contiguous block 788c2ecf20Sopenharmony_ci * of dma space we can get. IOMAP_MAX_ORDER = 13 798c2ecf20Sopenharmony_ci * allows up to 2**12 pages (4096 * 4096) = 16 MB 808c2ecf20Sopenharmony_ci */ 818c2ecf20Sopenharmony_ci#define IOMAP_MAX_ORDER 13 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci#define IOMMU_POOL_HASHBITS 2 848c2ecf20Sopenharmony_ci#define IOMMU_NR_POOLS (1 << IOMMU_POOL_HASHBITS) 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_cistruct iommu_pool { 878c2ecf20Sopenharmony_ci unsigned long start; 888c2ecf20Sopenharmony_ci unsigned long end; 898c2ecf20Sopenharmony_ci unsigned long hint; 908c2ecf20Sopenharmony_ci spinlock_t lock; 918c2ecf20Sopenharmony_ci} ____cacheline_aligned_in_smp; 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_cistruct iommu_table { 948c2ecf20Sopenharmony_ci unsigned long it_busno; /* Bus number this table belongs to */ 958c2ecf20Sopenharmony_ci unsigned long it_size; /* Size of iommu table in entries */ 968c2ecf20Sopenharmony_ci unsigned long it_indirect_levels; 978c2ecf20Sopenharmony_ci unsigned long it_level_size; 988c2ecf20Sopenharmony_ci unsigned long it_allocated_size; 998c2ecf20Sopenharmony_ci unsigned long it_offset; /* Offset into global table */ 1008c2ecf20Sopenharmony_ci unsigned long it_base; /* mapped address of tce table */ 1018c2ecf20Sopenharmony_ci unsigned long it_index; /* which iommu table this is */ 1028c2ecf20Sopenharmony_ci unsigned long it_type; /* type: PCI or Virtual Bus */ 1038c2ecf20Sopenharmony_ci unsigned long it_blocksize; /* Entries in each block (cacheline) */ 1048c2ecf20Sopenharmony_ci unsigned long poolsize; 1058c2ecf20Sopenharmony_ci unsigned long nr_pools; 1068c2ecf20Sopenharmony_ci struct iommu_pool large_pool; 1078c2ecf20Sopenharmony_ci struct iommu_pool pools[IOMMU_NR_POOLS]; 1088c2ecf20Sopenharmony_ci unsigned long *it_map; /* A simple allocation bitmap for now */ 1098c2ecf20Sopenharmony_ci unsigned long it_page_shift;/* table iommu page size */ 1108c2ecf20Sopenharmony_ci struct list_head it_group_list;/* List of iommu_table_group_link */ 1118c2ecf20Sopenharmony_ci __be64 *it_userspace; /* userspace view of the table */ 1128c2ecf20Sopenharmony_ci struct iommu_table_ops *it_ops; 1138c2ecf20Sopenharmony_ci struct kref it_kref; 1148c2ecf20Sopenharmony_ci int it_nid; 1158c2ecf20Sopenharmony_ci unsigned long it_reserved_start; /* Start of not-DMA-able (MMIO) area */ 1168c2ecf20Sopenharmony_ci unsigned long it_reserved_end; 1178c2ecf20Sopenharmony_ci}; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci#define IOMMU_TABLE_USERSPACE_ENTRY_RO(tbl, entry) \ 1208c2ecf20Sopenharmony_ci ((tbl)->it_ops->useraddrptr((tbl), (entry), false)) 1218c2ecf20Sopenharmony_ci#define IOMMU_TABLE_USERSPACE_ENTRY(tbl, entry) \ 1228c2ecf20Sopenharmony_ci ((tbl)->it_ops->useraddrptr((tbl), (entry), true)) 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ci/* Pure 2^n version of get_order */ 1258c2ecf20Sopenharmony_cistatic inline __attribute_const__ 1268c2ecf20Sopenharmony_ciint get_iommu_order(unsigned long size, struct iommu_table *tbl) 1278c2ecf20Sopenharmony_ci{ 1288c2ecf20Sopenharmony_ci return __ilog2((size - 1) >> tbl->it_page_shift) + 1; 1298c2ecf20Sopenharmony_ci} 1308c2ecf20Sopenharmony_ci 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_cistruct scatterlist; 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ci#ifdef CONFIG_PPC64 1358c2ecf20Sopenharmony_ci 1368c2ecf20Sopenharmony_cistatic inline void set_iommu_table_base(struct device *dev, 1378c2ecf20Sopenharmony_ci struct iommu_table *base) 1388c2ecf20Sopenharmony_ci{ 1398c2ecf20Sopenharmony_ci dev->archdata.iommu_table_base = base; 1408c2ecf20Sopenharmony_ci} 1418c2ecf20Sopenharmony_ci 1428c2ecf20Sopenharmony_cistatic inline void *get_iommu_table_base(struct device *dev) 1438c2ecf20Sopenharmony_ci{ 1448c2ecf20Sopenharmony_ci return dev->archdata.iommu_table_base; 1458c2ecf20Sopenharmony_ci} 1468c2ecf20Sopenharmony_ci 1478c2ecf20Sopenharmony_ciextern int dma_iommu_dma_supported(struct device *dev, u64 mask); 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ciextern struct iommu_table *iommu_tce_table_get(struct iommu_table *tbl); 1508c2ecf20Sopenharmony_ciextern int iommu_tce_table_put(struct iommu_table *tbl); 1518c2ecf20Sopenharmony_ci 1528c2ecf20Sopenharmony_ci/* Initializes an iommu_table based in values set in the passed-in 1538c2ecf20Sopenharmony_ci * structure 1548c2ecf20Sopenharmony_ci */ 1558c2ecf20Sopenharmony_ciextern struct iommu_table *iommu_init_table(struct iommu_table *tbl, 1568c2ecf20Sopenharmony_ci int nid, unsigned long res_start, unsigned long res_end); 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci#define IOMMU_TABLE_GROUP_MAX_TABLES 2 1598c2ecf20Sopenharmony_ci 1608c2ecf20Sopenharmony_cistruct iommu_table_group; 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_cistruct iommu_table_group_ops { 1638c2ecf20Sopenharmony_ci unsigned long (*get_table_size)( 1648c2ecf20Sopenharmony_ci __u32 page_shift, 1658c2ecf20Sopenharmony_ci __u64 window_size, 1668c2ecf20Sopenharmony_ci __u32 levels); 1678c2ecf20Sopenharmony_ci long (*create_table)(struct iommu_table_group *table_group, 1688c2ecf20Sopenharmony_ci int num, 1698c2ecf20Sopenharmony_ci __u32 page_shift, 1708c2ecf20Sopenharmony_ci __u64 window_size, 1718c2ecf20Sopenharmony_ci __u32 levels, 1728c2ecf20Sopenharmony_ci struct iommu_table **ptbl); 1738c2ecf20Sopenharmony_ci long (*set_window)(struct iommu_table_group *table_group, 1748c2ecf20Sopenharmony_ci int num, 1758c2ecf20Sopenharmony_ci struct iommu_table *tblnew); 1768c2ecf20Sopenharmony_ci long (*unset_window)(struct iommu_table_group *table_group, 1778c2ecf20Sopenharmony_ci int num); 1788c2ecf20Sopenharmony_ci /* Switch ownership from platform code to external user (e.g. VFIO) */ 1798c2ecf20Sopenharmony_ci void (*take_ownership)(struct iommu_table_group *table_group); 1808c2ecf20Sopenharmony_ci /* Switch ownership from external user (e.g. VFIO) back to core */ 1818c2ecf20Sopenharmony_ci void (*release_ownership)(struct iommu_table_group *table_group); 1828c2ecf20Sopenharmony_ci}; 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_cistruct iommu_table_group_link { 1858c2ecf20Sopenharmony_ci struct list_head next; 1868c2ecf20Sopenharmony_ci struct rcu_head rcu; 1878c2ecf20Sopenharmony_ci struct iommu_table_group *table_group; 1888c2ecf20Sopenharmony_ci}; 1898c2ecf20Sopenharmony_ci 1908c2ecf20Sopenharmony_cistruct iommu_table_group { 1918c2ecf20Sopenharmony_ci /* IOMMU properties */ 1928c2ecf20Sopenharmony_ci __u32 tce32_start; 1938c2ecf20Sopenharmony_ci __u32 tce32_size; 1948c2ecf20Sopenharmony_ci __u64 pgsizes; /* Bitmap of supported page sizes */ 1958c2ecf20Sopenharmony_ci __u32 max_dynamic_windows_supported; 1968c2ecf20Sopenharmony_ci __u32 max_levels; 1978c2ecf20Sopenharmony_ci 1988c2ecf20Sopenharmony_ci struct iommu_group *group; 1998c2ecf20Sopenharmony_ci struct iommu_table *tables[IOMMU_TABLE_GROUP_MAX_TABLES]; 2008c2ecf20Sopenharmony_ci struct iommu_table_group_ops *ops; 2018c2ecf20Sopenharmony_ci}; 2028c2ecf20Sopenharmony_ci 2038c2ecf20Sopenharmony_ci#ifdef CONFIG_IOMMU_API 2048c2ecf20Sopenharmony_ci 2058c2ecf20Sopenharmony_ciextern void iommu_register_group(struct iommu_table_group *table_group, 2068c2ecf20Sopenharmony_ci int pci_domain_number, unsigned long pe_num); 2078c2ecf20Sopenharmony_ciextern int iommu_add_device(struct iommu_table_group *table_group, 2088c2ecf20Sopenharmony_ci struct device *dev); 2098c2ecf20Sopenharmony_ciextern void iommu_del_device(struct device *dev); 2108c2ecf20Sopenharmony_ciextern long iommu_tce_xchg(struct mm_struct *mm, struct iommu_table *tbl, 2118c2ecf20Sopenharmony_ci unsigned long entry, unsigned long *hpa, 2128c2ecf20Sopenharmony_ci enum dma_data_direction *direction); 2138c2ecf20Sopenharmony_ciextern long iommu_tce_xchg_no_kill(struct mm_struct *mm, 2148c2ecf20Sopenharmony_ci struct iommu_table *tbl, 2158c2ecf20Sopenharmony_ci unsigned long entry, unsigned long *hpa, 2168c2ecf20Sopenharmony_ci enum dma_data_direction *direction); 2178c2ecf20Sopenharmony_ciextern void iommu_tce_kill(struct iommu_table *tbl, 2188c2ecf20Sopenharmony_ci unsigned long entry, unsigned long pages); 2198c2ecf20Sopenharmony_ci#else 2208c2ecf20Sopenharmony_cistatic inline void iommu_register_group(struct iommu_table_group *table_group, 2218c2ecf20Sopenharmony_ci int pci_domain_number, 2228c2ecf20Sopenharmony_ci unsigned long pe_num) 2238c2ecf20Sopenharmony_ci{ 2248c2ecf20Sopenharmony_ci} 2258c2ecf20Sopenharmony_ci 2268c2ecf20Sopenharmony_cistatic inline int iommu_add_device(struct iommu_table_group *table_group, 2278c2ecf20Sopenharmony_ci struct device *dev) 2288c2ecf20Sopenharmony_ci{ 2298c2ecf20Sopenharmony_ci return 0; 2308c2ecf20Sopenharmony_ci} 2318c2ecf20Sopenharmony_ci 2328c2ecf20Sopenharmony_cistatic inline void iommu_del_device(struct device *dev) 2338c2ecf20Sopenharmony_ci{ 2348c2ecf20Sopenharmony_ci} 2358c2ecf20Sopenharmony_ci#endif /* !CONFIG_IOMMU_API */ 2368c2ecf20Sopenharmony_ci 2378c2ecf20Sopenharmony_ciu64 dma_iommu_get_required_mask(struct device *dev); 2388c2ecf20Sopenharmony_ci#else 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_cistatic inline void *get_iommu_table_base(struct device *dev) 2418c2ecf20Sopenharmony_ci{ 2428c2ecf20Sopenharmony_ci return NULL; 2438c2ecf20Sopenharmony_ci} 2448c2ecf20Sopenharmony_ci 2458c2ecf20Sopenharmony_cistatic inline int dma_iommu_dma_supported(struct device *dev, u64 mask) 2468c2ecf20Sopenharmony_ci{ 2478c2ecf20Sopenharmony_ci return 0; 2488c2ecf20Sopenharmony_ci} 2498c2ecf20Sopenharmony_ci 2508c2ecf20Sopenharmony_ci#endif /* CONFIG_PPC64 */ 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ciextern int ppc_iommu_map_sg(struct device *dev, struct iommu_table *tbl, 2538c2ecf20Sopenharmony_ci struct scatterlist *sglist, int nelems, 2548c2ecf20Sopenharmony_ci unsigned long mask, 2558c2ecf20Sopenharmony_ci enum dma_data_direction direction, 2568c2ecf20Sopenharmony_ci unsigned long attrs); 2578c2ecf20Sopenharmony_ciextern void ppc_iommu_unmap_sg(struct iommu_table *tbl, 2588c2ecf20Sopenharmony_ci struct scatterlist *sglist, 2598c2ecf20Sopenharmony_ci int nelems, 2608c2ecf20Sopenharmony_ci enum dma_data_direction direction, 2618c2ecf20Sopenharmony_ci unsigned long attrs); 2628c2ecf20Sopenharmony_ci 2638c2ecf20Sopenharmony_ciextern void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl, 2648c2ecf20Sopenharmony_ci size_t size, dma_addr_t *dma_handle, 2658c2ecf20Sopenharmony_ci unsigned long mask, gfp_t flag, int node); 2668c2ecf20Sopenharmony_ciextern void iommu_free_coherent(struct iommu_table *tbl, size_t size, 2678c2ecf20Sopenharmony_ci void *vaddr, dma_addr_t dma_handle); 2688c2ecf20Sopenharmony_ciextern dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl, 2698c2ecf20Sopenharmony_ci struct page *page, unsigned long offset, 2708c2ecf20Sopenharmony_ci size_t size, unsigned long mask, 2718c2ecf20Sopenharmony_ci enum dma_data_direction direction, 2728c2ecf20Sopenharmony_ci unsigned long attrs); 2738c2ecf20Sopenharmony_ciextern void iommu_unmap_page(struct iommu_table *tbl, dma_addr_t dma_handle, 2748c2ecf20Sopenharmony_ci size_t size, enum dma_data_direction direction, 2758c2ecf20Sopenharmony_ci unsigned long attrs); 2768c2ecf20Sopenharmony_ci 2778c2ecf20Sopenharmony_ciextern void iommu_init_early_pSeries(void); 2788c2ecf20Sopenharmony_ciextern void iommu_init_early_dart(struct pci_controller_ops *controller_ops); 2798c2ecf20Sopenharmony_ciextern void iommu_init_early_pasemi(void); 2808c2ecf20Sopenharmony_ci 2818c2ecf20Sopenharmony_ci#if defined(CONFIG_PPC64) && defined(CONFIG_PM) 2828c2ecf20Sopenharmony_cistatic inline void iommu_save(void) 2838c2ecf20Sopenharmony_ci{ 2848c2ecf20Sopenharmony_ci if (ppc_md.iommu_save) 2858c2ecf20Sopenharmony_ci ppc_md.iommu_save(); 2868c2ecf20Sopenharmony_ci} 2878c2ecf20Sopenharmony_ci 2888c2ecf20Sopenharmony_cistatic inline void iommu_restore(void) 2898c2ecf20Sopenharmony_ci{ 2908c2ecf20Sopenharmony_ci if (ppc_md.iommu_restore) 2918c2ecf20Sopenharmony_ci ppc_md.iommu_restore(); 2928c2ecf20Sopenharmony_ci} 2938c2ecf20Sopenharmony_ci#endif 2948c2ecf20Sopenharmony_ci 2958c2ecf20Sopenharmony_ci/* The API to support IOMMU operations for VFIO */ 2968c2ecf20Sopenharmony_ciextern int iommu_tce_check_ioba(unsigned long page_shift, 2978c2ecf20Sopenharmony_ci unsigned long offset, unsigned long size, 2988c2ecf20Sopenharmony_ci unsigned long ioba, unsigned long npages); 2998c2ecf20Sopenharmony_ciextern int iommu_tce_check_gpa(unsigned long page_shift, 3008c2ecf20Sopenharmony_ci unsigned long gpa); 3018c2ecf20Sopenharmony_ci 3028c2ecf20Sopenharmony_ci#define iommu_tce_clear_param_check(tbl, ioba, tce_value, npages) \ 3038c2ecf20Sopenharmony_ci (iommu_tce_check_ioba((tbl)->it_page_shift, \ 3048c2ecf20Sopenharmony_ci (tbl)->it_offset, (tbl)->it_size, \ 3058c2ecf20Sopenharmony_ci (ioba), (npages)) || (tce_value)) 3068c2ecf20Sopenharmony_ci#define iommu_tce_put_param_check(tbl, ioba, gpa) \ 3078c2ecf20Sopenharmony_ci (iommu_tce_check_ioba((tbl)->it_page_shift, \ 3088c2ecf20Sopenharmony_ci (tbl)->it_offset, (tbl)->it_size, \ 3098c2ecf20Sopenharmony_ci (ioba), 1) || \ 3108c2ecf20Sopenharmony_ci iommu_tce_check_gpa((tbl)->it_page_shift, (gpa))) 3118c2ecf20Sopenharmony_ci 3128c2ecf20Sopenharmony_ciextern void iommu_flush_tce(struct iommu_table *tbl); 3138c2ecf20Sopenharmony_ciextern int iommu_take_ownership(struct iommu_table *tbl); 3148c2ecf20Sopenharmony_ciextern void iommu_release_ownership(struct iommu_table *tbl); 3158c2ecf20Sopenharmony_ci 3168c2ecf20Sopenharmony_ciextern enum dma_data_direction iommu_tce_direction(unsigned long tce); 3178c2ecf20Sopenharmony_ciextern unsigned long iommu_direction_to_tce_perm(enum dma_data_direction dir); 3188c2ecf20Sopenharmony_ci 3198c2ecf20Sopenharmony_ci#ifdef CONFIG_PPC_CELL_NATIVE 3208c2ecf20Sopenharmony_ciextern bool iommu_fixed_is_weak; 3218c2ecf20Sopenharmony_ci#else 3228c2ecf20Sopenharmony_ci#define iommu_fixed_is_weak false 3238c2ecf20Sopenharmony_ci#endif 3248c2ecf20Sopenharmony_ci 3258c2ecf20Sopenharmony_ciextern const struct dma_map_ops dma_iommu_ops; 3268c2ecf20Sopenharmony_ci 3278c2ecf20Sopenharmony_ci#endif /* __KERNEL__ */ 3288c2ecf20Sopenharmony_ci#endif /* _ASM_IOMMU_H */ 329