18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Copyright (C) 2013 Freescale Semiconductor, Inc. 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef __FSL_PAMU_STASH_H 88c2ecf20Sopenharmony_ci#define __FSL_PAMU_STASH_H 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/* cache stash targets */ 118c2ecf20Sopenharmony_cienum pamu_stash_target { 128c2ecf20Sopenharmony_ci PAMU_ATTR_CACHE_L1 = 1, 138c2ecf20Sopenharmony_ci PAMU_ATTR_CACHE_L2, 148c2ecf20Sopenharmony_ci PAMU_ATTR_CACHE_L3, 158c2ecf20Sopenharmony_ci}; 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci/* 188c2ecf20Sopenharmony_ci * This attribute allows configuring stashig specific parameters 198c2ecf20Sopenharmony_ci * in the PAMU hardware. 208c2ecf20Sopenharmony_ci */ 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_cistruct pamu_stash_attribute { 238c2ecf20Sopenharmony_ci u32 cpu; /* cpu number */ 248c2ecf20Sopenharmony_ci u32 cache; /* cache to stash to: L1,L2,L3 */ 258c2ecf20Sopenharmony_ci}; 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#endif /* __FSL_PAMU_STASH_H */ 28