18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef _ARCH_POWERPC_EXTABLE_H 38c2ecf20Sopenharmony_ci#define _ARCH_POWERPC_EXTABLE_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci/* 68c2ecf20Sopenharmony_ci * The exception table consists of pairs of relative addresses: the first is 78c2ecf20Sopenharmony_ci * the address of an instruction that is allowed to fault, and the second is 88c2ecf20Sopenharmony_ci * the address at which the program should continue. No registers are 98c2ecf20Sopenharmony_ci * modified, so it is entirely up to the continuation code to figure out what 108c2ecf20Sopenharmony_ci * to do. 118c2ecf20Sopenharmony_ci * 128c2ecf20Sopenharmony_ci * All the routines below use bits of fixup code that are out of line with the 138c2ecf20Sopenharmony_ci * main instruction path. This means when everything is well, we don't even 148c2ecf20Sopenharmony_ci * have to jump over them. Further, they do not intrude on our cache or tlb 158c2ecf20Sopenharmony_ci * entries. 168c2ecf20Sopenharmony_ci */ 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci#define ARCH_HAS_RELATIVE_EXTABLE 198c2ecf20Sopenharmony_ci 208c2ecf20Sopenharmony_cistruct exception_table_entry { 218c2ecf20Sopenharmony_ci int insn; 228c2ecf20Sopenharmony_ci int fixup; 238c2ecf20Sopenharmony_ci}; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_cistatic inline unsigned long extable_fixup(const struct exception_table_entry *x) 268c2ecf20Sopenharmony_ci{ 278c2ecf20Sopenharmony_ci return (unsigned long)&x->fixup + x->fixup; 288c2ecf20Sopenharmony_ci} 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#endif 31