1// SPDX-License-Identifier: GPL-2.0 2/* 3 * linux/arch/parisc/mm/init.c 4 * 5 * Copyright (C) 1995 Linus Torvalds 6 * Copyright 1999 SuSE GmbH 7 * changed by Philipp Rumpf 8 * Copyright 1999 Philipp Rumpf (prumpf@tux.org) 9 * Copyright 2004 Randolph Chung (tausq@debian.org) 10 * Copyright 2006-2007 Helge Deller (deller@gmx.de) 11 * 12 */ 13 14 15#include <linux/module.h> 16#include <linux/mm.h> 17#include <linux/memblock.h> 18#include <linux/gfp.h> 19#include <linux/delay.h> 20#include <linux/init.h> 21#include <linux/initrd.h> 22#include <linux/swap.h> 23#include <linux/unistd.h> 24#include <linux/nodemask.h> /* for node_online_map */ 25#include <linux/pagemap.h> /* for release_pages */ 26#include <linux/compat.h> 27 28#include <asm/pgalloc.h> 29#include <asm/tlb.h> 30#include <asm/pdc_chassis.h> 31#include <asm/mmzone.h> 32#include <asm/sections.h> 33#include <asm/msgbuf.h> 34#include <asm/sparsemem.h> 35 36extern int data_start; 37extern void parisc_kernel_start(void); /* Kernel entry point in head.S */ 38 39#if CONFIG_PGTABLE_LEVELS == 3 40pmd_t pmd0[PTRS_PER_PMD] __section(".data..vm0.pmd") __attribute__ ((aligned(PAGE_SIZE))); 41#endif 42 43pgd_t swapper_pg_dir[PTRS_PER_PGD] __section(".data..vm0.pgd") __attribute__ ((aligned(PAGE_SIZE))); 44pte_t pg0[PT_INITIAL * PTRS_PER_PTE] __section(".data..vm0.pte") __attribute__ ((aligned(PAGE_SIZE))); 45 46static struct resource data_resource = { 47 .name = "Kernel data", 48 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, 49}; 50 51static struct resource code_resource = { 52 .name = "Kernel code", 53 .flags = IORESOURCE_BUSY | IORESOURCE_SYSTEM_RAM, 54}; 55 56static struct resource pdcdata_resource = { 57 .name = "PDC data (Page Zero)", 58 .start = 0, 59 .end = 0x9ff, 60 .flags = IORESOURCE_BUSY | IORESOURCE_MEM, 61}; 62 63static struct resource sysram_resources[MAX_PHYSMEM_RANGES] __ro_after_init; 64 65/* The following array is initialized from the firmware specific 66 * information retrieved in kernel/inventory.c. 67 */ 68 69physmem_range_t pmem_ranges[MAX_PHYSMEM_RANGES] __initdata; 70int npmem_ranges __initdata; 71 72#ifdef CONFIG_64BIT 73#define MAX_MEM (1UL << MAX_PHYSMEM_BITS) 74#else /* !CONFIG_64BIT */ 75#define MAX_MEM (3584U*1024U*1024U) 76#endif /* !CONFIG_64BIT */ 77 78static unsigned long mem_limit __read_mostly = MAX_MEM; 79 80static void __init mem_limit_func(void) 81{ 82 char *cp, *end; 83 unsigned long limit; 84 85 /* We need this before __setup() functions are called */ 86 87 limit = MAX_MEM; 88 for (cp = boot_command_line; *cp; ) { 89 if (memcmp(cp, "mem=", 4) == 0) { 90 cp += 4; 91 limit = memparse(cp, &end); 92 if (end != cp) 93 break; 94 cp = end; 95 } else { 96 while (*cp != ' ' && *cp) 97 ++cp; 98 while (*cp == ' ') 99 ++cp; 100 } 101 } 102 103 if (limit < mem_limit) 104 mem_limit = limit; 105} 106 107#define MAX_GAP (0x40000000UL >> PAGE_SHIFT) 108 109static void __init setup_bootmem(void) 110{ 111 unsigned long mem_max; 112#ifndef CONFIG_SPARSEMEM 113 physmem_range_t pmem_holes[MAX_PHYSMEM_RANGES - 1]; 114 int npmem_holes; 115#endif 116 int i, sysram_resource_count; 117 118 disable_sr_hashing(); /* Turn off space register hashing */ 119 120 /* 121 * Sort the ranges. Since the number of ranges is typically 122 * small, and performance is not an issue here, just do 123 * a simple insertion sort. 124 */ 125 126 for (i = 1; i < npmem_ranges; i++) { 127 int j; 128 129 for (j = i; j > 0; j--) { 130 physmem_range_t tmp; 131 132 if (pmem_ranges[j-1].start_pfn < 133 pmem_ranges[j].start_pfn) { 134 135 break; 136 } 137 tmp = pmem_ranges[j-1]; 138 pmem_ranges[j-1] = pmem_ranges[j]; 139 pmem_ranges[j] = tmp; 140 } 141 } 142 143#ifndef CONFIG_SPARSEMEM 144 /* 145 * Throw out ranges that are too far apart (controlled by 146 * MAX_GAP). 147 */ 148 149 for (i = 1; i < npmem_ranges; i++) { 150 if (pmem_ranges[i].start_pfn - 151 (pmem_ranges[i-1].start_pfn + 152 pmem_ranges[i-1].pages) > MAX_GAP) { 153 npmem_ranges = i; 154 printk("Large gap in memory detected (%ld pages). " 155 "Consider turning on CONFIG_SPARSEMEM\n", 156 pmem_ranges[i].start_pfn - 157 (pmem_ranges[i-1].start_pfn + 158 pmem_ranges[i-1].pages)); 159 break; 160 } 161 } 162#endif 163 164 /* Print the memory ranges */ 165 pr_info("Memory Ranges:\n"); 166 167 for (i = 0; i < npmem_ranges; i++) { 168 struct resource *res = &sysram_resources[i]; 169 unsigned long start; 170 unsigned long size; 171 172 size = (pmem_ranges[i].pages << PAGE_SHIFT); 173 start = (pmem_ranges[i].start_pfn << PAGE_SHIFT); 174 pr_info("%2d) Start 0x%016lx End 0x%016lx Size %6ld MB\n", 175 i, start, start + (size - 1), size >> 20); 176 177 /* request memory resource */ 178 res->name = "System RAM"; 179 res->start = start; 180 res->end = start + size - 1; 181 res->flags = IORESOURCE_SYSTEM_RAM | IORESOURCE_BUSY; 182 request_resource(&iomem_resource, res); 183 } 184 185 sysram_resource_count = npmem_ranges; 186 187 /* 188 * For 32 bit kernels we limit the amount of memory we can 189 * support, in order to preserve enough kernel address space 190 * for other purposes. For 64 bit kernels we don't normally 191 * limit the memory, but this mechanism can be used to 192 * artificially limit the amount of memory (and it is written 193 * to work with multiple memory ranges). 194 */ 195 196 mem_limit_func(); /* check for "mem=" argument */ 197 198 mem_max = 0; 199 for (i = 0; i < npmem_ranges; i++) { 200 unsigned long rsize; 201 202 rsize = pmem_ranges[i].pages << PAGE_SHIFT; 203 if ((mem_max + rsize) > mem_limit) { 204 printk(KERN_WARNING "Memory truncated to %ld MB\n", mem_limit >> 20); 205 if (mem_max == mem_limit) 206 npmem_ranges = i; 207 else { 208 pmem_ranges[i].pages = (mem_limit >> PAGE_SHIFT) 209 - (mem_max >> PAGE_SHIFT); 210 npmem_ranges = i + 1; 211 mem_max = mem_limit; 212 } 213 break; 214 } 215 mem_max += rsize; 216 } 217 218 printk(KERN_INFO "Total Memory: %ld MB\n",mem_max >> 20); 219 220#ifndef CONFIG_SPARSEMEM 221 /* Merge the ranges, keeping track of the holes */ 222 { 223 unsigned long end_pfn; 224 unsigned long hole_pages; 225 226 npmem_holes = 0; 227 end_pfn = pmem_ranges[0].start_pfn + pmem_ranges[0].pages; 228 for (i = 1; i < npmem_ranges; i++) { 229 230 hole_pages = pmem_ranges[i].start_pfn - end_pfn; 231 if (hole_pages) { 232 pmem_holes[npmem_holes].start_pfn = end_pfn; 233 pmem_holes[npmem_holes++].pages = hole_pages; 234 end_pfn += hole_pages; 235 } 236 end_pfn += pmem_ranges[i].pages; 237 } 238 239 pmem_ranges[0].pages = end_pfn - pmem_ranges[0].start_pfn; 240 npmem_ranges = 1; 241 } 242#endif 243 244 /* 245 * Initialize and free the full range of memory in each range. 246 */ 247 248 max_pfn = 0; 249 for (i = 0; i < npmem_ranges; i++) { 250 unsigned long start_pfn; 251 unsigned long npages; 252 unsigned long start; 253 unsigned long size; 254 255 start_pfn = pmem_ranges[i].start_pfn; 256 npages = pmem_ranges[i].pages; 257 258 start = start_pfn << PAGE_SHIFT; 259 size = npages << PAGE_SHIFT; 260 261 /* add system RAM memblock */ 262 memblock_add(start, size); 263 264 if ((start_pfn + npages) > max_pfn) 265 max_pfn = start_pfn + npages; 266 } 267 268 /* 269 * We can't use memblock top-down allocations because we only 270 * created the initial mapping up to KERNEL_INITIAL_SIZE in 271 * the assembly bootup code. 272 */ 273 memblock_set_bottom_up(true); 274 275 /* IOMMU is always used to access "high mem" on those boxes 276 * that can support enough mem that a PCI device couldn't 277 * directly DMA to any physical addresses. 278 * ISA DMA support will need to revisit this. 279 */ 280 max_low_pfn = max_pfn; 281 282 /* reserve PAGE0 pdc memory, kernel text/data/bss & bootmap */ 283 284#define PDC_CONSOLE_IO_IODC_SIZE 32768 285 286 memblock_reserve(0UL, (unsigned long)(PAGE0->mem_free + 287 PDC_CONSOLE_IO_IODC_SIZE)); 288 memblock_reserve(__pa(KERNEL_BINARY_TEXT_START), 289 (unsigned long)(_end - KERNEL_BINARY_TEXT_START)); 290 291#ifndef CONFIG_SPARSEMEM 292 293 /* reserve the holes */ 294 295 for (i = 0; i < npmem_holes; i++) { 296 memblock_reserve((pmem_holes[i].start_pfn << PAGE_SHIFT), 297 (pmem_holes[i].pages << PAGE_SHIFT)); 298 } 299#endif 300 301#ifdef CONFIG_BLK_DEV_INITRD 302 if (initrd_start) { 303 printk(KERN_INFO "initrd: %08lx-%08lx\n", initrd_start, initrd_end); 304 if (__pa(initrd_start) < mem_max) { 305 unsigned long initrd_reserve; 306 307 if (__pa(initrd_end) > mem_max) { 308 initrd_reserve = mem_max - __pa(initrd_start); 309 } else { 310 initrd_reserve = initrd_end - initrd_start; 311 } 312 initrd_below_start_ok = 1; 313 printk(KERN_INFO "initrd: reserving %08lx-%08lx (mem_max %08lx)\n", __pa(initrd_start), __pa(initrd_start) + initrd_reserve, mem_max); 314 315 memblock_reserve(__pa(initrd_start), initrd_reserve); 316 } 317 } 318#endif 319 320 data_resource.start = virt_to_phys(&data_start); 321 data_resource.end = virt_to_phys(_end) - 1; 322 code_resource.start = virt_to_phys(_text); 323 code_resource.end = virt_to_phys(&data_start)-1; 324 325 /* We don't know which region the kernel will be in, so try 326 * all of them. 327 */ 328 for (i = 0; i < sysram_resource_count; i++) { 329 struct resource *res = &sysram_resources[i]; 330 request_resource(res, &code_resource); 331 request_resource(res, &data_resource); 332 } 333 request_resource(&sysram_resources[0], &pdcdata_resource); 334 335 /* Initialize Page Deallocation Table (PDT) and check for bad memory. */ 336 pdc_pdt_init(); 337 338 memblock_allow_resize(); 339 memblock_dump_all(); 340} 341 342static bool kernel_set_to_readonly; 343 344static void __ref map_pages(unsigned long start_vaddr, 345 unsigned long start_paddr, unsigned long size, 346 pgprot_t pgprot, int force) 347{ 348 pmd_t *pmd; 349 pte_t *pg_table; 350 unsigned long end_paddr; 351 unsigned long start_pmd; 352 unsigned long start_pte; 353 unsigned long tmp1; 354 unsigned long tmp2; 355 unsigned long address; 356 unsigned long vaddr; 357 unsigned long ro_start; 358 unsigned long ro_end; 359 unsigned long kernel_start, kernel_end; 360 361 ro_start = __pa((unsigned long)_text); 362 ro_end = __pa((unsigned long)&data_start); 363 kernel_start = __pa((unsigned long)&__init_begin); 364 kernel_end = __pa((unsigned long)&_end); 365 366 end_paddr = start_paddr + size; 367 368 /* for 2-level configuration PTRS_PER_PMD is 0 so start_pmd will be 0 */ 369 start_pmd = ((start_vaddr >> PMD_SHIFT) & (PTRS_PER_PMD - 1)); 370 start_pte = ((start_vaddr >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)); 371 372 address = start_paddr; 373 vaddr = start_vaddr; 374 while (address < end_paddr) { 375 pgd_t *pgd = pgd_offset_k(vaddr); 376 p4d_t *p4d = p4d_offset(pgd, vaddr); 377 pud_t *pud = pud_offset(p4d, vaddr); 378 379#if CONFIG_PGTABLE_LEVELS == 3 380 if (pud_none(*pud)) { 381 pmd = memblock_alloc(PAGE_SIZE << PMD_ORDER, 382 PAGE_SIZE << PMD_ORDER); 383 if (!pmd) 384 panic("pmd allocation failed.\n"); 385 pud_populate(NULL, pud, pmd); 386 } 387#endif 388 389 pmd = pmd_offset(pud, vaddr); 390 for (tmp1 = start_pmd; tmp1 < PTRS_PER_PMD; tmp1++, pmd++) { 391 if (pmd_none(*pmd)) { 392 pg_table = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 393 if (!pg_table) 394 panic("page table allocation failed\n"); 395 pmd_populate_kernel(NULL, pmd, pg_table); 396 } 397 398 pg_table = pte_offset_kernel(pmd, vaddr); 399 for (tmp2 = start_pte; tmp2 < PTRS_PER_PTE; tmp2++, pg_table++) { 400 pte_t pte; 401 pgprot_t prot; 402 bool huge = false; 403 404 if (force) { 405 prot = pgprot; 406 } else if (address < kernel_start || address >= kernel_end) { 407 /* outside kernel memory */ 408 prot = PAGE_KERNEL; 409 } else if (!kernel_set_to_readonly) { 410 /* still initializing, allow writing to RO memory */ 411 prot = PAGE_KERNEL_RWX; 412 huge = true; 413 } else if (address >= ro_start) { 414 /* Code (ro) and Data areas */ 415 prot = (address < ro_end) ? 416 PAGE_KERNEL_EXEC : PAGE_KERNEL; 417 huge = true; 418 } else { 419 prot = PAGE_KERNEL; 420 } 421 422 pte = __mk_pte(address, prot); 423 if (huge) 424 pte = pte_mkhuge(pte); 425 426 if (address >= end_paddr) 427 break; 428 429 set_pte(pg_table, pte); 430 431 address += PAGE_SIZE; 432 vaddr += PAGE_SIZE; 433 } 434 start_pte = 0; 435 436 if (address >= end_paddr) 437 break; 438 } 439 start_pmd = 0; 440 } 441} 442 443void __init set_kernel_text_rw(int enable_read_write) 444{ 445 unsigned long start = (unsigned long) __init_begin; 446 unsigned long end = (unsigned long) &data_start; 447 448 map_pages(start, __pa(start), end-start, 449 PAGE_KERNEL_RWX, enable_read_write ? 1:0); 450 451 /* force the kernel to see the new page table entries */ 452 flush_cache_all(); 453 flush_tlb_all(); 454} 455 456void free_initmem(void) 457{ 458 unsigned long init_begin = (unsigned long)__init_begin; 459 unsigned long init_end = (unsigned long)__init_end; 460 unsigned long kernel_end = (unsigned long)&_end; 461 462 /* Remap kernel text and data, but do not touch init section yet. */ 463 kernel_set_to_readonly = true; 464 map_pages(init_end, __pa(init_end), kernel_end - init_end, 465 PAGE_KERNEL, 0); 466 467 /* The init text pages are marked R-X. We have to 468 * flush the icache and mark them RW- 469 * 470 * Do a dummy remap of the data section first (the data 471 * section is already PAGE_KERNEL) to pull in the TLB entries 472 * for map_kernel */ 473 map_pages(init_begin, __pa(init_begin), init_end - init_begin, 474 PAGE_KERNEL_RWX, 1); 475 /* now remap at PAGE_KERNEL since the TLB is pre-primed to execute 476 * map_pages */ 477 map_pages(init_begin, __pa(init_begin), init_end - init_begin, 478 PAGE_KERNEL, 1); 479 480 /* force the kernel to see the new TLB entries */ 481 __flush_tlb_range(0, init_begin, kernel_end); 482 483 /* finally dump all the instructions which were cached, since the 484 * pages are no-longer executable */ 485 flush_icache_range(init_begin, init_end); 486 487 free_initmem_default(POISON_FREE_INITMEM); 488 489 /* set up a new led state on systems shipped LED State panel */ 490 pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE); 491} 492 493 494#ifdef CONFIG_STRICT_KERNEL_RWX 495void mark_rodata_ro(void) 496{ 497 /* rodata memory was already mapped with KERNEL_RO access rights by 498 pagetable_init() and map_pages(). No need to do additional stuff here */ 499 unsigned long roai_size = __end_ro_after_init - __start_ro_after_init; 500 501 pr_info("Write protected read-only-after-init data: %luk\n", roai_size >> 10); 502} 503#endif 504 505 506/* 507 * Just an arbitrary offset to serve as a "hole" between mapping areas 508 * (between top of physical memory and a potential pcxl dma mapping 509 * area, and below the vmalloc mapping area). 510 * 511 * The current 32K value just means that there will be a 32K "hole" 512 * between mapping areas. That means that any out-of-bounds memory 513 * accesses will hopefully be caught. The vmalloc() routines leaves 514 * a hole of 4kB between each vmalloced area for the same reason. 515 */ 516 517 /* Leave room for gateway page expansion */ 518#if KERNEL_MAP_START < GATEWAY_PAGE_SIZE 519#error KERNEL_MAP_START is in gateway reserved region 520#endif 521#define MAP_START (KERNEL_MAP_START) 522 523#define VM_MAP_OFFSET (32*1024) 524#define SET_MAP_OFFSET(x) ((void *)(((unsigned long)(x) + VM_MAP_OFFSET) \ 525 & ~(VM_MAP_OFFSET-1))) 526 527void *parisc_vmalloc_start __ro_after_init; 528EXPORT_SYMBOL(parisc_vmalloc_start); 529 530#ifdef CONFIG_PA11 531unsigned long pcxl_dma_start __ro_after_init; 532#endif 533 534void __init mem_init(void) 535{ 536 /* Do sanity checks on IPC (compat) structures */ 537 BUILD_BUG_ON(sizeof(struct ipc64_perm) != 48); 538#ifndef CONFIG_64BIT 539 BUILD_BUG_ON(sizeof(struct semid64_ds) != 80); 540 BUILD_BUG_ON(sizeof(struct msqid64_ds) != 104); 541 BUILD_BUG_ON(sizeof(struct shmid64_ds) != 104); 542#endif 543#ifdef CONFIG_COMPAT 544 BUILD_BUG_ON(sizeof(struct compat_ipc64_perm) != sizeof(struct ipc64_perm)); 545 BUILD_BUG_ON(sizeof(struct compat_semid64_ds) != 80); 546 BUILD_BUG_ON(sizeof(struct compat_msqid64_ds) != 104); 547 BUILD_BUG_ON(sizeof(struct compat_shmid64_ds) != 104); 548#endif 549 550 /* Do sanity checks on page table constants */ 551 BUILD_BUG_ON(PTE_ENTRY_SIZE != sizeof(pte_t)); 552 BUILD_BUG_ON(PMD_ENTRY_SIZE != sizeof(pmd_t)); 553 BUILD_BUG_ON(PGD_ENTRY_SIZE != sizeof(pgd_t)); 554 BUILD_BUG_ON(PAGE_SHIFT + BITS_PER_PTE + BITS_PER_PMD + BITS_PER_PGD 555 > BITS_PER_LONG); 556#if CONFIG_PGTABLE_LEVELS == 3 557 BUILD_BUG_ON(PT_INITIAL > PTRS_PER_PMD); 558#else 559 BUILD_BUG_ON(PT_INITIAL > PTRS_PER_PGD); 560#endif 561 562 high_memory = __va((max_pfn << PAGE_SHIFT)); 563 set_max_mapnr(max_low_pfn); 564 memblock_free_all(); 565 566#ifdef CONFIG_PA11 567 if (boot_cpu_data.cpu_type == pcxl2 || boot_cpu_data.cpu_type == pcxl) { 568 pcxl_dma_start = (unsigned long)SET_MAP_OFFSET(MAP_START); 569 parisc_vmalloc_start = SET_MAP_OFFSET(pcxl_dma_start 570 + PCXL_DMA_MAP_SIZE); 571 } else 572#endif 573 parisc_vmalloc_start = SET_MAP_OFFSET(MAP_START); 574 575 mem_init_print_info(NULL); 576 577#if 0 578 /* 579 * Do not expose the virtual kernel memory layout to userspace. 580 * But keep code for debugging purposes. 581 */ 582 printk("virtual kernel memory layout:\n" 583 " vmalloc : 0x%px - 0x%px (%4ld MB)\n" 584 " fixmap : 0x%px - 0x%px (%4ld kB)\n" 585 " memory : 0x%px - 0x%px (%4ld MB)\n" 586 " .init : 0x%px - 0x%px (%4ld kB)\n" 587 " .data : 0x%px - 0x%px (%4ld kB)\n" 588 " .text : 0x%px - 0x%px (%4ld kB)\n", 589 590 (void*)VMALLOC_START, (void*)VMALLOC_END, 591 (VMALLOC_END - VMALLOC_START) >> 20, 592 593 (void *)FIXMAP_START, (void *)(FIXMAP_START + FIXMAP_SIZE), 594 (unsigned long)(FIXMAP_SIZE / 1024), 595 596 __va(0), high_memory, 597 ((unsigned long)high_memory - (unsigned long)__va(0)) >> 20, 598 599 __init_begin, __init_end, 600 ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10, 601 602 _etext, _edata, 603 ((unsigned long)_edata - (unsigned long)_etext) >> 10, 604 605 _text, _etext, 606 ((unsigned long)_etext - (unsigned long)_text) >> 10); 607#endif 608} 609 610unsigned long *empty_zero_page __ro_after_init; 611EXPORT_SYMBOL(empty_zero_page); 612 613/* 614 * pagetable_init() sets up the page tables 615 * 616 * Note that gateway_init() places the Linux gateway page at page 0. 617 * Since gateway pages cannot be dereferenced this has the desirable 618 * side effect of trapping those pesky NULL-reference errors in the 619 * kernel. 620 */ 621static void __init pagetable_init(void) 622{ 623 int range; 624 625 /* Map each physical memory range to its kernel vaddr */ 626 627 for (range = 0; range < npmem_ranges; range++) { 628 unsigned long start_paddr; 629 unsigned long end_paddr; 630 unsigned long size; 631 632 start_paddr = pmem_ranges[range].start_pfn << PAGE_SHIFT; 633 size = pmem_ranges[range].pages << PAGE_SHIFT; 634 end_paddr = start_paddr + size; 635 636 map_pages((unsigned long)__va(start_paddr), start_paddr, 637 size, PAGE_KERNEL, 0); 638 } 639 640#ifdef CONFIG_BLK_DEV_INITRD 641 if (initrd_end && initrd_end > mem_limit) { 642 printk(KERN_INFO "initrd: mapping %08lx-%08lx\n", initrd_start, initrd_end); 643 map_pages(initrd_start, __pa(initrd_start), 644 initrd_end - initrd_start, PAGE_KERNEL, 0); 645 } 646#endif 647 648 empty_zero_page = memblock_alloc(PAGE_SIZE, PAGE_SIZE); 649 if (!empty_zero_page) 650 panic("zero page allocation failed.\n"); 651 652} 653 654static void __init gateway_init(void) 655{ 656 unsigned long linux_gateway_page_addr; 657 /* FIXME: This is 'const' in order to trick the compiler 658 into not treating it as DP-relative data. */ 659 extern void * const linux_gateway_page; 660 661 linux_gateway_page_addr = LINUX_GATEWAY_ADDR & PAGE_MASK; 662 663 /* 664 * Setup Linux Gateway page. 665 * 666 * The Linux gateway page will reside in kernel space (on virtual 667 * page 0), so it doesn't need to be aliased into user space. 668 */ 669 670 map_pages(linux_gateway_page_addr, __pa(&linux_gateway_page), 671 PAGE_SIZE, PAGE_GATEWAY, 1); 672} 673 674static void __init parisc_bootmem_free(void) 675{ 676 unsigned long max_zone_pfn[MAX_NR_ZONES] = { 0, }; 677 678 max_zone_pfn[0] = memblock_end_of_DRAM(); 679 680 free_area_init(max_zone_pfn); 681} 682 683void __init paging_init(void) 684{ 685 setup_bootmem(); 686 pagetable_init(); 687 gateway_init(); 688 flush_cache_all_local(); /* start with known state */ 689 flush_tlb_all_local(NULL); 690 691 sparse_init(); 692 parisc_bootmem_free(); 693} 694 695#ifdef CONFIG_PA20 696 697/* 698 * Currently, all PA20 chips have 18 bit protection IDs, which is the 699 * limiting factor (space ids are 32 bits). 700 */ 701 702#define NR_SPACE_IDS 262144 703 704#else 705 706/* 707 * Currently we have a one-to-one relationship between space IDs and 708 * protection IDs. Older parisc chips (PCXS, PCXT, PCXL, PCXL2) only 709 * support 15 bit protection IDs, so that is the limiting factor. 710 * PCXT' has 18 bit protection IDs, but only 16 bit spaceids, so it's 711 * probably not worth the effort for a special case here. 712 */ 713 714#define NR_SPACE_IDS 32768 715 716#endif /* !CONFIG_PA20 */ 717 718#define RECYCLE_THRESHOLD (NR_SPACE_IDS / 2) 719#define SID_ARRAY_SIZE (NR_SPACE_IDS / (8 * sizeof(long))) 720 721static unsigned long space_id[SID_ARRAY_SIZE] = { 1 }; /* disallow space 0 */ 722static unsigned long dirty_space_id[SID_ARRAY_SIZE]; 723static unsigned long space_id_index; 724static unsigned long free_space_ids = NR_SPACE_IDS - 1; 725static unsigned long dirty_space_ids = 0; 726 727static DEFINE_SPINLOCK(sid_lock); 728 729unsigned long alloc_sid(void) 730{ 731 unsigned long index; 732 733 spin_lock(&sid_lock); 734 735 if (free_space_ids == 0) { 736 if (dirty_space_ids != 0) { 737 spin_unlock(&sid_lock); 738 flush_tlb_all(); /* flush_tlb_all() calls recycle_sids() */ 739 spin_lock(&sid_lock); 740 } 741 BUG_ON(free_space_ids == 0); 742 } 743 744 free_space_ids--; 745 746 index = find_next_zero_bit(space_id, NR_SPACE_IDS, space_id_index); 747 space_id[BIT_WORD(index)] |= BIT_MASK(index); 748 space_id_index = index; 749 750 spin_unlock(&sid_lock); 751 752 return index << SPACEID_SHIFT; 753} 754 755void free_sid(unsigned long spaceid) 756{ 757 unsigned long index = spaceid >> SPACEID_SHIFT; 758 unsigned long *dirty_space_offset, mask; 759 760 dirty_space_offset = &dirty_space_id[BIT_WORD(index)]; 761 mask = BIT_MASK(index); 762 763 spin_lock(&sid_lock); 764 765 BUG_ON(*dirty_space_offset & mask); /* attempt to free space id twice */ 766 767 *dirty_space_offset |= mask; 768 dirty_space_ids++; 769 770 spin_unlock(&sid_lock); 771} 772 773 774#ifdef CONFIG_SMP 775static void get_dirty_sids(unsigned long *ndirtyptr,unsigned long *dirty_array) 776{ 777 int i; 778 779 /* NOTE: sid_lock must be held upon entry */ 780 781 *ndirtyptr = dirty_space_ids; 782 if (dirty_space_ids != 0) { 783 for (i = 0; i < SID_ARRAY_SIZE; i++) { 784 dirty_array[i] = dirty_space_id[i]; 785 dirty_space_id[i] = 0; 786 } 787 dirty_space_ids = 0; 788 } 789 790 return; 791} 792 793static void recycle_sids(unsigned long ndirty,unsigned long *dirty_array) 794{ 795 int i; 796 797 /* NOTE: sid_lock must be held upon entry */ 798 799 if (ndirty != 0) { 800 for (i = 0; i < SID_ARRAY_SIZE; i++) { 801 space_id[i] ^= dirty_array[i]; 802 } 803 804 free_space_ids += ndirty; 805 space_id_index = 0; 806 } 807} 808 809#else /* CONFIG_SMP */ 810 811static void recycle_sids(void) 812{ 813 int i; 814 815 /* NOTE: sid_lock must be held upon entry */ 816 817 if (dirty_space_ids != 0) { 818 for (i = 0; i < SID_ARRAY_SIZE; i++) { 819 space_id[i] ^= dirty_space_id[i]; 820 dirty_space_id[i] = 0; 821 } 822 823 free_space_ids += dirty_space_ids; 824 dirty_space_ids = 0; 825 space_id_index = 0; 826 } 827} 828#endif 829 830/* 831 * flush_tlb_all() calls recycle_sids(), since whenever the entire tlb is 832 * purged, we can safely reuse the space ids that were released but 833 * not flushed from the tlb. 834 */ 835 836#ifdef CONFIG_SMP 837 838static unsigned long recycle_ndirty; 839static unsigned long recycle_dirty_array[SID_ARRAY_SIZE]; 840static unsigned int recycle_inuse; 841 842void flush_tlb_all(void) 843{ 844 int do_recycle; 845 846 do_recycle = 0; 847 spin_lock(&sid_lock); 848 __inc_irq_stat(irq_tlb_count); 849 if (dirty_space_ids > RECYCLE_THRESHOLD) { 850 BUG_ON(recycle_inuse); /* FIXME: Use a semaphore/wait queue here */ 851 get_dirty_sids(&recycle_ndirty,recycle_dirty_array); 852 recycle_inuse++; 853 do_recycle++; 854 } 855 spin_unlock(&sid_lock); 856 on_each_cpu(flush_tlb_all_local, NULL, 1); 857 if (do_recycle) { 858 spin_lock(&sid_lock); 859 recycle_sids(recycle_ndirty,recycle_dirty_array); 860 recycle_inuse = 0; 861 spin_unlock(&sid_lock); 862 } 863} 864#else 865void flush_tlb_all(void) 866{ 867 spin_lock(&sid_lock); 868 __inc_irq_stat(irq_tlb_count); 869 flush_tlb_all_local(NULL); 870 recycle_sids(); 871 spin_unlock(&sid_lock); 872} 873#endif 874