1/* SPDX-License-Identifier: GPL-2.0 */ 2#ifndef _ASM_IO_H 3#define _ASM_IO_H 4 5#include <linux/types.h> 6#include <linux/pgtable.h> 7 8#define virt_to_phys(a) ((unsigned long)__pa(a)) 9#define phys_to_virt(a) __va(a) 10#define virt_to_bus virt_to_phys 11#define bus_to_virt phys_to_virt 12 13static inline unsigned long isa_bus_to_virt(unsigned long addr) { 14 BUG(); 15 return 0; 16} 17 18static inline unsigned long isa_virt_to_bus(void *addr) { 19 BUG(); 20 return 0; 21} 22 23/* 24 * Memory mapped I/O 25 * 26 * readX()/writeX() do byteswapping and take an ioremapped address 27 * __raw_readX()/__raw_writeX() don't byteswap and take an ioremapped address. 28 * gsc_*() don't byteswap and operate on physical addresses; 29 * eg dev->hpa or 0xfee00000. 30 */ 31 32static inline unsigned char gsc_readb(unsigned long addr) 33{ 34 long flags; 35 unsigned char ret; 36 37 __asm__ __volatile__( 38 " rsm %3,%0\n" 39 " ldbx 0(%2),%1\n" 40 " mtsm %0\n" 41 : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) ); 42 43 return ret; 44} 45 46static inline unsigned short gsc_readw(unsigned long addr) 47{ 48 long flags; 49 unsigned short ret; 50 51 __asm__ __volatile__( 52 " rsm %3,%0\n" 53 " ldhx 0(%2),%1\n" 54 " mtsm %0\n" 55 : "=&r" (flags), "=r" (ret) : "r" (addr), "i" (PSW_SM_D) ); 56 57 return ret; 58} 59 60static inline unsigned int gsc_readl(unsigned long addr) 61{ 62 u32 ret; 63 64 __asm__ __volatile__( 65 " ldwax 0(%1),%0\n" 66 : "=r" (ret) : "r" (addr) ); 67 68 return ret; 69} 70 71static inline unsigned long long gsc_readq(unsigned long addr) 72{ 73 unsigned long long ret; 74 75#ifdef CONFIG_64BIT 76 __asm__ __volatile__( 77 " ldda 0(%1),%0\n" 78 : "=r" (ret) : "r" (addr) ); 79#else 80 /* two reads may have side effects.. */ 81 ret = ((u64) gsc_readl(addr)) << 32; 82 ret |= gsc_readl(addr+4); 83#endif 84 return ret; 85} 86 87static inline void gsc_writeb(unsigned char val, unsigned long addr) 88{ 89 long flags; 90 __asm__ __volatile__( 91 " rsm %3,%0\n" 92 " stbs %1,0(%2)\n" 93 " mtsm %0\n" 94 : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) ); 95} 96 97static inline void gsc_writew(unsigned short val, unsigned long addr) 98{ 99 long flags; 100 __asm__ __volatile__( 101 " rsm %3,%0\n" 102 " sths %1,0(%2)\n" 103 " mtsm %0\n" 104 : "=&r" (flags) : "r" (val), "r" (addr), "i" (PSW_SM_D) ); 105} 106 107static inline void gsc_writel(unsigned int val, unsigned long addr) 108{ 109 __asm__ __volatile__( 110 " stwas %0,0(%1)\n" 111 : : "r" (val), "r" (addr) ); 112} 113 114static inline void gsc_writeq(unsigned long long val, unsigned long addr) 115{ 116#ifdef CONFIG_64BIT 117 __asm__ __volatile__( 118 " stda %0,0(%1)\n" 119 : : "r" (val), "r" (addr) ); 120#else 121 /* two writes may have side effects.. */ 122 gsc_writel(val >> 32, addr); 123 gsc_writel(val, addr+4); 124#endif 125} 126 127/* 128 * The standard PCI ioremap interfaces 129 */ 130void __iomem *ioremap(unsigned long offset, unsigned long size); 131#define ioremap_wc ioremap 132#define ioremap_uc ioremap 133 134extern void iounmap(const volatile void __iomem *addr); 135 136static inline unsigned char __raw_readb(const volatile void __iomem *addr) 137{ 138 return (*(volatile unsigned char __force *) (addr)); 139} 140static inline unsigned short __raw_readw(const volatile void __iomem *addr) 141{ 142 return *(volatile unsigned short __force *) addr; 143} 144static inline unsigned int __raw_readl(const volatile void __iomem *addr) 145{ 146 return *(volatile unsigned int __force *) addr; 147} 148static inline unsigned long long __raw_readq(const volatile void __iomem *addr) 149{ 150 return *(volatile unsigned long long __force *) addr; 151} 152 153static inline void __raw_writeb(unsigned char b, volatile void __iomem *addr) 154{ 155 *(volatile unsigned char __force *) addr = b; 156} 157static inline void __raw_writew(unsigned short b, volatile void __iomem *addr) 158{ 159 *(volatile unsigned short __force *) addr = b; 160} 161static inline void __raw_writel(unsigned int b, volatile void __iomem *addr) 162{ 163 *(volatile unsigned int __force *) addr = b; 164} 165static inline void __raw_writeq(unsigned long long b, volatile void __iomem *addr) 166{ 167 *(volatile unsigned long long __force *) addr = b; 168} 169 170static inline unsigned char readb(const volatile void __iomem *addr) 171{ 172 return __raw_readb(addr); 173} 174static inline unsigned short readw(const volatile void __iomem *addr) 175{ 176 return le16_to_cpu((__le16 __force) __raw_readw(addr)); 177} 178static inline unsigned int readl(const volatile void __iomem *addr) 179{ 180 return le32_to_cpu((__le32 __force) __raw_readl(addr)); 181} 182static inline unsigned long long readq(const volatile void __iomem *addr) 183{ 184 return le64_to_cpu((__le64 __force) __raw_readq(addr)); 185} 186 187static inline void writeb(unsigned char b, volatile void __iomem *addr) 188{ 189 __raw_writeb(b, addr); 190} 191static inline void writew(unsigned short w, volatile void __iomem *addr) 192{ 193 __raw_writew((__u16 __force) cpu_to_le16(w), addr); 194} 195static inline void writel(unsigned int l, volatile void __iomem *addr) 196{ 197 __raw_writel((__u32 __force) cpu_to_le32(l), addr); 198} 199static inline void writeq(unsigned long long q, volatile void __iomem *addr) 200{ 201 __raw_writeq((__u64 __force) cpu_to_le64(q), addr); 202} 203 204#define readb readb 205#define readw readw 206#define readl readl 207#define readq readq 208#define writeb writeb 209#define writew writew 210#define writel writel 211#define writeq writeq 212 213#define readb_relaxed(addr) readb(addr) 214#define readw_relaxed(addr) readw(addr) 215#define readl_relaxed(addr) readl(addr) 216#define readq_relaxed(addr) readq(addr) 217#define writeb_relaxed(b, addr) writeb(b, addr) 218#define writew_relaxed(w, addr) writew(w, addr) 219#define writel_relaxed(l, addr) writel(l, addr) 220#define writeq_relaxed(q, addr) writeq(q, addr) 221 222void memset_io(volatile void __iomem *addr, unsigned char val, int count); 223void memcpy_fromio(void *dst, const volatile void __iomem *src, int count); 224void memcpy_toio(volatile void __iomem *dst, const void *src, int count); 225 226/* Port-space IO */ 227 228#define inb_p inb 229#define inw_p inw 230#define inl_p inl 231#define outb_p outb 232#define outw_p outw 233#define outl_p outl 234 235extern unsigned char eisa_in8(unsigned short port); 236extern unsigned short eisa_in16(unsigned short port); 237extern unsigned int eisa_in32(unsigned short port); 238extern void eisa_out8(unsigned char data, unsigned short port); 239extern void eisa_out16(unsigned short data, unsigned short port); 240extern void eisa_out32(unsigned int data, unsigned short port); 241 242#if defined(CONFIG_PCI) 243extern unsigned char inb(int addr); 244extern unsigned short inw(int addr); 245extern unsigned int inl(int addr); 246 247extern void outb(unsigned char b, int addr); 248extern void outw(unsigned short b, int addr); 249extern void outl(unsigned int b, int addr); 250#elif defined(CONFIG_EISA) 251#define inb eisa_in8 252#define inw eisa_in16 253#define inl eisa_in32 254#define outb eisa_out8 255#define outw eisa_out16 256#define outl eisa_out32 257#else 258static inline char inb(unsigned long addr) 259{ 260 BUG(); 261 return -1; 262} 263 264static inline short inw(unsigned long addr) 265{ 266 BUG(); 267 return -1; 268} 269 270static inline int inl(unsigned long addr) 271{ 272 BUG(); 273 return -1; 274} 275 276#define outb(x, y) BUG() 277#define outw(x, y) BUG() 278#define outl(x, y) BUG() 279#endif 280 281/* 282 * String versions of in/out ops: 283 */ 284extern void insb (unsigned long port, void *dst, unsigned long count); 285extern void insw (unsigned long port, void *dst, unsigned long count); 286extern void insl (unsigned long port, void *dst, unsigned long count); 287extern void outsb (unsigned long port, const void *src, unsigned long count); 288extern void outsw (unsigned long port, const void *src, unsigned long count); 289extern void outsl (unsigned long port, const void *src, unsigned long count); 290 291 292/* IO Port space is : BBiiii where BB is HBA number. */ 293#define IO_SPACE_LIMIT 0x00ffffff 294 295/* PA machines have an MM I/O space from 0xf0000000-0xffffffff in 32 296 * bit mode and from 0xfffffffff0000000-0xfffffffffffffff in 64 bit 297 * mode (essentially just sign extending. This macro takes in a 32 298 * bit I/O address (still with the leading f) and outputs the correct 299 * value for either 32 or 64 bit mode */ 300#define F_EXTEND(x) ((unsigned long)((x) | (0xffffffff00000000ULL))) 301 302#define ioread64 ioread64 303#define ioread64be ioread64be 304#define iowrite64 iowrite64 305#define iowrite64be iowrite64be 306extern u64 ioread64(const void __iomem *addr); 307extern u64 ioread64be(const void __iomem *addr); 308extern void iowrite64(u64 val, void __iomem *addr); 309extern void iowrite64be(u64 val, void __iomem *addr); 310 311#include <asm-generic/iomap.h> 312 313/* 314 * Convert a physical pointer to a virtual kernel pointer for /dev/mem 315 * access 316 */ 317#define xlate_dev_mem_ptr(p) __va(p) 318 319/* 320 * Convert a virtual cached pointer to an uncached pointer 321 */ 322#define xlate_dev_kmem_ptr(p) p 323 324#endif 325