18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci// Copyright (C) 2012 ARM Limited 38c2ecf20Sopenharmony_ci// Copyright (C) 2005-2017 Andes Technology Corporation 48c2ecf20Sopenharmony_ci#ifndef __ASM_VDSO_DATAPAGE_H 58c2ecf20Sopenharmony_ci#define __ASM_VDSO_DATAPAGE_H 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifdef __KERNEL__ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_cistruct vdso_data { 128c2ecf20Sopenharmony_ci bool cycle_count_down; /* timer cyclye counter is decrease with time */ 138c2ecf20Sopenharmony_ci u32 cycle_count_offset; /* offset of timer cycle counter register */ 148c2ecf20Sopenharmony_ci u32 seq_count; /* sequence count - odd during updates */ 158c2ecf20Sopenharmony_ci u32 xtime_coarse_sec; /* coarse time */ 168c2ecf20Sopenharmony_ci u32 xtime_coarse_nsec; 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci u32 wtm_clock_sec; /* wall to monotonic offset */ 198c2ecf20Sopenharmony_ci u32 wtm_clock_nsec; 208c2ecf20Sopenharmony_ci u32 xtime_clock_sec; /* CLOCK_REALTIME - seconds */ 218c2ecf20Sopenharmony_ci u32 cs_mult; /* clocksource multiplier */ 228c2ecf20Sopenharmony_ci u32 cs_shift; /* Cycle to nanosecond divisor (power of two) */ 238c2ecf20Sopenharmony_ci u32 hrtimer_res; /* hrtimer resolution */ 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci u64 cs_cycle_last; /* last cycle value */ 268c2ecf20Sopenharmony_ci u64 cs_mask; /* clocksource mask */ 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci u64 xtime_clock_nsec; /* CLOCK_REALTIME sub-ns base */ 298c2ecf20Sopenharmony_ci u32 tz_minuteswest; /* timezone info for gettimeofday(2) */ 308c2ecf20Sopenharmony_ci u32 tz_dsttime; 318c2ecf20Sopenharmony_ci}; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#endif /* !__ASSEMBLY__ */ 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#endif /* __KERNEL__ */ 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#endif /* __ASM_VDSO_DATAPAGE_H */ 38