18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci// Copyright (C) 2005-2017 Andes Technology Corporation
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ci#ifndef _ASM_NDS32_NDS32_H_
58c2ecf20Sopenharmony_ci#define _ASM_NDS32_NDS32_H_
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci#include <asm/bitfield.h>
88c2ecf20Sopenharmony_ci#include <asm/cachectl.h>
98c2ecf20Sopenharmony_ci
108c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__
118c2ecf20Sopenharmony_ci#include <linux/init.h>
128c2ecf20Sopenharmony_ci#include <asm/barrier.h>
138c2ecf20Sopenharmony_ci#include <nds32_intrinsic.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
168c2ecf20Sopenharmony_ci#define FP_OFFSET (-3)
178c2ecf20Sopenharmony_ci#else
188c2ecf20Sopenharmony_ci#define FP_OFFSET (-2)
198c2ecf20Sopenharmony_ci#endif
208c2ecf20Sopenharmony_ci#define LP_OFFSET (-1)
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ciextern void __init early_trap_init(void);
238c2ecf20Sopenharmony_cistatic inline void GIE_ENABLE(void)
248c2ecf20Sopenharmony_ci{
258c2ecf20Sopenharmony_ci	mb();
268c2ecf20Sopenharmony_ci	__nds32__gie_en();
278c2ecf20Sopenharmony_ci}
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_cistatic inline void GIE_DISABLE(void)
308c2ecf20Sopenharmony_ci{
318c2ecf20Sopenharmony_ci	mb();
328c2ecf20Sopenharmony_ci	__nds32__gie_dis();
338c2ecf20Sopenharmony_ci}
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_cistatic inline unsigned long CACHE_SET(unsigned char cache)
368c2ecf20Sopenharmony_ci{
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	if (cache == ICACHE)
398c2ecf20Sopenharmony_ci		return 64 << ((__nds32__mfsr(NDS32_SR_ICM_CFG) & ICM_CFG_mskISET) >>
408c2ecf20Sopenharmony_ci			      ICM_CFG_offISET);
418c2ecf20Sopenharmony_ci	else
428c2ecf20Sopenharmony_ci		return 64 << ((__nds32__mfsr(NDS32_SR_DCM_CFG) & DCM_CFG_mskDSET) >>
438c2ecf20Sopenharmony_ci			      DCM_CFG_offDSET);
448c2ecf20Sopenharmony_ci}
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_cistatic inline unsigned long CACHE_WAY(unsigned char cache)
478c2ecf20Sopenharmony_ci{
488c2ecf20Sopenharmony_ci
498c2ecf20Sopenharmony_ci	if (cache == ICACHE)
508c2ecf20Sopenharmony_ci		return 1 +
518c2ecf20Sopenharmony_ci		    ((__nds32__mfsr(NDS32_SR_ICM_CFG) & ICM_CFG_mskIWAY) >> ICM_CFG_offIWAY);
528c2ecf20Sopenharmony_ci	else
538c2ecf20Sopenharmony_ci		return 1 +
548c2ecf20Sopenharmony_ci		    ((__nds32__mfsr(NDS32_SR_DCM_CFG) & DCM_CFG_mskDWAY) >> DCM_CFG_offDWAY);
558c2ecf20Sopenharmony_ci}
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_cistatic inline unsigned long CACHE_LINE_SIZE(unsigned char cache)
588c2ecf20Sopenharmony_ci{
598c2ecf20Sopenharmony_ci
608c2ecf20Sopenharmony_ci	if (cache == ICACHE)
618c2ecf20Sopenharmony_ci		return 8 <<
628c2ecf20Sopenharmony_ci		    (((__nds32__mfsr(NDS32_SR_ICM_CFG) & ICM_CFG_mskISZ) >> ICM_CFG_offISZ) - 1);
638c2ecf20Sopenharmony_ci	else
648c2ecf20Sopenharmony_ci		return 8 <<
658c2ecf20Sopenharmony_ci		    (((__nds32__mfsr(NDS32_SR_DCM_CFG) & DCM_CFG_mskDSZ) >> DCM_CFG_offDSZ) - 1);
668c2ecf20Sopenharmony_ci}
678c2ecf20Sopenharmony_ci
688c2ecf20Sopenharmony_ci#endif /* __ASSEMBLY__ */
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci#define IVB_BASE		PHYS_OFFSET	/* in user space for intr/exc/trap/break table base, 64KB aligned
718c2ecf20Sopenharmony_ci						 * We defined at the start of the physical memory */
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci/* dispatched sub-entry exception handler numbering */
748c2ecf20Sopenharmony_ci#define RD_PROT			0	/* read protrection */
758c2ecf20Sopenharmony_ci#define WRT_PROT		1	/* write protection */
768c2ecf20Sopenharmony_ci#define NOEXEC			2	/* non executable */
778c2ecf20Sopenharmony_ci#define PAGE_MODIFY		3	/* page modified */
788c2ecf20Sopenharmony_ci#define ACC_BIT			4	/* access bit */
798c2ecf20Sopenharmony_ci#define RESVED_PTE		5	/* reserved PTE attribute */
808c2ecf20Sopenharmony_ci/* reserved 6 ~ 16 */
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci#endif /* _ASM_NDS32_NDS32_H_ */
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