1/*
2 *  This program is free software; you can redistribute  it and/or modify it
3 *  under  the terms of  the GNU General  Public License as published by the
4 *  Free Software Foundation;  either version 2 of the  License, or (at your
5 *  option) any later version.
6 *
7 *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
8 *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
9 *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
10 *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
11 *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
12 *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
13 *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
14 *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
15 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
16 *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
17 *
18 *  You should have received a copy of the  GNU General Public License along
19 *  with this program; if not, write  to the Free Software Foundation, Inc.,
20 *  675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Copyright 2001 MontaVista Software Inc.
23 * Author: MontaVista Software, Inc.
24 *              ahennessy@mvista.com
25 *
26 * Copyright (C) 2000-2001 Toshiba Corporation
27 * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org)
28 */
29
30#include <linux/init.h>
31#include <linux/kernel.h>
32#include <linux/types.h>
33#include <linux/ioport.h>
34#include <linux/delay.h>
35#include <linux/platform_device.h>
36#include <linux/gpio.h>
37#include <asm/reboot.h>
38#include <asm/txx9pio.h>
39#include <asm/txx9/generic.h>
40#include <asm/txx9/pci.h>
41#include <asm/txx9/jmr3927.h>
42#include <asm/mipsregs.h>
43
44static void jmr3927_machine_restart(char *command)
45{
46	local_irq_disable();
47#if 1	/* Resetting PCI bus */
48	jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
49	jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI, JMR3927_IOC_RESET_ADDR);
50	(void)jmr3927_ioc_reg_in(JMR3927_IOC_RESET_ADDR);	/* flush WB */
51	mdelay(1);
52	jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
53#endif
54	jmr3927_ioc_reg_out(JMR3927_IOC_RESET_CPU, JMR3927_IOC_RESET_ADDR);
55	/* fallback */
56	(*_machine_halt)();
57}
58
59static void __init jmr3927_time_init(void)
60{
61	tx3927_time_init(0, 1);
62}
63
64#define DO_WRITE_THROUGH
65
66static void jmr3927_board_init(void);
67
68static void __init jmr3927_mem_setup(void)
69{
70	set_io_port_base(JMR3927_PORT_BASE + JMR3927_PCIIO);
71
72	_machine_restart = jmr3927_machine_restart;
73
74	/* cache setup */
75	{
76		unsigned int conf;
77#ifdef DO_WRITE_THROUGH
78		int mips_config_cwfon = 0;
79		int mips_config_wbon = 0;
80#else
81		int mips_config_cwfon = 1;
82		int mips_config_wbon = 1;
83#endif
84
85		conf = read_c0_conf();
86		conf &= ~(TX39_CONF_WBON | TX39_CONF_CWFON);
87		conf |= mips_config_wbon ? TX39_CONF_WBON : 0;
88		conf |= mips_config_cwfon ? TX39_CONF_CWFON : 0;
89
90		write_c0_conf(conf);
91		write_c0_cache(0);
92	}
93
94	/* initialize board */
95	jmr3927_board_init();
96
97	tx3927_sio_init(0, 1 << 1); /* ch1: noCTS */
98}
99
100static void __init jmr3927_pci_setup(void)
101{
102#ifdef CONFIG_PCI
103	int extarb = !(tx3927_ccfgptr->ccfg & TX3927_CCFG_PCIXARB);
104	struct pci_controller *c;
105
106	c = txx9_alloc_pci_controller(&txx9_primary_pcic,
107				      JMR3927_PCIMEM, JMR3927_PCIMEM_SIZE,
108				      JMR3927_PCIIO, JMR3927_PCIIO_SIZE);
109	register_pci_controller(c);
110	if (!extarb) {
111		/* Reset PCI Bus */
112		jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
113		udelay(100);
114		jmr3927_ioc_reg_out(JMR3927_IOC_RESET_PCI,
115				    JMR3927_IOC_RESET_ADDR);
116		udelay(100);
117		jmr3927_ioc_reg_out(0, JMR3927_IOC_RESET_ADDR);
118	}
119	tx3927_pcic_setup(c, JMR3927_SDRAM_SIZE, extarb);
120	tx3927_setup_pcierr_irq();
121#endif /* CONFIG_PCI */
122}
123
124static void __init jmr3927_board_init(void)
125{
126	txx9_cpu_clock = JMR3927_CORECLK;
127	/* SDRAMC are configured by PROM */
128
129	/* ROMC */
130	tx3927_romcptr->cr[1] = JMR3927_ROMCE1 | 0x00030048;
131	tx3927_romcptr->cr[2] = JMR3927_ROMCE2 | 0x000064c8;
132	tx3927_romcptr->cr[3] = JMR3927_ROMCE3 | 0x0003f698;
133	tx3927_romcptr->cr[5] = JMR3927_ROMCE5 | 0x0000f218;
134
135	/* Pin selection */
136	tx3927_ccfgptr->pcfg &= ~TX3927_PCFG_SELALL;
137	tx3927_ccfgptr->pcfg |=
138		TX3927_PCFG_SELSIOC(0) | TX3927_PCFG_SELSIO_ALL |
139		(TX3927_PCFG_SELDMA_ALL & ~TX3927_PCFG_SELDMA(1));
140
141	tx3927_setup();
142
143	/* PIO[15:12] connected to LEDs */
144	__raw_writel(0x0000f000, &tx3927_pioptr->dir);
145
146	jmr3927_pci_setup();
147
148	/* SIO0 DTR on */
149	jmr3927_ioc_reg_out(0, JMR3927_IOC_DTR_ADDR);
150
151	jmr3927_led_set(0);
152
153	pr_info("JMR-TX3927 (Rev %d) --- IOC(Rev %d) DIPSW:%d,%d,%d,%d\n",
154		jmr3927_ioc_reg_in(JMR3927_IOC_BREV_ADDR) & JMR3927_REV_MASK,
155		jmr3927_ioc_reg_in(JMR3927_IOC_REV_ADDR) & JMR3927_REV_MASK,
156		jmr3927_dipsw1(), jmr3927_dipsw2(),
157		jmr3927_dipsw3(), jmr3927_dipsw4());
158}
159
160/* This trick makes rtc-ds1742 driver usable as is. */
161static unsigned long jmr3927_swizzle_addr_b(unsigned long port)
162{
163	if ((port & 0xffff0000) != JMR3927_IOC_NVRAMB_ADDR)
164		return port;
165	port = (port & 0xffff0000) | (port & 0x7fff << 1);
166#ifdef __BIG_ENDIAN
167	return port;
168#else
169	return port | 1;
170#endif
171}
172
173static void __init jmr3927_rtc_init(void)
174{
175	static struct resource __initdata res = {
176		.start	= JMR3927_IOC_NVRAMB_ADDR - IO_BASE,
177		.end	= JMR3927_IOC_NVRAMB_ADDR - IO_BASE + 0x800 - 1,
178		.flags	= IORESOURCE_MEM,
179	};
180	platform_device_register_simple("rtc-ds1742", -1, &res, 1);
181}
182
183static void __init jmr3927_mtd_init(void)
184{
185	int i;
186
187	for (i = 0; i < 2; i++)
188		tx3927_mtd_init(i);
189}
190
191static void __init jmr3927_device_init(void)
192{
193	unsigned long iocled_base = JMR3927_IOC_LED_ADDR - IO_BASE;
194#ifdef __LITTLE_ENDIAN
195	iocled_base |= 1;
196#endif
197	__swizzle_addr_b = jmr3927_swizzle_addr_b;
198	jmr3927_rtc_init();
199	tx3927_wdt_init();
200	jmr3927_mtd_init();
201	txx9_iocled_init(iocled_base, -1, 8, 1, "green", NULL);
202}
203
204static void __init jmr3927_arch_init(void)
205{
206	txx9_gpio_init(TX3927_PIO_REG, 0, 16);
207
208	gpio_request(11, "dipsw1");
209	gpio_request(10, "dipsw2");
210}
211
212struct txx9_board_vec jmr3927_vec __initdata = {
213	.system = "Toshiba JMR_TX3927",
214	.prom_init = jmr3927_prom_init,
215	.mem_setup = jmr3927_mem_setup,
216	.irq_setup = jmr3927_irq_setup,
217	.time_init = jmr3927_time_init,
218	.device_init = jmr3927_device_init,
219	.arch_init = jmr3927_arch_init,
220#ifdef CONFIG_PCI
221	.pci_map_irq = jmr3927_pci_map_irq,
222#endif
223};
224