18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2007 Lemote, Inc. & Institute of Computing Technology 48c2ecf20Sopenharmony_ci * Author: Fuxin Zhang, zhangfx@lemote.com 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci#include <linux/pci.h> 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <pci.h> 98c2ecf20Sopenharmony_ci#include <loongson.h> 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_cistatic struct resource loongson_pci_mem_resource = { 128c2ecf20Sopenharmony_ci .name = "pci memory space", 138c2ecf20Sopenharmony_ci .start = LOONGSON_PCI_MEM_START, 148c2ecf20Sopenharmony_ci .end = LOONGSON_PCI_MEM_END, 158c2ecf20Sopenharmony_ci .flags = IORESOURCE_MEM, 168c2ecf20Sopenharmony_ci}; 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_cistatic struct resource loongson_pci_io_resource = { 198c2ecf20Sopenharmony_ci .name = "pci io space", 208c2ecf20Sopenharmony_ci .start = LOONGSON_PCI_IO_START, 218c2ecf20Sopenharmony_ci .end = IO_SPACE_LIMIT, 228c2ecf20Sopenharmony_ci .flags = IORESOURCE_IO, 238c2ecf20Sopenharmony_ci}; 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_cistatic struct pci_controller loongson_pci_controller = { 268c2ecf20Sopenharmony_ci .pci_ops = &loongson_pci_ops, 278c2ecf20Sopenharmony_ci .io_resource = &loongson_pci_io_resource, 288c2ecf20Sopenharmony_ci .mem_resource = &loongson_pci_mem_resource, 298c2ecf20Sopenharmony_ci .mem_offset = 0x00000000UL, 308c2ecf20Sopenharmony_ci .io_offset = 0x00000000UL, 318c2ecf20Sopenharmony_ci}; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_cistatic void __init setup_pcimap(void) 348c2ecf20Sopenharmony_ci{ 358c2ecf20Sopenharmony_ci /* 368c2ecf20Sopenharmony_ci * local to PCI mapping for CPU accessing PCI space 378c2ecf20Sopenharmony_ci * CPU address space [256M,448M] is window for accessing pci space 388c2ecf20Sopenharmony_ci * we set pcimap_lo[0,1,2] to map it to pci space[0M,64M], [320M,448M] 398c2ecf20Sopenharmony_ci * 408c2ecf20Sopenharmony_ci * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0 418c2ecf20Sopenharmony_ci * [<2G] [384M,448M] [320M,384M] [0M,64M] 428c2ecf20Sopenharmony_ci */ 438c2ecf20Sopenharmony_ci LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 | 448c2ecf20Sopenharmony_ci LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) | 458c2ecf20Sopenharmony_ci LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) | 468c2ecf20Sopenharmony_ci LOONGSON_PCIMAP_WIN(0, 0); 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci /* 498c2ecf20Sopenharmony_ci * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] 508c2ecf20Sopenharmony_ci */ 518c2ecf20Sopenharmony_ci LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ 528c2ecf20Sopenharmony_ci /* size: 256M, burst transmission, pre-fetch enable, 64bit */ 538c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul; 548c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful; 558c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT1_SEL_L = 0x00000006ul; /* set this BAR as invalid */ 568c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT1_SEL_H = 0x00000000ul; 578c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT2_SEL_L = 0x00000006ul; /* set this BAR as invalid */ 588c2ecf20Sopenharmony_ci LOONGSON_PCI_HIT2_SEL_H = 0x00000000ul; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci /* avoid deadlock of PCI reading/writing lock operation */ 618c2ecf20Sopenharmony_ci LOONGSON_PCI_ISR4C = 0xd2000001ul; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci /* can not change gnt to break pci transfer when device's gnt not 648c2ecf20Sopenharmony_ci deassert for some broken device */ 658c2ecf20Sopenharmony_ci LOONGSON_PXARB_CFG = 0x00fe0105ul; 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ci#ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG 688c2ecf20Sopenharmony_ci /* 698c2ecf20Sopenharmony_ci * set cpu addr window2 to map CPU address space to PCI address space 708c2ecf20Sopenharmony_ci */ 718c2ecf20Sopenharmony_ci LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC, 728c2ecf20Sopenharmony_ci LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE); 738c2ecf20Sopenharmony_ci#endif 748c2ecf20Sopenharmony_ci} 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ciextern int sbx00_acpi_init(void); 778c2ecf20Sopenharmony_ci 788c2ecf20Sopenharmony_cistatic int __init pcibios_init(void) 798c2ecf20Sopenharmony_ci{ 808c2ecf20Sopenharmony_ci setup_pcimap(); 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci loongson_pci_controller.io_map_base = mips_io_port_base; 838c2ecf20Sopenharmony_ci register_pci_controller(&loongson_pci_controller); 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci return 0; 878c2ecf20Sopenharmony_ci} 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ciarch_initcall(pcibios_init); 90