18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-or-later */ 28c2ecf20Sopenharmony_ci/* ********************************************************************* 38c2ecf20Sopenharmony_ci * SB1250 Board Support Package 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Global constants and macros File: sb1250_defs.h 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * This file contains macros and definitions used by the other 88c2ecf20Sopenharmony_ci * include files. 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * SB1250 specification level: User's manual 1/02/02 118c2ecf20Sopenharmony_ci * 128c2ecf20Sopenharmony_ci ********************************************************************* 138c2ecf20Sopenharmony_ci * 148c2ecf20Sopenharmony_ci * Copyright 2000,2001,2002,2003 158c2ecf20Sopenharmony_ci * Broadcom Corporation. All rights reserved. 168c2ecf20Sopenharmony_ci * 178c2ecf20Sopenharmony_ci ********************************************************************* */ 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_ci#ifndef _SB1250_DEFS_H 208c2ecf20Sopenharmony_ci#define _SB1250_DEFS_H 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci/* 238c2ecf20Sopenharmony_ci * These headers require ANSI C89 string concatenation, and GCC or other 248c2ecf20Sopenharmony_ci * 'long long' (64-bit integer) support. 258c2ecf20Sopenharmony_ci */ 268c2ecf20Sopenharmony_ci#if !defined(__STDC__) && !defined(_MSC_VER) 278c2ecf20Sopenharmony_ci#error SiByte headers require ANSI C89 support 288c2ecf20Sopenharmony_ci#endif 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci/* ********************************************************************* 328c2ecf20Sopenharmony_ci * Macros for feature tests, used to enable include file features 338c2ecf20Sopenharmony_ci * for chip features only present in certain chip revisions. 348c2ecf20Sopenharmony_ci * 358c2ecf20Sopenharmony_ci * SIBYTE_HDR_FEATURES may be defined to be the mask value chip/revision 368c2ecf20Sopenharmony_ci * which is to be exposed by the headers. If undefined, it defaults to 378c2ecf20Sopenharmony_ci * "all features." 388c2ecf20Sopenharmony_ci * 398c2ecf20Sopenharmony_ci * Use like: 408c2ecf20Sopenharmony_ci * 418c2ecf20Sopenharmony_ci * #define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_112x_PASS1 428c2ecf20Sopenharmony_ci * 438c2ecf20Sopenharmony_ci * Generate defines only for that revision of chip. 448c2ecf20Sopenharmony_ci * 458c2ecf20Sopenharmony_ci * #if SIBYTE_HDR_FEATURE(chip,pass) 468c2ecf20Sopenharmony_ci * 478c2ecf20Sopenharmony_ci * True if header features for that revision or later of 488c2ecf20Sopenharmony_ci * that particular chip type are enabled in SIBYTE_HDR_FEATURES. 498c2ecf20Sopenharmony_ci * (Use this to bracket #defines for features present in a given 508c2ecf20Sopenharmony_ci * revision and later.) 518c2ecf20Sopenharmony_ci * 528c2ecf20Sopenharmony_ci * Note that there is no implied ordering between chip types. 538c2ecf20Sopenharmony_ci * 548c2ecf20Sopenharmony_ci * Note also that 'chip' and 'pass' must textually exactly 558c2ecf20Sopenharmony_ci * match the defines below. So, for example, 568c2ecf20Sopenharmony_ci * SIBYTE_HDR_FEATURE(112x, PASS1) is OK, but 578c2ecf20Sopenharmony_ci * SIBYTE_HDR_FEATURE(1120, pass1) is not (for two reasons). 588c2ecf20Sopenharmony_ci * 598c2ecf20Sopenharmony_ci * #if SIBYTE_HDR_FEATURE_UP_TO(chip,pass) 608c2ecf20Sopenharmony_ci * 618c2ecf20Sopenharmony_ci * Same as SIBYTE_HDR_FEATURE, but true for the named revision 628c2ecf20Sopenharmony_ci * and earlier revisions of the named chip type. 638c2ecf20Sopenharmony_ci * 648c2ecf20Sopenharmony_ci * #if SIBYTE_HDR_FEATURE_EXACT(chip,pass) 658c2ecf20Sopenharmony_ci * 668c2ecf20Sopenharmony_ci * Same as SIBYTE_HDR_FEATURE, but only true for the named 678c2ecf20Sopenharmony_ci * revision of the named chip type. (Note that this CANNOT 688c2ecf20Sopenharmony_ci * be used to verify that you're compiling only for that 698c2ecf20Sopenharmony_ci * particular chip/revision. It will be true any time this 708c2ecf20Sopenharmony_ci * chip/revision is included in SIBYTE_HDR_FEATURES.) 718c2ecf20Sopenharmony_ci * 728c2ecf20Sopenharmony_ci * #if SIBYTE_HDR_FEATURE_CHIP(chip) 738c2ecf20Sopenharmony_ci * 748c2ecf20Sopenharmony_ci * True if header features for (any revision of) that chip type 758c2ecf20Sopenharmony_ci * are enabled in SIBYTE_HDR_FEATURES. (Use this to bracket 768c2ecf20Sopenharmony_ci * #defines for features specific to a given chip type.) 778c2ecf20Sopenharmony_ci * 788c2ecf20Sopenharmony_ci * Mask values currently include room for additional revisions of each 798c2ecf20Sopenharmony_ci * chip type, but can be renumbered at will. Note that they MUST fit 808c2ecf20Sopenharmony_ci * into 31 bits and may not include C type constructs, for safe use in 818c2ecf20Sopenharmony_ci * CPP conditionals. Bit positions within chip types DO indicate 828c2ecf20Sopenharmony_ci * ordering, so be careful when adding support for new minor revs. 838c2ecf20Sopenharmony_ci ********************************************************************* */ 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_ALL 0x000000ff 868c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_PASS1 0x00000001 878c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_PASS2 0x00000002 888c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_PASS3 0x00000004 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_112x_ALL 0x00000f00 918c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_112x_PASS1 0x00000100 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1480_ALL 0x0000f000 948c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1480_PASS1 0x00001000 958c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1480_PASS2 0x00002000 968c2ecf20Sopenharmony_ci 978c2ecf20Sopenharmony_ci/* Bit mask for chip/revision. (use _ALL for all revisions of a chip). */ 988c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK(chip, pass) \ 998c2ecf20Sopenharmony_ci (SIBYTE_HDR_FMASK_ ## chip ## _ ## pass) 1008c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_ALLREVS(chip) \ 1018c2ecf20Sopenharmony_ci (SIBYTE_HDR_FMASK_ ## chip ## _ALL) 1028c2ecf20Sopenharmony_ci 1038c2ecf20Sopenharmony_ci/* Default constant value for all chips, all revisions */ 1048c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_ALL \ 1058c2ecf20Sopenharmony_ci (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL \ 1068c2ecf20Sopenharmony_ci | SIBYTE_HDR_FMASK_1480_ALL) 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci/* This one is used for the "original" BCM1250/BCM112x chips. We use this 1098c2ecf20Sopenharmony_ci to weed out constants and macros that do not exist on later chips like 1108c2ecf20Sopenharmony_ci the BCM1480 */ 1118c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_112x_ALL \ 1128c2ecf20Sopenharmony_ci (SIBYTE_HDR_FMASK_1250_ALL | SIBYTE_HDR_FMASK_112x_ALL) 1138c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_1250_112x SIBYTE_HDR_FMASK_1250_112x_ALL 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ci#ifndef SIBYTE_HDR_FEATURES 1168c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURES SIBYTE_HDR_FMASK_ALL 1178c2ecf20Sopenharmony_ci#endif 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci 1208c2ecf20Sopenharmony_ci/* Bit mask for revisions of chip exclusively before the named revision. */ 1218c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_BEFORE(chip, pass) \ 1228c2ecf20Sopenharmony_ci ((SIBYTE_HDR_FMASK(chip, pass) - 1) & SIBYTE_HDR_FMASK_ALLREVS(chip)) 1238c2ecf20Sopenharmony_ci 1248c2ecf20Sopenharmony_ci/* Bit mask for revisions of chip exclusively after the named revision. */ 1258c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FMASK_AFTER(chip, pass) \ 1268c2ecf20Sopenharmony_ci (~(SIBYTE_HDR_FMASK(chip, pass) \ 1278c2ecf20Sopenharmony_ci | (SIBYTE_HDR_FMASK(chip, pass) - 1)) & SIBYTE_HDR_FMASK_ALLREVS(chip)) 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ci/* True if header features enabled for (any revision of) that chip type. */ 1318c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURE_CHIP(chip) \ 1328c2ecf20Sopenharmony_ci (!! (SIBYTE_HDR_FMASK_ALLREVS(chip) & SIBYTE_HDR_FEATURES)) 1338c2ecf20Sopenharmony_ci 1348c2ecf20Sopenharmony_ci/* True for all versions of the BCM1250 and BCM1125, but not true for 1358c2ecf20Sopenharmony_ci anything else */ 1368c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURE_1250_112x \ 1378c2ecf20Sopenharmony_ci (SIBYTE_HDR_FEATURE_CHIP(1250) || SIBYTE_HDR_FEATURE_CHIP(112x)) 1388c2ecf20Sopenharmony_ci/* (!! (SIBYTE_HDR_FEATURES & SIBYHTE_HDR_FMASK_1250_112x)) */ 1398c2ecf20Sopenharmony_ci 1408c2ecf20Sopenharmony_ci/* True if header features enabled for that rev or later, inclusive. */ 1418c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURE(chip, pass) \ 1428c2ecf20Sopenharmony_ci (!! ((SIBYTE_HDR_FMASK(chip, pass) \ 1438c2ecf20Sopenharmony_ci | SIBYTE_HDR_FMASK_AFTER(chip, pass)) & SIBYTE_HDR_FEATURES)) 1448c2ecf20Sopenharmony_ci 1458c2ecf20Sopenharmony_ci/* True if header features enabled for exactly that rev. */ 1468c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURE_EXACT(chip, pass) \ 1478c2ecf20Sopenharmony_ci (!! (SIBYTE_HDR_FMASK(chip, pass) & SIBYTE_HDR_FEATURES)) 1488c2ecf20Sopenharmony_ci 1498c2ecf20Sopenharmony_ci/* True if header features enabled for that rev or before, inclusive. */ 1508c2ecf20Sopenharmony_ci#define SIBYTE_HDR_FEATURE_UP_TO(chip, pass) \ 1518c2ecf20Sopenharmony_ci (!! ((SIBYTE_HDR_FMASK(chip, pass) \ 1528c2ecf20Sopenharmony_ci | SIBYTE_HDR_FMASK_BEFORE(chip, pass)) & SIBYTE_HDR_FEATURES)) 1538c2ecf20Sopenharmony_ci 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ci/* ********************************************************************* 1568c2ecf20Sopenharmony_ci * Naming schemes for constants in these files: 1578c2ecf20Sopenharmony_ci * 1588c2ecf20Sopenharmony_ci * M_xxx MASK constant (identifies bits in a register). 1598c2ecf20Sopenharmony_ci * For multi-bit fields, all bits in the field will 1608c2ecf20Sopenharmony_ci * be set. 1618c2ecf20Sopenharmony_ci * 1628c2ecf20Sopenharmony_ci * K_xxx "Code" constant (value for data in a multi-bit 1638c2ecf20Sopenharmony_ci * field). The value is right justified. 1648c2ecf20Sopenharmony_ci * 1658c2ecf20Sopenharmony_ci * V_xxx "Value" constant. This is the same as the 1668c2ecf20Sopenharmony_ci * corresponding "K_xxx" constant, except it is 1678c2ecf20Sopenharmony_ci * shifted to the correct position in the register. 1688c2ecf20Sopenharmony_ci * 1698c2ecf20Sopenharmony_ci * S_xxx SHIFT constant. This is the number of bits that 1708c2ecf20Sopenharmony_ci * a field value (code) needs to be shifted 1718c2ecf20Sopenharmony_ci * (towards the left) to put the value in the right 1728c2ecf20Sopenharmony_ci * position for the register. 1738c2ecf20Sopenharmony_ci * 1748c2ecf20Sopenharmony_ci * A_xxx ADDRESS constant. This will be a physical 1758c2ecf20Sopenharmony_ci * address. Use the PHYS_TO_K1 macro to generate 1768c2ecf20Sopenharmony_ci * a K1SEG address. 1778c2ecf20Sopenharmony_ci * 1788c2ecf20Sopenharmony_ci * R_xxx RELATIVE offset constant. This is an offset from 1798c2ecf20Sopenharmony_ci * an A_xxx constant (usually the first register in 1808c2ecf20Sopenharmony_ci * a group). 1818c2ecf20Sopenharmony_ci * 1828c2ecf20Sopenharmony_ci * G_xxx(X) GET value. This macro obtains a multi-bit field 1838c2ecf20Sopenharmony_ci * from a register, masks it, and shifts it to 1848c2ecf20Sopenharmony_ci * the bottom of the register (retrieving a K_xxx 1858c2ecf20Sopenharmony_ci * value, for example). 1868c2ecf20Sopenharmony_ci * 1878c2ecf20Sopenharmony_ci * V_xxx(X) VALUE. This macro computes the value of a 1888c2ecf20Sopenharmony_ci * K_xxx constant shifted to the correct position 1898c2ecf20Sopenharmony_ci * in the register. 1908c2ecf20Sopenharmony_ci ********************************************************************* */ 1918c2ecf20Sopenharmony_ci 1928c2ecf20Sopenharmony_ci 1938c2ecf20Sopenharmony_ci 1948c2ecf20Sopenharmony_ci 1958c2ecf20Sopenharmony_ci/* 1968c2ecf20Sopenharmony_ci * Cast to 64-bit number. Presumably the syntax is different in 1978c2ecf20Sopenharmony_ci * assembly language. 1988c2ecf20Sopenharmony_ci * 1998c2ecf20Sopenharmony_ci * Note: you'll need to define uint32_t and uint64_t in your headers. 2008c2ecf20Sopenharmony_ci */ 2018c2ecf20Sopenharmony_ci 2028c2ecf20Sopenharmony_ci#if !defined(__ASSEMBLY__) 2038c2ecf20Sopenharmony_ci#define _SB_MAKE64(x) ((uint64_t)(x)) 2048c2ecf20Sopenharmony_ci#define _SB_MAKE32(x) ((uint32_t)(x)) 2058c2ecf20Sopenharmony_ci#else 2068c2ecf20Sopenharmony_ci#define _SB_MAKE64(x) (x) 2078c2ecf20Sopenharmony_ci#define _SB_MAKE32(x) (x) 2088c2ecf20Sopenharmony_ci#endif 2098c2ecf20Sopenharmony_ci 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ci/* 2128c2ecf20Sopenharmony_ci * Make a mask for 1 bit at position 'n' 2138c2ecf20Sopenharmony_ci */ 2148c2ecf20Sopenharmony_ci 2158c2ecf20Sopenharmony_ci#define _SB_MAKEMASK1(n) (_SB_MAKE64(1) << _SB_MAKE64(n)) 2168c2ecf20Sopenharmony_ci#define _SB_MAKEMASK1_32(n) (_SB_MAKE32(1) << _SB_MAKE32(n)) 2178c2ecf20Sopenharmony_ci 2188c2ecf20Sopenharmony_ci/* 2198c2ecf20Sopenharmony_ci * Make a mask for 'v' bits at position 'n' 2208c2ecf20Sopenharmony_ci */ 2218c2ecf20Sopenharmony_ci 2228c2ecf20Sopenharmony_ci#define _SB_MAKEMASK(v, n) (_SB_MAKE64((_SB_MAKE64(1)<<(v))-1) << _SB_MAKE64(n)) 2238c2ecf20Sopenharmony_ci#define _SB_MAKEMASK_32(v, n) (_SB_MAKE32((_SB_MAKE32(1)<<(v))-1) << _SB_MAKE32(n)) 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_ci/* 2268c2ecf20Sopenharmony_ci * Make a value at 'v' at bit position 'n' 2278c2ecf20Sopenharmony_ci */ 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_ci#define _SB_MAKEVALUE(v, n) (_SB_MAKE64(v) << _SB_MAKE64(n)) 2308c2ecf20Sopenharmony_ci#define _SB_MAKEVALUE_32(v, n) (_SB_MAKE32(v) << _SB_MAKE32(n)) 2318c2ecf20Sopenharmony_ci 2328c2ecf20Sopenharmony_ci#define _SB_GETVALUE(v, n, m) ((_SB_MAKE64(v) & _SB_MAKE64(m)) >> _SB_MAKE64(n)) 2338c2ecf20Sopenharmony_ci#define _SB_GETVALUE_32(v, n, m) ((_SB_MAKE32(v) & _SB_MAKE32(m)) >> _SB_MAKE32(n)) 2348c2ecf20Sopenharmony_ci 2358c2ecf20Sopenharmony_ci/* 2368c2ecf20Sopenharmony_ci * Macros to read/write on-chip registers 2378c2ecf20Sopenharmony_ci * XXX should we do the PHYS_TO_K1 here? 2388c2ecf20Sopenharmony_ci */ 2398c2ecf20Sopenharmony_ci 2408c2ecf20Sopenharmony_ci 2418c2ecf20Sopenharmony_ci#if defined(__mips64) && !defined(__ASSEMBLY__) 2428c2ecf20Sopenharmony_ci#define SBWRITECSR(csr, val) *((volatile uint64_t *) PHYS_TO_K1(csr)) = (val) 2438c2ecf20Sopenharmony_ci#define SBREADCSR(csr) (*((volatile uint64_t *) PHYS_TO_K1(csr))) 2448c2ecf20Sopenharmony_ci#endif /* __ASSEMBLY__ */ 2458c2ecf20Sopenharmony_ci 2468c2ecf20Sopenharmony_ci#endif 247