18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public 38c2ecf20Sopenharmony_ci * License. See the file "COPYING" in the main directory of this archive 48c2ecf20Sopenharmony_ci * for more details. 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Copyright (c) 2014 Imagination Technologies Ltd. 78c2ecf20Sopenharmony_ci * Author: Markos Chandras <markos.chandras@imgtec.com> 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#ifndef __ASM_MIPS_R2_TO_R6_EMUL_H 118c2ecf20Sopenharmony_ci#define __ASM_MIPS_R2_TO_R6_EMUL_H 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_cistruct mips_r2_emulator_stats { 148c2ecf20Sopenharmony_ci u64 movs; 158c2ecf20Sopenharmony_ci u64 hilo; 168c2ecf20Sopenharmony_ci u64 muls; 178c2ecf20Sopenharmony_ci u64 divs; 188c2ecf20Sopenharmony_ci u64 dsps; 198c2ecf20Sopenharmony_ci u64 bops; 208c2ecf20Sopenharmony_ci u64 traps; 218c2ecf20Sopenharmony_ci u64 fpus; 228c2ecf20Sopenharmony_ci u64 loads; 238c2ecf20Sopenharmony_ci u64 stores; 248c2ecf20Sopenharmony_ci u64 llsc; 258c2ecf20Sopenharmony_ci u64 dsemul; 268c2ecf20Sopenharmony_ci}; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_cistruct mips_r2br_emulator_stats { 298c2ecf20Sopenharmony_ci u64 jrs; 308c2ecf20Sopenharmony_ci u64 bltzl; 318c2ecf20Sopenharmony_ci u64 bgezl; 328c2ecf20Sopenharmony_ci u64 bltzll; 338c2ecf20Sopenharmony_ci u64 bgezll; 348c2ecf20Sopenharmony_ci u64 bltzall; 358c2ecf20Sopenharmony_ci u64 bgezall; 368c2ecf20Sopenharmony_ci u64 bltzal; 378c2ecf20Sopenharmony_ci u64 bgezal; 388c2ecf20Sopenharmony_ci u64 beql; 398c2ecf20Sopenharmony_ci u64 bnel; 408c2ecf20Sopenharmony_ci u64 blezl; 418c2ecf20Sopenharmony_ci u64 bgtzl; 428c2ecf20Sopenharmony_ci}; 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci#ifdef CONFIG_DEBUG_FS 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci#define MIPS_R2_STATS(M) \ 478c2ecf20Sopenharmony_cido { \ 488c2ecf20Sopenharmony_ci u32 nir; \ 498c2ecf20Sopenharmony_ci int err; \ 508c2ecf20Sopenharmony_ci \ 518c2ecf20Sopenharmony_ci preempt_disable(); \ 528c2ecf20Sopenharmony_ci __this_cpu_inc(mipsr2emustats.M); \ 538c2ecf20Sopenharmony_ci err = __get_user(nir, (u32 __user *)regs->cp0_epc); \ 548c2ecf20Sopenharmony_ci if (!err) { \ 558c2ecf20Sopenharmony_ci if (nir == BREAK_MATH(0)) \ 568c2ecf20Sopenharmony_ci __this_cpu_inc(mipsr2bdemustats.M); \ 578c2ecf20Sopenharmony_ci } \ 588c2ecf20Sopenharmony_ci preempt_enable(); \ 598c2ecf20Sopenharmony_ci} while (0) 608c2ecf20Sopenharmony_ci 618c2ecf20Sopenharmony_ci#define MIPS_R2BR_STATS(M) \ 628c2ecf20Sopenharmony_cido { \ 638c2ecf20Sopenharmony_ci preempt_disable(); \ 648c2ecf20Sopenharmony_ci __this_cpu_inc(mipsr2bremustats.M); \ 658c2ecf20Sopenharmony_ci preempt_enable(); \ 668c2ecf20Sopenharmony_ci} while (0) 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci#else 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci#define MIPS_R2_STATS(M) do { } while (0) 718c2ecf20Sopenharmony_ci#define MIPS_R2BR_STATS(M) do { } while (0) 728c2ecf20Sopenharmony_ci 738c2ecf20Sopenharmony_ci#endif /* CONFIG_DEBUG_FS */ 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_cistruct r2_decoder_table { 768c2ecf20Sopenharmony_ci u32 mask; 778c2ecf20Sopenharmony_ci u32 code; 788c2ecf20Sopenharmony_ci int (*func)(struct pt_regs *regs, u32 inst); 798c2ecf20Sopenharmony_ci}; 808c2ecf20Sopenharmony_ci 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ciextern void do_trap_or_bp(struct pt_regs *regs, unsigned int code, int si_code, 838c2ecf20Sopenharmony_ci const char *str); 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ci#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR 868c2ecf20Sopenharmony_cistatic int mipsr2_emulation; 878c2ecf20Sopenharmony_cistatic inline int mipsr2_decoder(struct pt_regs *regs, u32 inst, 888c2ecf20Sopenharmony_ci unsigned long *fcr31) 898c2ecf20Sopenharmony_ci{ 908c2ecf20Sopenharmony_ci return 0; 918c2ecf20Sopenharmony_ci}; 928c2ecf20Sopenharmony_ci#else 938c2ecf20Sopenharmony_ci/* MIPS R2 Emulator ON/OFF */ 948c2ecf20Sopenharmony_ciextern int mipsr2_emulation; 958c2ecf20Sopenharmony_ciextern int mipsr2_decoder(struct pt_regs *regs, u32 inst, 968c2ecf20Sopenharmony_ci unsigned long *fcr31); 978c2ecf20Sopenharmony_ci#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */ 988c2ecf20Sopenharmony_ci 998c2ecf20Sopenharmony_ci#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation) 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_ci#endif /* __ASM_MIPS_R2_TO_R6_EMUL_H */ 102