18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Helpfile for jazzdma.c -- Mips Jazz R4030 DMA controller support 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci#ifndef _ASM_JAZZDMA_H 68c2ecf20Sopenharmony_ci#define _ASM_JAZZDMA_H 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci/* 98c2ecf20Sopenharmony_ci * Prototypes and macros 108c2ecf20Sopenharmony_ci */ 118c2ecf20Sopenharmony_ciextern unsigned long vdma_alloc(unsigned long paddr, unsigned long size); 128c2ecf20Sopenharmony_ciextern int vdma_free(unsigned long laddr); 138c2ecf20Sopenharmony_ciextern unsigned long vdma_phys2log(unsigned long paddr); 148c2ecf20Sopenharmony_ciextern unsigned long vdma_log2phys(unsigned long laddr); 158c2ecf20Sopenharmony_ciextern void vdma_stats(void); /* for debugging only */ 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ciextern void vdma_enable(int channel); 188c2ecf20Sopenharmony_ciextern void vdma_disable(int channel); 198c2ecf20Sopenharmony_ciextern void vdma_set_mode(int channel, int mode); 208c2ecf20Sopenharmony_ciextern void vdma_set_addr(int channel, long addr); 218c2ecf20Sopenharmony_ciextern void vdma_set_count(int channel, int count); 228c2ecf20Sopenharmony_ciextern int vdma_get_residue(int channel); 238c2ecf20Sopenharmony_ciextern int vdma_get_enable(int channel); 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci/* 268c2ecf20Sopenharmony_ci * some definitions used by the driver functions 278c2ecf20Sopenharmony_ci */ 288c2ecf20Sopenharmony_ci#define VDMA_PAGESIZE 4096 298c2ecf20Sopenharmony_ci#define VDMA_PGTBL_ENTRIES 4096 308c2ecf20Sopenharmony_ci#define VDMA_PGTBL_SIZE (sizeof(VDMA_PGTBL_ENTRY) * VDMA_PGTBL_ENTRIES) 318c2ecf20Sopenharmony_ci#define VDMA_PAGE_EMPTY 0xff000000 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci/* 348c2ecf20Sopenharmony_ci * Macros to get page no. and offset of a given address 358c2ecf20Sopenharmony_ci * Note that VDMA_PAGE() works for physical addresses only 368c2ecf20Sopenharmony_ci */ 378c2ecf20Sopenharmony_ci#define VDMA_PAGE(a) ((unsigned int)(a) >> 12) 388c2ecf20Sopenharmony_ci#define VDMA_OFFSET(a) ((unsigned int)(a) & (VDMA_PAGESIZE-1)) 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci/* 418c2ecf20Sopenharmony_ci * VDMA pagetable entry description 428c2ecf20Sopenharmony_ci */ 438c2ecf20Sopenharmony_citypedef volatile struct VDMA_PGTBL_ENTRY { 448c2ecf20Sopenharmony_ci unsigned int frame; /* physical frame no. */ 458c2ecf20Sopenharmony_ci unsigned int owner; /* owner of this entry (0=free) */ 468c2ecf20Sopenharmony_ci} VDMA_PGTBL_ENTRY; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci/* 508c2ecf20Sopenharmony_ci * DMA channel control registers 518c2ecf20Sopenharmony_ci * in the R4030 MCT_ADR chip 528c2ecf20Sopenharmony_ci */ 538c2ecf20Sopenharmony_ci#define JAZZ_R4030_CHNL_MODE 0xE0000100 /* 8 DMA Channel Mode Registers, */ 548c2ecf20Sopenharmony_ci /* 0xE0000100,120,140... */ 558c2ecf20Sopenharmony_ci#define JAZZ_R4030_CHNL_ENABLE 0xE0000108 /* 8 DMA Channel Enable Regs, */ 568c2ecf20Sopenharmony_ci /* 0xE0000108,128,148... */ 578c2ecf20Sopenharmony_ci#define JAZZ_R4030_CHNL_COUNT 0xE0000110 /* 8 DMA Channel Byte Cnt Regs, */ 588c2ecf20Sopenharmony_ci /* 0xE0000110,130,150... */ 598c2ecf20Sopenharmony_ci#define JAZZ_R4030_CHNL_ADDR 0xE0000118 /* 8 DMA Channel Address Regs, */ 608c2ecf20Sopenharmony_ci /* 0xE0000118,138,158... */ 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci/* channel enable register bits */ 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci#define R4030_CHNL_ENABLE (1<<0) 658c2ecf20Sopenharmony_ci#define R4030_CHNL_WRITE (1<<1) 668c2ecf20Sopenharmony_ci#define R4030_TC_INTR (1<<8) 678c2ecf20Sopenharmony_ci#define R4030_MEM_INTR (1<<9) 688c2ecf20Sopenharmony_ci#define R4030_ADDR_INTR (1<<10) 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci/* 718c2ecf20Sopenharmony_ci * Channel mode register bits 728c2ecf20Sopenharmony_ci */ 738c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_40 (0) /* device access time on remote bus */ 748c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_80 (1) 758c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_120 (2) 768c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_160 (3) 778c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_200 (4) 788c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_240 (5) 798c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_280 (6) 808c2ecf20Sopenharmony_ci#define R4030_MODE_ATIME_320 (7) 818c2ecf20Sopenharmony_ci#define R4030_MODE_WIDTH_8 (1<<3) /* device data bus width */ 828c2ecf20Sopenharmony_ci#define R4030_MODE_WIDTH_16 (2<<3) 838c2ecf20Sopenharmony_ci#define R4030_MODE_WIDTH_32 (3<<3) 848c2ecf20Sopenharmony_ci#define R4030_MODE_INTR_EN (1<<5) 858c2ecf20Sopenharmony_ci#define R4030_MODE_BURST (1<<6) /* Rev. 2 only */ 868c2ecf20Sopenharmony_ci#define R4030_MODE_FAST_ACK (1<<7) /* Rev. 2 only */ 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci#endif /* _ASM_JAZZDMA_H */ 89