18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci#ifndef ASM_EDAC_H 38c2ecf20Sopenharmony_ci#define ASM_EDAC_H 48c2ecf20Sopenharmony_ci 58c2ecf20Sopenharmony_ci#include <asm/compiler.h> 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci/* ECC atomic, DMA, SMP and interrupt safe scrub function */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_cistatic inline void edac_atomic_scrub(void *va, u32 size) 108c2ecf20Sopenharmony_ci{ 118c2ecf20Sopenharmony_ci unsigned long *virt_addr = va; 128c2ecf20Sopenharmony_ci unsigned long temp; 138c2ecf20Sopenharmony_ci u32 i; 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci for (i = 0; i < size / sizeof(unsigned long); i++) { 168c2ecf20Sopenharmony_ci /* 178c2ecf20Sopenharmony_ci * Very carefully read and write to memory atomically 188c2ecf20Sopenharmony_ci * so we are interrupt, DMA and SMP safe. 198c2ecf20Sopenharmony_ci * 208c2ecf20Sopenharmony_ci * Intel: asm("lock; addl $0, %0"::"m"(*virt_addr)); 218c2ecf20Sopenharmony_ci */ 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci __asm__ __volatile__ ( 248c2ecf20Sopenharmony_ci " .set push \n" 258c2ecf20Sopenharmony_ci " .set mips2 \n" 268c2ecf20Sopenharmony_ci "1: ll %0, %1 # edac_atomic_scrub \n" 278c2ecf20Sopenharmony_ci " addu %0, $0 \n" 288c2ecf20Sopenharmony_ci " sc %0, %1 \n" 298c2ecf20Sopenharmony_ci " beqz %0, 1b \n" 308c2ecf20Sopenharmony_ci " .set pop \n" 318c2ecf20Sopenharmony_ci : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr) 328c2ecf20Sopenharmony_ci : GCC_OFF_SMALL_ASM() (*virt_addr)); 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci virt_addr++; 358c2ecf20Sopenharmony_ci } 368c2ecf20Sopenharmony_ci} 378c2ecf20Sopenharmony_ci 388c2ecf20Sopenharmony_ci#endif 39