18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * GPR board platform device registration (Au1550)
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright (C) 2010 Wolfgang Grandegger <wg@denx.de>
68c2ecf20Sopenharmony_ci */
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#include <linux/delay.h>
98c2ecf20Sopenharmony_ci#include <linux/init.h>
108c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
118c2ecf20Sopenharmony_ci#include <linux/kernel.h>
128c2ecf20Sopenharmony_ci#include <linux/platform_device.h>
138c2ecf20Sopenharmony_ci#include <linux/pm.h>
148c2ecf20Sopenharmony_ci#include <linux/mtd/partitions.h>
158c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h>
168c2ecf20Sopenharmony_ci#include <linux/leds.h>
178c2ecf20Sopenharmony_ci#include <linux/gpio.h>
188c2ecf20Sopenharmony_ci#include <linux/i2c.h>
198c2ecf20Sopenharmony_ci#include <linux/platform_data/i2c-gpio.h>
208c2ecf20Sopenharmony_ci#include <linux/gpio/machine.h>
218c2ecf20Sopenharmony_ci#include <asm/bootinfo.h>
228c2ecf20Sopenharmony_ci#include <asm/idle.h>
238c2ecf20Sopenharmony_ci#include <asm/reboot.h>
248c2ecf20Sopenharmony_ci#include <asm/setup.h>
258c2ecf20Sopenharmony_ci#include <asm/mach-au1x00/au1000.h>
268c2ecf20Sopenharmony_ci#include <asm/mach-au1x00/gpio-au1000.h>
278c2ecf20Sopenharmony_ci#include <prom.h>
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ciconst char *get_system_type(void)
308c2ecf20Sopenharmony_ci{
318c2ecf20Sopenharmony_ci	return "GPR";
328c2ecf20Sopenharmony_ci}
338c2ecf20Sopenharmony_ci
348c2ecf20Sopenharmony_civoid prom_putchar(char c)
358c2ecf20Sopenharmony_ci{
368c2ecf20Sopenharmony_ci	alchemy_uart_putchar(AU1000_UART0_PHYS_ADDR, c);
378c2ecf20Sopenharmony_ci}
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_cistatic void gpr_reset(char *c)
408c2ecf20Sopenharmony_ci{
418c2ecf20Sopenharmony_ci	/* switch System-LED to orange (red# and green# on) */
428c2ecf20Sopenharmony_ci	alchemy_gpio_direction_output(4, 0);
438c2ecf20Sopenharmony_ci	alchemy_gpio_direction_output(5, 0);
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	/* trigger watchdog to reset board in 200ms */
468c2ecf20Sopenharmony_ci	printk(KERN_EMERG "Triggering watchdog soft reset...\n");
478c2ecf20Sopenharmony_ci	raw_local_irq_disable();
488c2ecf20Sopenharmony_ci	alchemy_gpio_direction_output(1, 0);
498c2ecf20Sopenharmony_ci	udelay(1);
508c2ecf20Sopenharmony_ci	alchemy_gpio_set_value(1, 1);
518c2ecf20Sopenharmony_ci	while (1)
528c2ecf20Sopenharmony_ci		cpu_wait();
538c2ecf20Sopenharmony_ci}
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_cistatic void gpr_power_off(void)
568c2ecf20Sopenharmony_ci{
578c2ecf20Sopenharmony_ci	while (1)
588c2ecf20Sopenharmony_ci		cpu_wait();
598c2ecf20Sopenharmony_ci}
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_civoid __init board_setup(void)
628c2ecf20Sopenharmony_ci{
638c2ecf20Sopenharmony_ci	printk(KERN_INFO "Trapeze ITS GPR board\n");
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci	pm_power_off = gpr_power_off;
668c2ecf20Sopenharmony_ci	_machine_halt = gpr_power_off;
678c2ecf20Sopenharmony_ci	_machine_restart = gpr_reset;
688c2ecf20Sopenharmony_ci
698c2ecf20Sopenharmony_ci	/* Enable UART1/3 */
708c2ecf20Sopenharmony_ci	alchemy_uart_enable(AU1000_UART3_PHYS_ADDR);
718c2ecf20Sopenharmony_ci	alchemy_uart_enable(AU1000_UART1_PHYS_ADDR);
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci	/* Take away Reset of UMTS-card */
748c2ecf20Sopenharmony_ci	alchemy_gpio_direction_output(215, 1);
758c2ecf20Sopenharmony_ci}
768c2ecf20Sopenharmony_ci
778c2ecf20Sopenharmony_ci/*
788c2ecf20Sopenharmony_ci * Watchdog
798c2ecf20Sopenharmony_ci */
808c2ecf20Sopenharmony_cistatic struct resource gpr_wdt_resource[] = {
818c2ecf20Sopenharmony_ci	[0] = {
828c2ecf20Sopenharmony_ci		.start	= 1,
838c2ecf20Sopenharmony_ci		.end	= 1,
848c2ecf20Sopenharmony_ci		.name	= "gpr-adm6320-wdt",
858c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_IRQ,
868c2ecf20Sopenharmony_ci	}
878c2ecf20Sopenharmony_ci};
888c2ecf20Sopenharmony_ci
898c2ecf20Sopenharmony_cistatic struct platform_device gpr_wdt_device = {
908c2ecf20Sopenharmony_ci	.name = "adm6320-wdt",
918c2ecf20Sopenharmony_ci	.id = 0,
928c2ecf20Sopenharmony_ci	.num_resources = ARRAY_SIZE(gpr_wdt_resource),
938c2ecf20Sopenharmony_ci	.resource = gpr_wdt_resource,
948c2ecf20Sopenharmony_ci};
958c2ecf20Sopenharmony_ci
968c2ecf20Sopenharmony_ci/*
978c2ecf20Sopenharmony_ci * FLASH
988c2ecf20Sopenharmony_ci *
998c2ecf20Sopenharmony_ci * 0x00000000-0x00200000 : "kernel"
1008c2ecf20Sopenharmony_ci * 0x00200000-0x00a00000 : "rootfs"
1018c2ecf20Sopenharmony_ci * 0x01d00000-0x01f00000 : "config"
1028c2ecf20Sopenharmony_ci * 0x01c00000-0x01d00000 : "yamon"
1038c2ecf20Sopenharmony_ci * 0x01d00000-0x01d40000 : "yamon env vars"
1048c2ecf20Sopenharmony_ci * 0x00000000-0x00a00000 : "kernel+rootfs"
1058c2ecf20Sopenharmony_ci */
1068c2ecf20Sopenharmony_cistatic struct mtd_partition gpr_mtd_partitions[] = {
1078c2ecf20Sopenharmony_ci	{
1088c2ecf20Sopenharmony_ci		.name	= "kernel",
1098c2ecf20Sopenharmony_ci		.size	= 0x00200000,
1108c2ecf20Sopenharmony_ci		.offset = 0,
1118c2ecf20Sopenharmony_ci	},
1128c2ecf20Sopenharmony_ci	{
1138c2ecf20Sopenharmony_ci		.name	= "rootfs",
1148c2ecf20Sopenharmony_ci		.size	= 0x00800000,
1158c2ecf20Sopenharmony_ci		.offset = MTDPART_OFS_APPEND,
1168c2ecf20Sopenharmony_ci		.mask_flags = MTD_WRITEABLE,
1178c2ecf20Sopenharmony_ci	},
1188c2ecf20Sopenharmony_ci	{
1198c2ecf20Sopenharmony_ci		.name	= "config",
1208c2ecf20Sopenharmony_ci		.size	= 0x00200000,
1218c2ecf20Sopenharmony_ci		.offset = 0x01d00000,
1228c2ecf20Sopenharmony_ci	},
1238c2ecf20Sopenharmony_ci	{
1248c2ecf20Sopenharmony_ci		.name	= "yamon",
1258c2ecf20Sopenharmony_ci		.size	= 0x00100000,
1268c2ecf20Sopenharmony_ci		.offset = 0x01c00000,
1278c2ecf20Sopenharmony_ci	},
1288c2ecf20Sopenharmony_ci	{
1298c2ecf20Sopenharmony_ci		.name	= "yamon env vars",
1308c2ecf20Sopenharmony_ci		.size	= 0x00040000,
1318c2ecf20Sopenharmony_ci		.offset = MTDPART_OFS_APPEND,
1328c2ecf20Sopenharmony_ci	},
1338c2ecf20Sopenharmony_ci	{
1348c2ecf20Sopenharmony_ci		.name	= "kernel+rootfs",
1358c2ecf20Sopenharmony_ci		.size	= 0x00a00000,
1368c2ecf20Sopenharmony_ci		.offset = 0,
1378c2ecf20Sopenharmony_ci	},
1388c2ecf20Sopenharmony_ci};
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_cistatic struct physmap_flash_data gpr_flash_data = {
1418c2ecf20Sopenharmony_ci	.width		= 4,
1428c2ecf20Sopenharmony_ci	.nr_parts	= ARRAY_SIZE(gpr_mtd_partitions),
1438c2ecf20Sopenharmony_ci	.parts		= gpr_mtd_partitions,
1448c2ecf20Sopenharmony_ci};
1458c2ecf20Sopenharmony_ci
1468c2ecf20Sopenharmony_cistatic struct resource gpr_mtd_resource = {
1478c2ecf20Sopenharmony_ci	.start	= 0x1e000000,
1488c2ecf20Sopenharmony_ci	.end	= 0x1fffffff,
1498c2ecf20Sopenharmony_ci	.flags	= IORESOURCE_MEM,
1508c2ecf20Sopenharmony_ci};
1518c2ecf20Sopenharmony_ci
1528c2ecf20Sopenharmony_cistatic struct platform_device gpr_mtd_device = {
1538c2ecf20Sopenharmony_ci	.name		= "physmap-flash",
1548c2ecf20Sopenharmony_ci	.dev		= {
1558c2ecf20Sopenharmony_ci		.platform_data	= &gpr_flash_data,
1568c2ecf20Sopenharmony_ci	},
1578c2ecf20Sopenharmony_ci	.num_resources	= 1,
1588c2ecf20Sopenharmony_ci	.resource	= &gpr_mtd_resource,
1598c2ecf20Sopenharmony_ci};
1608c2ecf20Sopenharmony_ci
1618c2ecf20Sopenharmony_ci/*
1628c2ecf20Sopenharmony_ci * LEDs
1638c2ecf20Sopenharmony_ci */
1648c2ecf20Sopenharmony_cistatic const struct gpio_led gpr_gpio_leds[] = {
1658c2ecf20Sopenharmony_ci	{	/* green */
1668c2ecf20Sopenharmony_ci		.name			= "gpr:green",
1678c2ecf20Sopenharmony_ci		.gpio			= 4,
1688c2ecf20Sopenharmony_ci		.active_low		= 1,
1698c2ecf20Sopenharmony_ci	},
1708c2ecf20Sopenharmony_ci	{	/* red */
1718c2ecf20Sopenharmony_ci		.name			= "gpr:red",
1728c2ecf20Sopenharmony_ci		.gpio			= 5,
1738c2ecf20Sopenharmony_ci		.active_low		= 1,
1748c2ecf20Sopenharmony_ci	}
1758c2ecf20Sopenharmony_ci};
1768c2ecf20Sopenharmony_ci
1778c2ecf20Sopenharmony_cistatic struct gpio_led_platform_data gpr_led_data = {
1788c2ecf20Sopenharmony_ci	.num_leds = ARRAY_SIZE(gpr_gpio_leds),
1798c2ecf20Sopenharmony_ci	.leds = gpr_gpio_leds,
1808c2ecf20Sopenharmony_ci};
1818c2ecf20Sopenharmony_ci
1828c2ecf20Sopenharmony_cistatic struct platform_device gpr_led_devices = {
1838c2ecf20Sopenharmony_ci	.name = "leds-gpio",
1848c2ecf20Sopenharmony_ci	.id = -1,
1858c2ecf20Sopenharmony_ci	.dev = {
1868c2ecf20Sopenharmony_ci		.platform_data = &gpr_led_data,
1878c2ecf20Sopenharmony_ci	}
1888c2ecf20Sopenharmony_ci};
1898c2ecf20Sopenharmony_ci
1908c2ecf20Sopenharmony_ci/*
1918c2ecf20Sopenharmony_ci * I2C
1928c2ecf20Sopenharmony_ci */
1938c2ecf20Sopenharmony_cistatic struct gpiod_lookup_table gpr_i2c_gpiod_table = {
1948c2ecf20Sopenharmony_ci	.dev_id = "i2c-gpio",
1958c2ecf20Sopenharmony_ci	.table = {
1968c2ecf20Sopenharmony_ci		/*
1978c2ecf20Sopenharmony_ci		 * This should be on "GPIO2" which has base at 200 so
1988c2ecf20Sopenharmony_ci		 * the global numbers 209 and 210 should correspond to
1998c2ecf20Sopenharmony_ci		 * local offsets 9 and 10.
2008c2ecf20Sopenharmony_ci		 */
2018c2ecf20Sopenharmony_ci		GPIO_LOOKUP_IDX("alchemy-gpio2", 9, NULL, 0,
2028c2ecf20Sopenharmony_ci				GPIO_ACTIVE_HIGH),
2038c2ecf20Sopenharmony_ci		GPIO_LOOKUP_IDX("alchemy-gpio2", 10, NULL, 1,
2048c2ecf20Sopenharmony_ci				GPIO_ACTIVE_HIGH),
2058c2ecf20Sopenharmony_ci	},
2068c2ecf20Sopenharmony_ci};
2078c2ecf20Sopenharmony_ci
2088c2ecf20Sopenharmony_cistatic struct i2c_gpio_platform_data gpr_i2c_data = {
2098c2ecf20Sopenharmony_ci	/*
2108c2ecf20Sopenharmony_ci	 * The open drain mode is hardwired somewhere or an electrical
2118c2ecf20Sopenharmony_ci	 * property of the alchemy GPIO controller.
2128c2ecf20Sopenharmony_ci	 */
2138c2ecf20Sopenharmony_ci	.sda_is_open_drain	= 1,
2148c2ecf20Sopenharmony_ci	.scl_is_open_drain	= 1,
2158c2ecf20Sopenharmony_ci	.udelay			= 2,		/* ~100 kHz */
2168c2ecf20Sopenharmony_ci	.timeout		= HZ,
2178c2ecf20Sopenharmony_ci};
2188c2ecf20Sopenharmony_ci
2198c2ecf20Sopenharmony_cistatic struct platform_device gpr_i2c_device = {
2208c2ecf20Sopenharmony_ci	.name			= "i2c-gpio",
2218c2ecf20Sopenharmony_ci	.id			= -1,
2228c2ecf20Sopenharmony_ci	.dev.platform_data	= &gpr_i2c_data,
2238c2ecf20Sopenharmony_ci};
2248c2ecf20Sopenharmony_ci
2258c2ecf20Sopenharmony_cistatic struct i2c_board_info gpr_i2c_info[] __initdata = {
2268c2ecf20Sopenharmony_ci	{
2278c2ecf20Sopenharmony_ci		I2C_BOARD_INFO("lm83", 0x18),
2288c2ecf20Sopenharmony_ci	}
2298c2ecf20Sopenharmony_ci};
2308c2ecf20Sopenharmony_ci
2318c2ecf20Sopenharmony_ci
2328c2ecf20Sopenharmony_ci
2338c2ecf20Sopenharmony_cistatic struct resource alchemy_pci_host_res[] = {
2348c2ecf20Sopenharmony_ci	[0] = {
2358c2ecf20Sopenharmony_ci		.start	= AU1500_PCI_PHYS_ADDR,
2368c2ecf20Sopenharmony_ci		.end	= AU1500_PCI_PHYS_ADDR + 0xfff,
2378c2ecf20Sopenharmony_ci		.flags	= IORESOURCE_MEM,
2388c2ecf20Sopenharmony_ci	},
2398c2ecf20Sopenharmony_ci};
2408c2ecf20Sopenharmony_ci
2418c2ecf20Sopenharmony_cistatic int gpr_map_pci_irq(const struct pci_dev *d, u8 slot, u8 pin)
2428c2ecf20Sopenharmony_ci{
2438c2ecf20Sopenharmony_ci	if ((slot == 0) && (pin == 1))
2448c2ecf20Sopenharmony_ci		return AU1550_PCI_INTA;
2458c2ecf20Sopenharmony_ci	else if ((slot == 0) && (pin == 2))
2468c2ecf20Sopenharmony_ci		return AU1550_PCI_INTB;
2478c2ecf20Sopenharmony_ci
2488c2ecf20Sopenharmony_ci	return 0xff;
2498c2ecf20Sopenharmony_ci}
2508c2ecf20Sopenharmony_ci
2518c2ecf20Sopenharmony_cistatic struct alchemy_pci_platdata gpr_pci_pd = {
2528c2ecf20Sopenharmony_ci	.board_map_irq	= gpr_map_pci_irq,
2538c2ecf20Sopenharmony_ci	.pci_cfg_set	= PCI_CONFIG_AEN | PCI_CONFIG_R2H | PCI_CONFIG_R1H |
2548c2ecf20Sopenharmony_ci			  PCI_CONFIG_CH |
2558c2ecf20Sopenharmony_ci#if defined(__MIPSEB__)
2568c2ecf20Sopenharmony_ci			  PCI_CONFIG_SIC_HWA_DAT | PCI_CONFIG_SM,
2578c2ecf20Sopenharmony_ci#else
2588c2ecf20Sopenharmony_ci			  0,
2598c2ecf20Sopenharmony_ci#endif
2608c2ecf20Sopenharmony_ci};
2618c2ecf20Sopenharmony_ci
2628c2ecf20Sopenharmony_cistatic struct platform_device gpr_pci_host_dev = {
2638c2ecf20Sopenharmony_ci	.dev.platform_data = &gpr_pci_pd,
2648c2ecf20Sopenharmony_ci	.name		= "alchemy-pci",
2658c2ecf20Sopenharmony_ci	.id		= 0,
2668c2ecf20Sopenharmony_ci	.num_resources	= ARRAY_SIZE(alchemy_pci_host_res),
2678c2ecf20Sopenharmony_ci	.resource	= alchemy_pci_host_res,
2688c2ecf20Sopenharmony_ci};
2698c2ecf20Sopenharmony_ci
2708c2ecf20Sopenharmony_cistatic struct platform_device *gpr_devices[] __initdata = {
2718c2ecf20Sopenharmony_ci	&gpr_wdt_device,
2728c2ecf20Sopenharmony_ci	&gpr_mtd_device,
2738c2ecf20Sopenharmony_ci	&gpr_i2c_device,
2748c2ecf20Sopenharmony_ci	&gpr_led_devices,
2758c2ecf20Sopenharmony_ci};
2768c2ecf20Sopenharmony_ci
2778c2ecf20Sopenharmony_cistatic int __init gpr_pci_init(void)
2788c2ecf20Sopenharmony_ci{
2798c2ecf20Sopenharmony_ci	return platform_device_register(&gpr_pci_host_dev);
2808c2ecf20Sopenharmony_ci}
2818c2ecf20Sopenharmony_ci/* must be arch_initcall; MIPS PCI scans busses in a subsys_initcall */
2828c2ecf20Sopenharmony_ciarch_initcall(gpr_pci_init);
2838c2ecf20Sopenharmony_ci
2848c2ecf20Sopenharmony_ci
2858c2ecf20Sopenharmony_cistatic int __init gpr_dev_init(void)
2868c2ecf20Sopenharmony_ci{
2878c2ecf20Sopenharmony_ci	gpiod_add_lookup_table(&gpr_i2c_gpiod_table);
2888c2ecf20Sopenharmony_ci	i2c_register_board_info(0, gpr_i2c_info, ARRAY_SIZE(gpr_i2c_info));
2898c2ecf20Sopenharmony_ci
2908c2ecf20Sopenharmony_ci	return platform_add_devices(gpr_devices, ARRAY_SIZE(gpr_devices));
2918c2ecf20Sopenharmony_ci}
2928c2ecf20Sopenharmony_cidevice_initcall(gpr_dev_init);
293