18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci 38c2ecf20Sopenharmony_ciconfig TRACE_IRQFLAGS_SUPPORT 48c2ecf20Sopenharmony_ci bool 58c2ecf20Sopenharmony_ci default y 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ciconfig EARLY_PRINTK 88c2ecf20Sopenharmony_ci bool "Early printk" if EXPERT 98c2ecf20Sopenharmony_ci depends on SYS_HAS_EARLY_PRINTK 108c2ecf20Sopenharmony_ci default y 118c2ecf20Sopenharmony_ci help 128c2ecf20Sopenharmony_ci This option enables special console drivers which allow the kernel 138c2ecf20Sopenharmony_ci to print messages very early in the bootup process. 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci This is useful for kernel debugging when your machine crashes very 168c2ecf20Sopenharmony_ci early before the console code is initialized. For normal operation, 178c2ecf20Sopenharmony_ci it is not recommended because it looks ugly on some machines and 188c2ecf20Sopenharmony_ci doesn't cooperate with an X server. You should normally say N here, 198c2ecf20Sopenharmony_ci unless you want to debug such a crash. 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ciconfig EARLY_PRINTK_8250 228c2ecf20Sopenharmony_ci bool 238c2ecf20Sopenharmony_ci depends on EARLY_PRINTK && USE_GENERIC_EARLY_PRINTK_8250 248c2ecf20Sopenharmony_ci default y 258c2ecf20Sopenharmony_ci help 268c2ecf20Sopenharmony_ci "8250/16550 and compatible serial early printk driver" 278c2ecf20Sopenharmony_ci If you say Y here, it will be possible to use a 8250/16550 serial 288c2ecf20Sopenharmony_ci port as the boot console. 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ciconfig USE_GENERIC_EARLY_PRINTK_8250 318c2ecf20Sopenharmony_ci bool 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ciconfig CMDLINE_BOOL 348c2ecf20Sopenharmony_ci bool "Built-in kernel command line" 358c2ecf20Sopenharmony_ci help 368c2ecf20Sopenharmony_ci For most systems, it is firmware or second stage bootloader that 378c2ecf20Sopenharmony_ci by default specifies the kernel command line options. However, 388c2ecf20Sopenharmony_ci it might be necessary or advantageous to either override the 398c2ecf20Sopenharmony_ci default kernel command line or add a few extra options to it. 408c2ecf20Sopenharmony_ci For such cases, this option allows you to hardcode your own 418c2ecf20Sopenharmony_ci command line options directly into the kernel. For that, you 428c2ecf20Sopenharmony_ci should choose 'Y' here, and fill in the extra boot arguments 438c2ecf20Sopenharmony_ci in CONFIG_CMDLINE. 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci The built-in options will be concatenated to the default command 468c2ecf20Sopenharmony_ci line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default 478c2ecf20Sopenharmony_ci command line will be ignored and replaced by the built-in string. 488c2ecf20Sopenharmony_ci 498c2ecf20Sopenharmony_ci Most MIPS systems will normally expect 'N' here and rely upon 508c2ecf20Sopenharmony_ci the command line from the firmware or the second-stage bootloader. 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ciconfig CMDLINE 538c2ecf20Sopenharmony_ci string "Default kernel command string" 548c2ecf20Sopenharmony_ci depends on CMDLINE_BOOL 558c2ecf20Sopenharmony_ci help 568c2ecf20Sopenharmony_ci On some platforms, there is currently no way for the boot loader to 578c2ecf20Sopenharmony_ci pass arguments to the kernel. For these platforms, and for the cases 588c2ecf20Sopenharmony_ci when you want to add some extra options to the command line or ignore 598c2ecf20Sopenharmony_ci the default command line, you can supply some command-line options at 608c2ecf20Sopenharmony_ci build time by entering them here. In other cases you can specify 618c2ecf20Sopenharmony_ci kernel args so that you don't have to set them up in board prom 628c2ecf20Sopenharmony_ci initialization routines. 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE 658c2ecf20Sopenharmony_ci options. 668c2ecf20Sopenharmony_ci 678c2ecf20Sopenharmony_ciconfig CMDLINE_OVERRIDE 688c2ecf20Sopenharmony_ci bool "Built-in command line overrides firmware arguments" 698c2ecf20Sopenharmony_ci depends on CMDLINE_BOOL 708c2ecf20Sopenharmony_ci help 718c2ecf20Sopenharmony_ci By setting this option to 'Y' you will have your kernel ignore 728c2ecf20Sopenharmony_ci command line arguments from firmware or second stage bootloader. 738c2ecf20Sopenharmony_ci Instead, the built-in command line will be used exclusively. 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci Normally, you will choose 'N' here. 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciconfig SB1XXX_CORELIS 788c2ecf20Sopenharmony_ci bool "Corelis Debugger" 798c2ecf20Sopenharmony_ci depends on SIBYTE_SB1xxx_SOC 808c2ecf20Sopenharmony_ci select DEBUG_INFO if !COMPILE_TEST 818c2ecf20Sopenharmony_ci help 828c2ecf20Sopenharmony_ci Select compile flags that produce code that can be processed by the 838c2ecf20Sopenharmony_ci Corelis mksym utility and UDB Emulator. 848c2ecf20Sopenharmony_ci 858c2ecf20Sopenharmony_ciconfig DEBUG_ZBOOT 868c2ecf20Sopenharmony_ci bool "Enable compressed kernel support debugging" 878c2ecf20Sopenharmony_ci depends on DEBUG_KERNEL && SYS_SUPPORTS_ZBOOT 888c2ecf20Sopenharmony_ci default n 898c2ecf20Sopenharmony_ci help 908c2ecf20Sopenharmony_ci If you want to add compressed kernel support to a new board, and the 918c2ecf20Sopenharmony_ci board supports uart16550 compatible serial port, please select 928c2ecf20Sopenharmony_ci SYS_SUPPORTS_ZBOOT_UART16550 for your board and enable this option to 938c2ecf20Sopenharmony_ci debug it. 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci If your board doesn't support uart16550 compatible serial port, you 968c2ecf20Sopenharmony_ci can try to select SYS_SUPPORTS_ZBOOT and use the other methods to 978c2ecf20Sopenharmony_ci debug it. for example, add a new serial port support just as 988c2ecf20Sopenharmony_ci arch/mips/boot/compressed/uart-16550.c does. 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci After the compressed kernel support works, please disable this option 1018c2ecf20Sopenharmony_ci to reduce the kernel image size and speed up the booting procedure a 1028c2ecf20Sopenharmony_ci little. 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ciconfig SPINLOCK_TEST 1058c2ecf20Sopenharmony_ci bool "Enable spinlock timing tests in debugfs" 1068c2ecf20Sopenharmony_ci depends on DEBUG_FS 1078c2ecf20Sopenharmony_ci default n 1088c2ecf20Sopenharmony_ci help 1098c2ecf20Sopenharmony_ci Add several files to the debugfs to test spinlock speed. 1108c2ecf20Sopenharmony_ci 1118c2ecf20Sopenharmony_ciconfig SCACHE_DEBUGFS 1128c2ecf20Sopenharmony_ci bool "L2 cache debugfs entries" 1138c2ecf20Sopenharmony_ci depends on DEBUG_FS 1148c2ecf20Sopenharmony_ci help 1158c2ecf20Sopenharmony_ci Enable this to allow parts of the L2 cache configuration, such as 1168c2ecf20Sopenharmony_ci whether or not prefetching is enabled, to be exposed to userland 1178c2ecf20Sopenharmony_ci via debugfs. 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_ci If unsure, say N. 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_cimenuconfig MIPS_CPS_NS16550_BOOL 1228c2ecf20Sopenharmony_ci bool "CPS SMP NS16550 UART output" 1238c2ecf20Sopenharmony_ci depends on MIPS_CPS 1248c2ecf20Sopenharmony_ci help 1258c2ecf20Sopenharmony_ci Output debug information via an ns16550 compatible UART if exceptions 1268c2ecf20Sopenharmony_ci occur early in the boot process of a secondary core. 1278c2ecf20Sopenharmony_ci 1288c2ecf20Sopenharmony_ciif MIPS_CPS_NS16550_BOOL 1298c2ecf20Sopenharmony_ci 1308c2ecf20Sopenharmony_ciconfig MIPS_CPS_NS16550 1318c2ecf20Sopenharmony_ci def_bool MIPS_CPS_NS16550_BASE != 0 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciconfig MIPS_CPS_NS16550_BASE 1348c2ecf20Sopenharmony_ci hex "UART Base Address" 1358c2ecf20Sopenharmony_ci default 0x1b0003f8 if MIPS_MALTA 1368c2ecf20Sopenharmony_ci default 0 1378c2ecf20Sopenharmony_ci help 1388c2ecf20Sopenharmony_ci The base address of the ns16550 compatible UART on which to output 1398c2ecf20Sopenharmony_ci debug information from the early stages of core startup. 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ci This is only used if non-zero. 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_ciconfig MIPS_CPS_NS16550_SHIFT 1448c2ecf20Sopenharmony_ci int "UART Register Shift" 1458c2ecf20Sopenharmony_ci default 0 1468c2ecf20Sopenharmony_ci help 1478c2ecf20Sopenharmony_ci The number of bits to shift ns16550 register indices by in order to 1488c2ecf20Sopenharmony_ci form their addresses. That is, log base 2 of the span between 1498c2ecf20Sopenharmony_ci adjacent ns16550 registers in the system. 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ciconfig MIPS_CPS_NS16550_WIDTH 1528c2ecf20Sopenharmony_ci int "UART Register Width" 1538c2ecf20Sopenharmony_ci default 1 1548c2ecf20Sopenharmony_ci help 1558c2ecf20Sopenharmony_ci ns16550 registers width. UART registers IO access methods will be 1568c2ecf20Sopenharmony_ci selected in accordance with this parameter. By setting it to 1, 2 or 1578c2ecf20Sopenharmony_ci 4 UART registers will be accessed by means of lb/sb, lh/sh or lw/sw 1588c2ecf20Sopenharmony_ci instructions respectively. Any value not from that set activates 1598c2ecf20Sopenharmony_ci lb/sb instructions. 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ciendif # MIPS_CPS_NS16550_BOOL 162