18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci#include <linux/linkage.h>
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ci/*
58c2ecf20Sopenharmony_ci* modulo operation for 32 bit integers.
68c2ecf20Sopenharmony_ci*	Input :	op1 in Reg r5
78c2ecf20Sopenharmony_ci*		op2 in Reg r6
88c2ecf20Sopenharmony_ci*	Output: op1 mod op2 in Reg r3
98c2ecf20Sopenharmony_ci*/
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci	.text
128c2ecf20Sopenharmony_ci	.globl	__modsi3
138c2ecf20Sopenharmony_ci	.type __modsi3,  @function
148c2ecf20Sopenharmony_ci	.ent __modsi3
158c2ecf20Sopenharmony_ci
168c2ecf20Sopenharmony_ci__modsi3:
178c2ecf20Sopenharmony_ci	.frame	r1, 0, r15
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci	addik	r1, r1, -16
208c2ecf20Sopenharmony_ci	swi	r28, r1, 0
218c2ecf20Sopenharmony_ci	swi	r29, r1, 4
228c2ecf20Sopenharmony_ci	swi	r30, r1, 8
238c2ecf20Sopenharmony_ci	swi	r31, r1, 12
248c2ecf20Sopenharmony_ci
258c2ecf20Sopenharmony_ci	beqi	r6, div_by_zero /* div_by_zero division error */
268c2ecf20Sopenharmony_ci	beqi	r5, result_is_zero /* result is zero */
278c2ecf20Sopenharmony_ci	bgeid	r5, r5_pos
288c2ecf20Sopenharmony_ci	/* get the sign of the result [ depends only on the first arg] */
298c2ecf20Sopenharmony_ci	add	r28, r5, r0
308c2ecf20Sopenharmony_ci	rsubi	r5, r5, 0	 /* make r5 positive */
318c2ecf20Sopenharmony_cir5_pos:
328c2ecf20Sopenharmony_ci	bgei	r6, r6_pos
338c2ecf20Sopenharmony_ci	rsubi	r6, r6, 0	 /* make r6 positive */
348c2ecf20Sopenharmony_cir6_pos:
358c2ecf20Sopenharmony_ci	addik	r3, r0, 0 /* clear mod */
368c2ecf20Sopenharmony_ci	addik	r30, r0, 0 /* clear div */
378c2ecf20Sopenharmony_ci	addik	r29, r0, 32 /* initialize the loop count */
388c2ecf20Sopenharmony_ci/* first part try to find the first '1' in the r5 */
398c2ecf20Sopenharmony_cidiv1:
408c2ecf20Sopenharmony_ci	add	r5, r5, r5 /* left shift logical r5 */
418c2ecf20Sopenharmony_ci	bgeid	r5, div1
428c2ecf20Sopenharmony_ci	addik	r29, r29, -1
438c2ecf20Sopenharmony_cidiv2:
448c2ecf20Sopenharmony_ci	/* left shift logical r5 get the '1' into the carry */
458c2ecf20Sopenharmony_ci	add	r5, r5, r5
468c2ecf20Sopenharmony_ci	addc	r3, r3, r3 /* move that bit into the mod register */
478c2ecf20Sopenharmony_ci	rsub	r31, r6, r3 /* try to subtract (r30 a r6) */
488c2ecf20Sopenharmony_ci	blti	r31, mod_too_small
498c2ecf20Sopenharmony_ci	/* move the r31 to mod since the result was positive */
508c2ecf20Sopenharmony_ci	or	r3, r0, r31
518c2ecf20Sopenharmony_ci	addik	r30, r30, 1
528c2ecf20Sopenharmony_cimod_too_small:
538c2ecf20Sopenharmony_ci	addik	r29, r29, -1
548c2ecf20Sopenharmony_ci	beqi	r29, loop_end
558c2ecf20Sopenharmony_ci	add	r30, r30, r30 /* shift in the '1' into div */
568c2ecf20Sopenharmony_ci	bri	div2 /* div2 */
578c2ecf20Sopenharmony_ciloop_end:
588c2ecf20Sopenharmony_ci	bgei	r28, return_here
598c2ecf20Sopenharmony_ci	brid	return_here
608c2ecf20Sopenharmony_ci	rsubi	r3, r3, 0 /* negate the result */
618c2ecf20Sopenharmony_cidiv_by_zero:
628c2ecf20Sopenharmony_ciresult_is_zero:
638c2ecf20Sopenharmony_ci	or	r3, r0, r0 /* set result to 0 [both mod as well as div are 0] */
648c2ecf20Sopenharmony_cireturn_here:
658c2ecf20Sopenharmony_ci/* restore values of csrs and that of r3 and the divisor and the dividend */
668c2ecf20Sopenharmony_ci	lwi	r28, r1, 0
678c2ecf20Sopenharmony_ci	lwi	r29, r1, 4
688c2ecf20Sopenharmony_ci	lwi	r30, r1, 8
698c2ecf20Sopenharmony_ci	lwi	r31, r1, 12
708c2ecf20Sopenharmony_ci	rtsd	r15, 8
718c2ecf20Sopenharmony_ci	addik	r1, r1, 16
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci.size __modsi3,  . - __modsi3
748c2ecf20Sopenharmony_ci.end __modsi3
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