1/* SPDX-License-Identifier: GPL-2.0 */ 2/* 3 * Preliminary support for HW exception handing for Microblaze 4 * 5 * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> 6 * Copyright (C) 2008-2009 PetaLogix 7 * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au> 8 */ 9 10#ifndef _ASM_MICROBLAZE_EXCEPTIONS_H 11#define _ASM_MICROBLAZE_EXCEPTIONS_H 12 13#ifdef __KERNEL__ 14 15#ifndef CONFIG_MMU 16#define EX_HANDLER_STACK_SIZ (4*19) 17#endif 18 19#ifndef __ASSEMBLY__ 20 21/* Macros to enable and disable HW exceptions in the MSR */ 22/* Define MSR enable bit for HW exceptions */ 23#define HWEX_MSR_BIT (1 << 8) 24 25#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR 26#define __enable_hw_exceptions() \ 27 __asm__ __volatile__ (" msrset r0, %0; \ 28 nop;" \ 29 : \ 30 : "i" (HWEX_MSR_BIT) \ 31 : "memory") 32 33#define __disable_hw_exceptions() \ 34 __asm__ __volatile__ (" msrclr r0, %0; \ 35 nop;" \ 36 : \ 37 : "i" (HWEX_MSR_BIT) \ 38 : "memory") 39#else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ 40#define __enable_hw_exceptions() \ 41 __asm__ __volatile__ (" \ 42 mfs r12, rmsr; \ 43 nop; \ 44 ori r12, r12, %0; \ 45 mts rmsr, r12; \ 46 nop;" \ 47 : \ 48 : "i" (HWEX_MSR_BIT) \ 49 : "memory", "r12") 50 51#define __disable_hw_exceptions() \ 52 __asm__ __volatile__ (" \ 53 mfs r12, rmsr; \ 54 nop; \ 55 andi r12, r12, ~%0; \ 56 mts rmsr, r12; \ 57 nop;" \ 58 : \ 59 : "i" (HWEX_MSR_BIT) \ 60 : "memory", "r12") 61#endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */ 62 63asmlinkage void full_exception(struct pt_regs *regs, unsigned int type, 64 int fsr, int addr); 65 66asmlinkage void sw_exception(struct pt_regs *regs); 67void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig); 68 69void die(const char *str, struct pt_regs *fp, long err); 70void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr); 71 72#endif /*__ASSEMBLY__ */ 73#endif /* __KERNEL__ */ 74#endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */ 75