18c2ecf20Sopenharmony_ci# SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ciconfig MICROBLAZE 38c2ecf20Sopenharmony_ci def_bool y 48c2ecf20Sopenharmony_ci select ARCH_32BIT_OFF_T 58c2ecf20Sopenharmony_ci select ARCH_NO_SWAP 68c2ecf20Sopenharmony_ci select ARCH_HAS_BINFMT_FLAT if !MMU 78c2ecf20Sopenharmony_ci select ARCH_HAS_DMA_PREP_COHERENT 88c2ecf20Sopenharmony_ci select ARCH_HAS_GCOV_PROFILE_ALL 98c2ecf20Sopenharmony_ci select ARCH_HAS_SYNC_DMA_FOR_CPU 108c2ecf20Sopenharmony_ci select ARCH_HAS_SYNC_DMA_FOR_DEVICE 118c2ecf20Sopenharmony_ci select ARCH_HAS_DMA_SET_UNCACHED if !MMU 128c2ecf20Sopenharmony_ci select ARCH_MIGHT_HAVE_PC_PARPORT 138c2ecf20Sopenharmony_ci select ARCH_WANT_IPC_PARSE_VERSION 148c2ecf20Sopenharmony_ci select BUILDTIME_TABLE_SORT 158c2ecf20Sopenharmony_ci select TIMER_OF 168c2ecf20Sopenharmony_ci select CLONE_BACKWARDS3 178c2ecf20Sopenharmony_ci select COMMON_CLK 188c2ecf20Sopenharmony_ci select DMA_DIRECT_REMAP if MMU 198c2ecf20Sopenharmony_ci select GENERIC_ATOMIC64 208c2ecf20Sopenharmony_ci select GENERIC_CLOCKEVENTS 218c2ecf20Sopenharmony_ci select GENERIC_CPU_DEVICES 228c2ecf20Sopenharmony_ci select GENERIC_IDLE_POLL_SETUP 238c2ecf20Sopenharmony_ci select GENERIC_IRQ_PROBE 248c2ecf20Sopenharmony_ci select GENERIC_IRQ_SHOW 258c2ecf20Sopenharmony_ci select GENERIC_PCI_IOMAP 268c2ecf20Sopenharmony_ci select GENERIC_SCHED_CLOCK 278c2ecf20Sopenharmony_ci select HAVE_ARCH_HASH 288c2ecf20Sopenharmony_ci select HAVE_ARCH_KGDB 298c2ecf20Sopenharmony_ci select HAVE_ARCH_SECCOMP 308c2ecf20Sopenharmony_ci select HAVE_DEBUG_KMEMLEAK 318c2ecf20Sopenharmony_ci select HAVE_DMA_CONTIGUOUS 328c2ecf20Sopenharmony_ci select HAVE_DYNAMIC_FTRACE 338c2ecf20Sopenharmony_ci select HAVE_FTRACE_MCOUNT_RECORD 348c2ecf20Sopenharmony_ci select HAVE_FUNCTION_GRAPH_TRACER 358c2ecf20Sopenharmony_ci select HAVE_FUNCTION_TRACER 368c2ecf20Sopenharmony_ci select HAVE_OPROFILE 378c2ecf20Sopenharmony_ci select HAVE_PCI 388c2ecf20Sopenharmony_ci select IRQ_DOMAIN 398c2ecf20Sopenharmony_ci select XILINX_INTC 408c2ecf20Sopenharmony_ci select MODULES_USE_ELF_RELA 418c2ecf20Sopenharmony_ci select OF 428c2ecf20Sopenharmony_ci select OF_EARLY_FLATTREE 438c2ecf20Sopenharmony_ci select PCI_DOMAINS_GENERIC if PCI 448c2ecf20Sopenharmony_ci select PCI_SYSCALL if PCI 458c2ecf20Sopenharmony_ci select TRACING_SUPPORT 468c2ecf20Sopenharmony_ci select VIRT_TO_BUS 478c2ecf20Sopenharmony_ci select CPU_NO_EFFICIENT_FFS 488c2ecf20Sopenharmony_ci select MMU_GATHER_NO_RANGE if MMU 498c2ecf20Sopenharmony_ci select SPARSE_IRQ 508c2ecf20Sopenharmony_ci select SET_FS 518c2ecf20Sopenharmony_ci 528c2ecf20Sopenharmony_ci# Endianness selection 538c2ecf20Sopenharmony_cichoice 548c2ecf20Sopenharmony_ci prompt "Endianness selection" 558c2ecf20Sopenharmony_ci default CPU_LITTLE_ENDIAN 568c2ecf20Sopenharmony_ci help 578c2ecf20Sopenharmony_ci microblaze architectures can be configured for either little or 588c2ecf20Sopenharmony_ci big endian formats. Be sure to select the appropriate mode. 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ciconfig CPU_BIG_ENDIAN 618c2ecf20Sopenharmony_ci bool "Big endian" 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ciconfig CPU_LITTLE_ENDIAN 648c2ecf20Sopenharmony_ci bool "Little endian" 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ciendchoice 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ciconfig ZONE_DMA 698c2ecf20Sopenharmony_ci def_bool y 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ciconfig ARCH_HAS_ILOG2_U32 728c2ecf20Sopenharmony_ci def_bool n 738c2ecf20Sopenharmony_ci 748c2ecf20Sopenharmony_ciconfig ARCH_HAS_ILOG2_U64 758c2ecf20Sopenharmony_ci def_bool n 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ciconfig GENERIC_HWEIGHT 788c2ecf20Sopenharmony_ci def_bool y 798c2ecf20Sopenharmony_ci 808c2ecf20Sopenharmony_ciconfig GENERIC_CALIBRATE_DELAY 818c2ecf20Sopenharmony_ci def_bool y 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ciconfig GENERIC_CSUM 848c2ecf20Sopenharmony_ci def_bool y 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ciconfig STACKTRACE_SUPPORT 878c2ecf20Sopenharmony_ci def_bool y 888c2ecf20Sopenharmony_ci 898c2ecf20Sopenharmony_ciconfig LOCKDEP_SUPPORT 908c2ecf20Sopenharmony_ci def_bool y 918c2ecf20Sopenharmony_ci 928c2ecf20Sopenharmony_cisource "arch/microblaze/Kconfig.platform" 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_cimenu "Processor type and features" 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_cisource "kernel/Kconfig.hz" 978c2ecf20Sopenharmony_ci 988c2ecf20Sopenharmony_ciconfig MMU 998c2ecf20Sopenharmony_ci bool "MMU support" 1008c2ecf20Sopenharmony_ci default n 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_cicomment "Boot options" 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ciconfig CMDLINE_BOOL 1058c2ecf20Sopenharmony_ci bool "Default bootloader kernel arguments" 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ciconfig CMDLINE 1088c2ecf20Sopenharmony_ci string "Default kernel command string" 1098c2ecf20Sopenharmony_ci depends on CMDLINE_BOOL 1108c2ecf20Sopenharmony_ci default "console=ttyUL0,115200" 1118c2ecf20Sopenharmony_ci help 1128c2ecf20Sopenharmony_ci On some architectures there is currently no way for the boot loader 1138c2ecf20Sopenharmony_ci to pass arguments to the kernel. For these architectures, you should 1148c2ecf20Sopenharmony_ci supply some command-line options at build time by entering them 1158c2ecf20Sopenharmony_ci here. 1168c2ecf20Sopenharmony_ci 1178c2ecf20Sopenharmony_ciconfig CMDLINE_FORCE 1188c2ecf20Sopenharmony_ci bool "Force default kernel command string" 1198c2ecf20Sopenharmony_ci depends on CMDLINE_BOOL 1208c2ecf20Sopenharmony_ci default n 1218c2ecf20Sopenharmony_ci help 1228c2ecf20Sopenharmony_ci Set this to have arguments from the default kernel command string 1238c2ecf20Sopenharmony_ci override those passed by the boot loader. 1248c2ecf20Sopenharmony_ci 1258c2ecf20Sopenharmony_ciendmenu 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_cimenu "Kernel features" 1288c2ecf20Sopenharmony_ci 1298c2ecf20Sopenharmony_ciconfig NR_CPUS 1308c2ecf20Sopenharmony_ci int 1318c2ecf20Sopenharmony_ci default "1" 1328c2ecf20Sopenharmony_ci 1338c2ecf20Sopenharmony_ciconfig ADVANCED_OPTIONS 1348c2ecf20Sopenharmony_ci bool "Prompt for advanced kernel configuration options" 1358c2ecf20Sopenharmony_ci help 1368c2ecf20Sopenharmony_ci This option will enable prompting for a variety of advanced kernel 1378c2ecf20Sopenharmony_ci configuration options. These options can cause the kernel to not 1388c2ecf20Sopenharmony_ci work if they are set incorrectly, but can be used to optimize certain 1398c2ecf20Sopenharmony_ci aspects of kernel memory management. 1408c2ecf20Sopenharmony_ci 1418c2ecf20Sopenharmony_ci Unless you know what you are doing, say N here. 1428c2ecf20Sopenharmony_ci 1438c2ecf20Sopenharmony_cicomment "Default settings for advanced configuration options are used" 1448c2ecf20Sopenharmony_ci depends on !ADVANCED_OPTIONS 1458c2ecf20Sopenharmony_ci 1468c2ecf20Sopenharmony_ciconfig XILINX_UNCACHED_SHADOW 1478c2ecf20Sopenharmony_ci bool "Are you using uncached shadow for RAM ?" 1488c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS && !MMU 1498c2ecf20Sopenharmony_ci default n 1508c2ecf20Sopenharmony_ci help 1518c2ecf20Sopenharmony_ci This is needed to be able to allocate uncachable memory regions. 1528c2ecf20Sopenharmony_ci The feature requires the design to define the RAM memory controller 1538c2ecf20Sopenharmony_ci window to be twice as large as the actual physical memory. 1548c2ecf20Sopenharmony_ci 1558c2ecf20Sopenharmony_ciconfig HIGHMEM 1568c2ecf20Sopenharmony_ci bool "High memory support" 1578c2ecf20Sopenharmony_ci depends on MMU 1588c2ecf20Sopenharmony_ci help 1598c2ecf20Sopenharmony_ci The address space of Microblaze processors is only 4 Gigabytes large 1608c2ecf20Sopenharmony_ci and it has to accommodate user address space, kernel address 1618c2ecf20Sopenharmony_ci space as well as some memory mapped IO. That means that, if you 1628c2ecf20Sopenharmony_ci have a large amount of physical memory and/or IO, not all of the 1638c2ecf20Sopenharmony_ci memory can be "permanently mapped" by the kernel. The physical 1648c2ecf20Sopenharmony_ci memory that is not permanently mapped is called "high memory". 1658c2ecf20Sopenharmony_ci 1668c2ecf20Sopenharmony_ci If unsure, say n. 1678c2ecf20Sopenharmony_ci 1688c2ecf20Sopenharmony_ciconfig LOWMEM_SIZE_BOOL 1698c2ecf20Sopenharmony_ci bool "Set maximum low memory" 1708c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS && MMU 1718c2ecf20Sopenharmony_ci help 1728c2ecf20Sopenharmony_ci This option allows you to set the maximum amount of memory which 1738c2ecf20Sopenharmony_ci will be used as "low memory", that is, memory which the kernel can 1748c2ecf20Sopenharmony_ci access directly, without having to set up a kernel virtual mapping. 1758c2ecf20Sopenharmony_ci This can be useful in optimizing the layout of kernel virtual 1768c2ecf20Sopenharmony_ci memory. 1778c2ecf20Sopenharmony_ci 1788c2ecf20Sopenharmony_ci Say N here unless you know what you are doing. 1798c2ecf20Sopenharmony_ci 1808c2ecf20Sopenharmony_ciconfig LOWMEM_SIZE 1818c2ecf20Sopenharmony_ci hex "Maximum low memory size (in bytes)" if LOWMEM_SIZE_BOOL 1828c2ecf20Sopenharmony_ci default "0x30000000" 1838c2ecf20Sopenharmony_ci 1848c2ecf20Sopenharmony_ciconfig MANUAL_RESET_VECTOR 1858c2ecf20Sopenharmony_ci hex "Microblaze reset vector address setup" 1868c2ecf20Sopenharmony_ci default "0x0" 1878c2ecf20Sopenharmony_ci help 1888c2ecf20Sopenharmony_ci Set this option to have the kernel override the CPU Reset vector. 1898c2ecf20Sopenharmony_ci If zero, no change will be made to the MicroBlaze reset vector at 1908c2ecf20Sopenharmony_ci address 0x0. 1918c2ecf20Sopenharmony_ci If non-zero, a jump instruction to this address, will be written 1928c2ecf20Sopenharmony_ci to the reset vector at address 0x0. 1938c2ecf20Sopenharmony_ci If you are unsure, set it to default value 0x0. 1948c2ecf20Sopenharmony_ci 1958c2ecf20Sopenharmony_ciconfig KERNEL_START_BOOL 1968c2ecf20Sopenharmony_ci bool "Set custom kernel base address" 1978c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS 1988c2ecf20Sopenharmony_ci help 1998c2ecf20Sopenharmony_ci This option allows you to set the kernel virtual address at which 2008c2ecf20Sopenharmony_ci the kernel will map low memory (the kernel image will be linked at 2018c2ecf20Sopenharmony_ci this address). This can be useful in optimizing the virtual memory 2028c2ecf20Sopenharmony_ci layout of the system. 2038c2ecf20Sopenharmony_ci 2048c2ecf20Sopenharmony_ci Say N here unless you know what you are doing. 2058c2ecf20Sopenharmony_ci 2068c2ecf20Sopenharmony_ciconfig KERNEL_START 2078c2ecf20Sopenharmony_ci hex "Virtual address of kernel base" if KERNEL_START_BOOL 2088c2ecf20Sopenharmony_ci default "0xc0000000" if MMU 2098c2ecf20Sopenharmony_ci default KERNEL_BASE_ADDR if !MMU 2108c2ecf20Sopenharmony_ci 2118c2ecf20Sopenharmony_ciconfig TASK_SIZE_BOOL 2128c2ecf20Sopenharmony_ci bool "Set custom user task size" 2138c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS && MMU 2148c2ecf20Sopenharmony_ci help 2158c2ecf20Sopenharmony_ci This option allows you to set the amount of virtual address space 2168c2ecf20Sopenharmony_ci allocated to user tasks. This can be useful in optimizing the 2178c2ecf20Sopenharmony_ci virtual memory layout of the system. 2188c2ecf20Sopenharmony_ci 2198c2ecf20Sopenharmony_ci Say N here unless you know what you are doing. 2208c2ecf20Sopenharmony_ci 2218c2ecf20Sopenharmony_ciconfig TASK_SIZE 2228c2ecf20Sopenharmony_ci hex "Size of user task space" if TASK_SIZE_BOOL 2238c2ecf20Sopenharmony_ci default "0x80000000" 2248c2ecf20Sopenharmony_ci 2258c2ecf20Sopenharmony_cichoice 2268c2ecf20Sopenharmony_ci prompt "Page size" 2278c2ecf20Sopenharmony_ci default MICROBLAZE_4K_PAGES 2288c2ecf20Sopenharmony_ci depends on ADVANCED_OPTIONS && !MMU 2298c2ecf20Sopenharmony_ci help 2308c2ecf20Sopenharmony_ci Select the kernel logical page size. Increasing the page size 2318c2ecf20Sopenharmony_ci will reduce software overhead at each page boundary, allow 2328c2ecf20Sopenharmony_ci hardware prefetch mechanisms to be more effective, and allow 2338c2ecf20Sopenharmony_ci larger dma transfers increasing IO efficiency and reducing 2348c2ecf20Sopenharmony_ci overhead. However the utilization of memory will increase. 2358c2ecf20Sopenharmony_ci For example, each cached file will using a multiple of the 2368c2ecf20Sopenharmony_ci page size to hold its contents and the difference between the 2378c2ecf20Sopenharmony_ci end of file and the end of page is wasted. 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci If unsure, choose 4K_PAGES. 2408c2ecf20Sopenharmony_ci 2418c2ecf20Sopenharmony_ciconfig MICROBLAZE_4K_PAGES 2428c2ecf20Sopenharmony_ci bool "4k page size" 2438c2ecf20Sopenharmony_ci 2448c2ecf20Sopenharmony_ciconfig MICROBLAZE_16K_PAGES 2458c2ecf20Sopenharmony_ci bool "16k page size" 2468c2ecf20Sopenharmony_ci 2478c2ecf20Sopenharmony_ciconfig MICROBLAZE_64K_PAGES 2488c2ecf20Sopenharmony_ci bool "64k page size" 2498c2ecf20Sopenharmony_ci 2508c2ecf20Sopenharmony_ciendchoice 2518c2ecf20Sopenharmony_ci 2528c2ecf20Sopenharmony_ciendmenu 2538c2ecf20Sopenharmony_ci 2548c2ecf20Sopenharmony_cimenu "Bus Options" 2558c2ecf20Sopenharmony_ci 2568c2ecf20Sopenharmony_ciconfig PCI_XILINX 2578c2ecf20Sopenharmony_ci bool "Xilinx PCI host bridge support" 2588c2ecf20Sopenharmony_ci depends on PCI 2598c2ecf20Sopenharmony_ci 2608c2ecf20Sopenharmony_ciendmenu 261