18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Miscellaneous Mac68K-specific stuff
48c2ecf20Sopenharmony_ci */
58c2ecf20Sopenharmony_ci
68c2ecf20Sopenharmony_ci#include <linux/types.h>
78c2ecf20Sopenharmony_ci#include <linux/errno.h>
88c2ecf20Sopenharmony_ci#include <linux/kernel.h>
98c2ecf20Sopenharmony_ci#include <linux/delay.h>
108c2ecf20Sopenharmony_ci#include <linux/sched.h>
118c2ecf20Sopenharmony_ci#include <linux/time.h>
128c2ecf20Sopenharmony_ci#include <linux/rtc.h>
138c2ecf20Sopenharmony_ci#include <linux/mm.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_ci#include <linux/adb.h>
168c2ecf20Sopenharmony_ci#include <linux/cuda.h>
178c2ecf20Sopenharmony_ci#include <linux/pmu.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci#include <linux/uaccess.h>
208c2ecf20Sopenharmony_ci#include <asm/io.h>
218c2ecf20Sopenharmony_ci#include <asm/segment.h>
228c2ecf20Sopenharmony_ci#include <asm/setup.h>
238c2ecf20Sopenharmony_ci#include <asm/macintosh.h>
248c2ecf20Sopenharmony_ci#include <asm/mac_via.h>
258c2ecf20Sopenharmony_ci#include <asm/mac_oss.h>
268c2ecf20Sopenharmony_ci
278c2ecf20Sopenharmony_ci#include <asm/machdep.h>
288c2ecf20Sopenharmony_ci
298c2ecf20Sopenharmony_ci/*
308c2ecf20Sopenharmony_ci * Offset between Unix time (1970-based) and Mac time (1904-based). Cuda and PMU
318c2ecf20Sopenharmony_ci * times wrap in 2040. If we need to handle later times, the read_time functions
328c2ecf20Sopenharmony_ci * need to be changed to interpret wrapped times as post-2040.
338c2ecf20Sopenharmony_ci */
348c2ecf20Sopenharmony_ci
358c2ecf20Sopenharmony_ci#define RTC_OFFSET 2082844800
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_cistatic void (*rom_reset)(void);
388c2ecf20Sopenharmony_ci
398c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_NVRAM)
408c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
418c2ecf20Sopenharmony_cistatic unsigned char cuda_pram_read_byte(int offset)
428c2ecf20Sopenharmony_ci{
438c2ecf20Sopenharmony_ci	struct adb_request req;
448c2ecf20Sopenharmony_ci
458c2ecf20Sopenharmony_ci	if (cuda_request(&req, NULL, 4, CUDA_PACKET, CUDA_GET_PRAM,
468c2ecf20Sopenharmony_ci			 (offset >> 8) & 0xFF, offset & 0xFF) < 0)
478c2ecf20Sopenharmony_ci		return 0;
488c2ecf20Sopenharmony_ci	while (!req.complete)
498c2ecf20Sopenharmony_ci		cuda_poll();
508c2ecf20Sopenharmony_ci	return req.reply[3];
518c2ecf20Sopenharmony_ci}
528c2ecf20Sopenharmony_ci
538c2ecf20Sopenharmony_cistatic void cuda_pram_write_byte(unsigned char data, int offset)
548c2ecf20Sopenharmony_ci{
558c2ecf20Sopenharmony_ci	struct adb_request req;
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	if (cuda_request(&req, NULL, 5, CUDA_PACKET, CUDA_SET_PRAM,
588c2ecf20Sopenharmony_ci			 (offset >> 8) & 0xFF, offset & 0xFF, data) < 0)
598c2ecf20Sopenharmony_ci		return;
608c2ecf20Sopenharmony_ci	while (!req.complete)
618c2ecf20Sopenharmony_ci		cuda_poll();
628c2ecf20Sopenharmony_ci}
638c2ecf20Sopenharmony_ci#endif /* CONFIG_ADB_CUDA */
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
668c2ecf20Sopenharmony_cistatic unsigned char pmu_pram_read_byte(int offset)
678c2ecf20Sopenharmony_ci{
688c2ecf20Sopenharmony_ci	struct adb_request req;
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci	if (pmu_request(&req, NULL, 3, PMU_READ_XPRAM,
718c2ecf20Sopenharmony_ci	                offset & 0xFF, 1) < 0)
728c2ecf20Sopenharmony_ci		return 0;
738c2ecf20Sopenharmony_ci	pmu_wait_complete(&req);
748c2ecf20Sopenharmony_ci
758c2ecf20Sopenharmony_ci	return req.reply[0];
768c2ecf20Sopenharmony_ci}
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_cistatic void pmu_pram_write_byte(unsigned char data, int offset)
798c2ecf20Sopenharmony_ci{
808c2ecf20Sopenharmony_ci	struct adb_request req;
818c2ecf20Sopenharmony_ci
828c2ecf20Sopenharmony_ci	if (pmu_request(&req, NULL, 4, PMU_WRITE_XPRAM,
838c2ecf20Sopenharmony_ci	                offset & 0xFF, 1, data) < 0)
848c2ecf20Sopenharmony_ci		return;
858c2ecf20Sopenharmony_ci	pmu_wait_complete(&req);
868c2ecf20Sopenharmony_ci}
878c2ecf20Sopenharmony_ci#endif /* CONFIG_ADB_PMU */
888c2ecf20Sopenharmony_ci#endif /* CONFIG_NVRAM */
898c2ecf20Sopenharmony_ci
908c2ecf20Sopenharmony_ci/*
918c2ecf20Sopenharmony_ci * VIA PRAM/RTC access routines
928c2ecf20Sopenharmony_ci *
938c2ecf20Sopenharmony_ci * Must be called with interrupts disabled and
948c2ecf20Sopenharmony_ci * the RTC should be enabled.
958c2ecf20Sopenharmony_ci */
968c2ecf20Sopenharmony_ci
978c2ecf20Sopenharmony_cistatic __u8 via_rtc_recv(void)
988c2ecf20Sopenharmony_ci{
998c2ecf20Sopenharmony_ci	int i, reg;
1008c2ecf20Sopenharmony_ci	__u8 data;
1018c2ecf20Sopenharmony_ci
1028c2ecf20Sopenharmony_ci	reg = via1[vBufB] & ~VIA1B_vRTCClk;
1038c2ecf20Sopenharmony_ci
1048c2ecf20Sopenharmony_ci	/* Set the RTC data line to be an input. */
1058c2ecf20Sopenharmony_ci
1068c2ecf20Sopenharmony_ci	via1[vDirB] &= ~VIA1B_vRTCData;
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci	/* The bits of the byte come out in MSB order */
1098c2ecf20Sopenharmony_ci
1108c2ecf20Sopenharmony_ci	data = 0;
1118c2ecf20Sopenharmony_ci	for (i = 0 ; i < 8 ; i++) {
1128c2ecf20Sopenharmony_ci		via1[vBufB] = reg;
1138c2ecf20Sopenharmony_ci		via1[vBufB] = reg | VIA1B_vRTCClk;
1148c2ecf20Sopenharmony_ci		data = (data << 1) | (via1[vBufB] & VIA1B_vRTCData);
1158c2ecf20Sopenharmony_ci	}
1168c2ecf20Sopenharmony_ci
1178c2ecf20Sopenharmony_ci	/* Return RTC data line to output state */
1188c2ecf20Sopenharmony_ci
1198c2ecf20Sopenharmony_ci	via1[vDirB] |= VIA1B_vRTCData;
1208c2ecf20Sopenharmony_ci
1218c2ecf20Sopenharmony_ci	return data;
1228c2ecf20Sopenharmony_ci}
1238c2ecf20Sopenharmony_ci
1248c2ecf20Sopenharmony_cistatic void via_rtc_send(__u8 data)
1258c2ecf20Sopenharmony_ci{
1268c2ecf20Sopenharmony_ci	int i, reg, bit;
1278c2ecf20Sopenharmony_ci
1288c2ecf20Sopenharmony_ci	reg = via1[vBufB] & ~(VIA1B_vRTCClk | VIA1B_vRTCData);
1298c2ecf20Sopenharmony_ci
1308c2ecf20Sopenharmony_ci	/* The bits of the byte go in in MSB order */
1318c2ecf20Sopenharmony_ci
1328c2ecf20Sopenharmony_ci	for (i = 0 ; i < 8 ; i++) {
1338c2ecf20Sopenharmony_ci		bit = data & 0x80? 1 : 0;
1348c2ecf20Sopenharmony_ci		data <<= 1;
1358c2ecf20Sopenharmony_ci		via1[vBufB] = reg | bit;
1368c2ecf20Sopenharmony_ci		via1[vBufB] = reg | bit | VIA1B_vRTCClk;
1378c2ecf20Sopenharmony_ci	}
1388c2ecf20Sopenharmony_ci}
1398c2ecf20Sopenharmony_ci
1408c2ecf20Sopenharmony_ci/*
1418c2ecf20Sopenharmony_ci * These values can be found in Inside Macintosh vol. III ch. 2
1428c2ecf20Sopenharmony_ci * which has a description of the RTC chip in the original Mac.
1438c2ecf20Sopenharmony_ci */
1448c2ecf20Sopenharmony_ci
1458c2ecf20Sopenharmony_ci#define RTC_FLG_READ            BIT(7)
1468c2ecf20Sopenharmony_ci#define RTC_FLG_WRITE_PROTECT   BIT(7)
1478c2ecf20Sopenharmony_ci#define RTC_CMD_READ(r)         (RTC_FLG_READ | (r << 2))
1488c2ecf20Sopenharmony_ci#define RTC_CMD_WRITE(r)        (r << 2)
1498c2ecf20Sopenharmony_ci#define RTC_REG_SECONDS_0       0
1508c2ecf20Sopenharmony_ci#define RTC_REG_SECONDS_1       1
1518c2ecf20Sopenharmony_ci#define RTC_REG_SECONDS_2       2
1528c2ecf20Sopenharmony_ci#define RTC_REG_SECONDS_3       3
1538c2ecf20Sopenharmony_ci#define RTC_REG_WRITE_PROTECT   13
1548c2ecf20Sopenharmony_ci
1558c2ecf20Sopenharmony_ci/*
1568c2ecf20Sopenharmony_ci * Inside Mac has no information about two-byte RTC commands but
1578c2ecf20Sopenharmony_ci * the MAME/MESS source code has the essentials.
1588c2ecf20Sopenharmony_ci */
1598c2ecf20Sopenharmony_ci
1608c2ecf20Sopenharmony_ci#define RTC_REG_XPRAM           14
1618c2ecf20Sopenharmony_ci#define RTC_CMD_XPRAM_READ      (RTC_CMD_READ(RTC_REG_XPRAM) << 8)
1628c2ecf20Sopenharmony_ci#define RTC_CMD_XPRAM_WRITE     (RTC_CMD_WRITE(RTC_REG_XPRAM) << 8)
1638c2ecf20Sopenharmony_ci#define RTC_CMD_XPRAM_ARG(a)    (((a & 0xE0) << 3) | ((a & 0x1F) << 2))
1648c2ecf20Sopenharmony_ci
1658c2ecf20Sopenharmony_ci/*
1668c2ecf20Sopenharmony_ci * Execute a VIA PRAM/RTC command. For read commands
1678c2ecf20Sopenharmony_ci * data should point to a one-byte buffer for the
1688c2ecf20Sopenharmony_ci * resulting data. For write commands it should point
1698c2ecf20Sopenharmony_ci * to the data byte to for the command.
1708c2ecf20Sopenharmony_ci *
1718c2ecf20Sopenharmony_ci * This function disables all interrupts while running.
1728c2ecf20Sopenharmony_ci */
1738c2ecf20Sopenharmony_ci
1748c2ecf20Sopenharmony_cistatic void via_rtc_command(int command, __u8 *data)
1758c2ecf20Sopenharmony_ci{
1768c2ecf20Sopenharmony_ci	unsigned long flags;
1778c2ecf20Sopenharmony_ci	int is_read;
1788c2ecf20Sopenharmony_ci
1798c2ecf20Sopenharmony_ci	local_irq_save(flags);
1808c2ecf20Sopenharmony_ci
1818c2ecf20Sopenharmony_ci	/* The least significant bits must be 0b01 according to Inside Mac */
1828c2ecf20Sopenharmony_ci
1838c2ecf20Sopenharmony_ci	command = (command & ~3) | 1;
1848c2ecf20Sopenharmony_ci
1858c2ecf20Sopenharmony_ci	/* Enable the RTC and make sure the strobe line is high */
1868c2ecf20Sopenharmony_ci
1878c2ecf20Sopenharmony_ci	via1[vBufB] = (via1[vBufB] | VIA1B_vRTCClk) & ~VIA1B_vRTCEnb;
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci	if (command & 0xFF00) {		/* extended (two-byte) command */
1908c2ecf20Sopenharmony_ci		via_rtc_send((command & 0xFF00) >> 8);
1918c2ecf20Sopenharmony_ci		via_rtc_send(command & 0xFF);
1928c2ecf20Sopenharmony_ci		is_read = command & (RTC_FLG_READ << 8);
1938c2ecf20Sopenharmony_ci	} else {			/* one-byte command */
1948c2ecf20Sopenharmony_ci		via_rtc_send(command);
1958c2ecf20Sopenharmony_ci		is_read = command & RTC_FLG_READ;
1968c2ecf20Sopenharmony_ci	}
1978c2ecf20Sopenharmony_ci	if (is_read) {
1988c2ecf20Sopenharmony_ci		*data = via_rtc_recv();
1998c2ecf20Sopenharmony_ci	} else {
2008c2ecf20Sopenharmony_ci		via_rtc_send(*data);
2018c2ecf20Sopenharmony_ci	}
2028c2ecf20Sopenharmony_ci
2038c2ecf20Sopenharmony_ci	/* All done, disable the RTC */
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_ci	via1[vBufB] |= VIA1B_vRTCEnb;
2068c2ecf20Sopenharmony_ci
2078c2ecf20Sopenharmony_ci	local_irq_restore(flags);
2088c2ecf20Sopenharmony_ci}
2098c2ecf20Sopenharmony_ci
2108c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_NVRAM)
2118c2ecf20Sopenharmony_cistatic unsigned char via_pram_read_byte(int offset)
2128c2ecf20Sopenharmony_ci{
2138c2ecf20Sopenharmony_ci	unsigned char temp;
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_XPRAM_READ | RTC_CMD_XPRAM_ARG(offset), &temp);
2168c2ecf20Sopenharmony_ci
2178c2ecf20Sopenharmony_ci	return temp;
2188c2ecf20Sopenharmony_ci}
2198c2ecf20Sopenharmony_ci
2208c2ecf20Sopenharmony_cistatic void via_pram_write_byte(unsigned char data, int offset)
2218c2ecf20Sopenharmony_ci{
2228c2ecf20Sopenharmony_ci	unsigned char temp;
2238c2ecf20Sopenharmony_ci
2248c2ecf20Sopenharmony_ci	temp = 0x55;
2258c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
2268c2ecf20Sopenharmony_ci
2278c2ecf20Sopenharmony_ci	temp = data;
2288c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_XPRAM_WRITE | RTC_CMD_XPRAM_ARG(offset), &temp);
2298c2ecf20Sopenharmony_ci
2308c2ecf20Sopenharmony_ci	temp = 0x55 | RTC_FLG_WRITE_PROTECT;
2318c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
2328c2ecf20Sopenharmony_ci}
2338c2ecf20Sopenharmony_ci#endif /* CONFIG_NVRAM */
2348c2ecf20Sopenharmony_ci
2358c2ecf20Sopenharmony_ci/*
2368c2ecf20Sopenharmony_ci * Return the current time in seconds since January 1, 1904.
2378c2ecf20Sopenharmony_ci *
2388c2ecf20Sopenharmony_ci * This only works on machines with the VIA-based PRAM/RTC, which
2398c2ecf20Sopenharmony_ci * is basically any machine with Mac II-style ADB.
2408c2ecf20Sopenharmony_ci */
2418c2ecf20Sopenharmony_ci
2428c2ecf20Sopenharmony_cistatic time64_t via_read_time(void)
2438c2ecf20Sopenharmony_ci{
2448c2ecf20Sopenharmony_ci	union {
2458c2ecf20Sopenharmony_ci		__u8 cdata[4];
2468c2ecf20Sopenharmony_ci		__u32 idata;
2478c2ecf20Sopenharmony_ci	} result, last_result;
2488c2ecf20Sopenharmony_ci	int count = 1;
2498c2ecf20Sopenharmony_ci
2508c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_0), &last_result.cdata[3]);
2518c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_1), &last_result.cdata[2]);
2528c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_2), &last_result.cdata[1]);
2538c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_3), &last_result.cdata[0]);
2548c2ecf20Sopenharmony_ci
2558c2ecf20Sopenharmony_ci	/*
2568c2ecf20Sopenharmony_ci	 * The NetBSD guys say to loop until you get the same reading
2578c2ecf20Sopenharmony_ci	 * twice in a row.
2588c2ecf20Sopenharmony_ci	 */
2598c2ecf20Sopenharmony_ci
2608c2ecf20Sopenharmony_ci	while (1) {
2618c2ecf20Sopenharmony_ci		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_0),
2628c2ecf20Sopenharmony_ci		                &result.cdata[3]);
2638c2ecf20Sopenharmony_ci		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_1),
2648c2ecf20Sopenharmony_ci		                &result.cdata[2]);
2658c2ecf20Sopenharmony_ci		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_2),
2668c2ecf20Sopenharmony_ci		                &result.cdata[1]);
2678c2ecf20Sopenharmony_ci		via_rtc_command(RTC_CMD_READ(RTC_REG_SECONDS_3),
2688c2ecf20Sopenharmony_ci		                &result.cdata[0]);
2698c2ecf20Sopenharmony_ci
2708c2ecf20Sopenharmony_ci		if (result.idata == last_result.idata)
2718c2ecf20Sopenharmony_ci			return (time64_t)result.idata - RTC_OFFSET;
2728c2ecf20Sopenharmony_ci
2738c2ecf20Sopenharmony_ci		if (++count > 10)
2748c2ecf20Sopenharmony_ci			break;
2758c2ecf20Sopenharmony_ci
2768c2ecf20Sopenharmony_ci		last_result.idata = result.idata;
2778c2ecf20Sopenharmony_ci	}
2788c2ecf20Sopenharmony_ci
2798c2ecf20Sopenharmony_ci	pr_err("%s: failed to read a stable value; got 0x%08x then 0x%08x\n",
2808c2ecf20Sopenharmony_ci	       __func__, last_result.idata, result.idata);
2818c2ecf20Sopenharmony_ci
2828c2ecf20Sopenharmony_ci	return 0;
2838c2ecf20Sopenharmony_ci}
2848c2ecf20Sopenharmony_ci
2858c2ecf20Sopenharmony_ci/*
2868c2ecf20Sopenharmony_ci * Set the current time to a number of seconds since January 1, 1904.
2878c2ecf20Sopenharmony_ci *
2888c2ecf20Sopenharmony_ci * This only works on machines with the VIA-based PRAM/RTC, which
2898c2ecf20Sopenharmony_ci * is basically any machine with Mac II-style ADB.
2908c2ecf20Sopenharmony_ci */
2918c2ecf20Sopenharmony_ci
2928c2ecf20Sopenharmony_cistatic void via_set_rtc_time(struct rtc_time *tm)
2938c2ecf20Sopenharmony_ci{
2948c2ecf20Sopenharmony_ci	union {
2958c2ecf20Sopenharmony_ci		__u8 cdata[4];
2968c2ecf20Sopenharmony_ci		__u32 idata;
2978c2ecf20Sopenharmony_ci	} data;
2988c2ecf20Sopenharmony_ci	__u8 temp;
2998c2ecf20Sopenharmony_ci	time64_t time;
3008c2ecf20Sopenharmony_ci
3018c2ecf20Sopenharmony_ci	time = mktime64(tm->tm_year + 1900, tm->tm_mon + 1, tm->tm_mday,
3028c2ecf20Sopenharmony_ci	                tm->tm_hour, tm->tm_min, tm->tm_sec);
3038c2ecf20Sopenharmony_ci
3048c2ecf20Sopenharmony_ci	/* Clear the write protect bit */
3058c2ecf20Sopenharmony_ci
3068c2ecf20Sopenharmony_ci	temp = 0x55;
3078c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
3088c2ecf20Sopenharmony_ci
3098c2ecf20Sopenharmony_ci	data.idata = lower_32_bits(time + RTC_OFFSET);
3108c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_0), &data.cdata[3]);
3118c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_1), &data.cdata[2]);
3128c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_2), &data.cdata[1]);
3138c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_SECONDS_3), &data.cdata[0]);
3148c2ecf20Sopenharmony_ci
3158c2ecf20Sopenharmony_ci	/* Set the write protect bit */
3168c2ecf20Sopenharmony_ci
3178c2ecf20Sopenharmony_ci	temp = 0x55 | RTC_FLG_WRITE_PROTECT;
3188c2ecf20Sopenharmony_ci	via_rtc_command(RTC_CMD_WRITE(RTC_REG_WRITE_PROTECT), &temp);
3198c2ecf20Sopenharmony_ci}
3208c2ecf20Sopenharmony_ci
3218c2ecf20Sopenharmony_cistatic void via_shutdown(void)
3228c2ecf20Sopenharmony_ci{
3238c2ecf20Sopenharmony_ci	if (rbv_present) {
3248c2ecf20Sopenharmony_ci		via2[rBufB] &= ~0x04;
3258c2ecf20Sopenharmony_ci	} else {
3268c2ecf20Sopenharmony_ci		/* Direction of vDirB is output */
3278c2ecf20Sopenharmony_ci		via2[vDirB] |= 0x04;
3288c2ecf20Sopenharmony_ci		/* Send a value of 0 on that line */
3298c2ecf20Sopenharmony_ci		via2[vBufB] &= ~0x04;
3308c2ecf20Sopenharmony_ci		mdelay(1000);
3318c2ecf20Sopenharmony_ci	}
3328c2ecf20Sopenharmony_ci}
3338c2ecf20Sopenharmony_ci
3348c2ecf20Sopenharmony_cistatic void oss_shutdown(void)
3358c2ecf20Sopenharmony_ci{
3368c2ecf20Sopenharmony_ci	oss->rom_ctrl = OSS_POWEROFF;
3378c2ecf20Sopenharmony_ci}
3388c2ecf20Sopenharmony_ci
3398c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
3408c2ecf20Sopenharmony_cistatic void cuda_restart(void)
3418c2ecf20Sopenharmony_ci{
3428c2ecf20Sopenharmony_ci	struct adb_request req;
3438c2ecf20Sopenharmony_ci
3448c2ecf20Sopenharmony_ci	if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_RESET_SYSTEM) < 0)
3458c2ecf20Sopenharmony_ci		return;
3468c2ecf20Sopenharmony_ci	while (!req.complete)
3478c2ecf20Sopenharmony_ci		cuda_poll();
3488c2ecf20Sopenharmony_ci}
3498c2ecf20Sopenharmony_ci
3508c2ecf20Sopenharmony_cistatic void cuda_shutdown(void)
3518c2ecf20Sopenharmony_ci{
3528c2ecf20Sopenharmony_ci	struct adb_request req;
3538c2ecf20Sopenharmony_ci
3548c2ecf20Sopenharmony_ci	if (cuda_request(&req, NULL, 2, CUDA_PACKET, CUDA_POWERDOWN) < 0)
3558c2ecf20Sopenharmony_ci		return;
3568c2ecf20Sopenharmony_ci
3578c2ecf20Sopenharmony_ci	/* Avoid infinite polling loop when PSU is not under Cuda control */
3588c2ecf20Sopenharmony_ci	switch (macintosh_config->ident) {
3598c2ecf20Sopenharmony_ci	case MAC_MODEL_C660:
3608c2ecf20Sopenharmony_ci	case MAC_MODEL_Q605:
3618c2ecf20Sopenharmony_ci	case MAC_MODEL_Q605_ACC:
3628c2ecf20Sopenharmony_ci	case MAC_MODEL_P475:
3638c2ecf20Sopenharmony_ci	case MAC_MODEL_P475F:
3648c2ecf20Sopenharmony_ci		return;
3658c2ecf20Sopenharmony_ci	}
3668c2ecf20Sopenharmony_ci
3678c2ecf20Sopenharmony_ci	while (!req.complete)
3688c2ecf20Sopenharmony_ci		cuda_poll();
3698c2ecf20Sopenharmony_ci}
3708c2ecf20Sopenharmony_ci#endif /* CONFIG_ADB_CUDA */
3718c2ecf20Sopenharmony_ci
3728c2ecf20Sopenharmony_ci/*
3738c2ecf20Sopenharmony_ci *-------------------------------------------------------------------
3748c2ecf20Sopenharmony_ci * Below this point are the generic routines; they'll dispatch to the
3758c2ecf20Sopenharmony_ci * correct routine for the hardware on which we're running.
3768c2ecf20Sopenharmony_ci *-------------------------------------------------------------------
3778c2ecf20Sopenharmony_ci */
3788c2ecf20Sopenharmony_ci
3798c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_NVRAM)
3808c2ecf20Sopenharmony_ciunsigned char mac_pram_read_byte(int addr)
3818c2ecf20Sopenharmony_ci{
3828c2ecf20Sopenharmony_ci	switch (macintosh_config->adb_type) {
3838c2ecf20Sopenharmony_ci	case MAC_ADB_IOP:
3848c2ecf20Sopenharmony_ci	case MAC_ADB_II:
3858c2ecf20Sopenharmony_ci	case MAC_ADB_PB1:
3868c2ecf20Sopenharmony_ci		return via_pram_read_byte(addr);
3878c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
3888c2ecf20Sopenharmony_ci	case MAC_ADB_EGRET:
3898c2ecf20Sopenharmony_ci	case MAC_ADB_CUDA:
3908c2ecf20Sopenharmony_ci		return cuda_pram_read_byte(addr);
3918c2ecf20Sopenharmony_ci#endif
3928c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
3938c2ecf20Sopenharmony_ci	case MAC_ADB_PB2:
3948c2ecf20Sopenharmony_ci		return pmu_pram_read_byte(addr);
3958c2ecf20Sopenharmony_ci#endif
3968c2ecf20Sopenharmony_ci	default:
3978c2ecf20Sopenharmony_ci		return 0xFF;
3988c2ecf20Sopenharmony_ci	}
3998c2ecf20Sopenharmony_ci}
4008c2ecf20Sopenharmony_ci
4018c2ecf20Sopenharmony_civoid mac_pram_write_byte(unsigned char val, int addr)
4028c2ecf20Sopenharmony_ci{
4038c2ecf20Sopenharmony_ci	switch (macintosh_config->adb_type) {
4048c2ecf20Sopenharmony_ci	case MAC_ADB_IOP:
4058c2ecf20Sopenharmony_ci	case MAC_ADB_II:
4068c2ecf20Sopenharmony_ci	case MAC_ADB_PB1:
4078c2ecf20Sopenharmony_ci		via_pram_write_byte(val, addr);
4088c2ecf20Sopenharmony_ci		break;
4098c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
4108c2ecf20Sopenharmony_ci	case MAC_ADB_EGRET:
4118c2ecf20Sopenharmony_ci	case MAC_ADB_CUDA:
4128c2ecf20Sopenharmony_ci		cuda_pram_write_byte(val, addr);
4138c2ecf20Sopenharmony_ci		break;
4148c2ecf20Sopenharmony_ci#endif
4158c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
4168c2ecf20Sopenharmony_ci	case MAC_ADB_PB2:
4178c2ecf20Sopenharmony_ci		pmu_pram_write_byte(val, addr);
4188c2ecf20Sopenharmony_ci		break;
4198c2ecf20Sopenharmony_ci#endif
4208c2ecf20Sopenharmony_ci	default:
4218c2ecf20Sopenharmony_ci		break;
4228c2ecf20Sopenharmony_ci	}
4238c2ecf20Sopenharmony_ci}
4248c2ecf20Sopenharmony_ci
4258c2ecf20Sopenharmony_cissize_t mac_pram_get_size(void)
4268c2ecf20Sopenharmony_ci{
4278c2ecf20Sopenharmony_ci	return 256;
4288c2ecf20Sopenharmony_ci}
4298c2ecf20Sopenharmony_ci#endif /* CONFIG_NVRAM */
4308c2ecf20Sopenharmony_ci
4318c2ecf20Sopenharmony_civoid mac_poweroff(void)
4328c2ecf20Sopenharmony_ci{
4338c2ecf20Sopenharmony_ci	if (oss_present) {
4348c2ecf20Sopenharmony_ci		oss_shutdown();
4358c2ecf20Sopenharmony_ci	} else if (macintosh_config->adb_type == MAC_ADB_II) {
4368c2ecf20Sopenharmony_ci		via_shutdown();
4378c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
4388c2ecf20Sopenharmony_ci	} else if (macintosh_config->adb_type == MAC_ADB_EGRET ||
4398c2ecf20Sopenharmony_ci	           macintosh_config->adb_type == MAC_ADB_CUDA) {
4408c2ecf20Sopenharmony_ci		cuda_shutdown();
4418c2ecf20Sopenharmony_ci#endif
4428c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
4438c2ecf20Sopenharmony_ci	} else if (macintosh_config->adb_type == MAC_ADB_PB2) {
4448c2ecf20Sopenharmony_ci		pmu_shutdown();
4458c2ecf20Sopenharmony_ci#endif
4468c2ecf20Sopenharmony_ci	}
4478c2ecf20Sopenharmony_ci
4488c2ecf20Sopenharmony_ci	pr_crit("It is now safe to turn off your Macintosh.\n");
4498c2ecf20Sopenharmony_ci	local_irq_disable();
4508c2ecf20Sopenharmony_ci	while(1);
4518c2ecf20Sopenharmony_ci}
4528c2ecf20Sopenharmony_ci
4538c2ecf20Sopenharmony_civoid mac_reset(void)
4548c2ecf20Sopenharmony_ci{
4558c2ecf20Sopenharmony_ci	if (macintosh_config->adb_type == MAC_ADB_II &&
4568c2ecf20Sopenharmony_ci	    macintosh_config->ident != MAC_MODEL_SE30) {
4578c2ecf20Sopenharmony_ci		/* need ROMBASE in booter */
4588c2ecf20Sopenharmony_ci		/* indeed, plus need to MAP THE ROM !! */
4598c2ecf20Sopenharmony_ci
4608c2ecf20Sopenharmony_ci		if (mac_bi_data.rombase == 0)
4618c2ecf20Sopenharmony_ci			mac_bi_data.rombase = 0x40800000;
4628c2ecf20Sopenharmony_ci
4638c2ecf20Sopenharmony_ci		/* works on some */
4648c2ecf20Sopenharmony_ci		rom_reset = (void *) (mac_bi_data.rombase + 0xa);
4658c2ecf20Sopenharmony_ci
4668c2ecf20Sopenharmony_ci		local_irq_disable();
4678c2ecf20Sopenharmony_ci		rom_reset();
4688c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
4698c2ecf20Sopenharmony_ci	} else if (macintosh_config->adb_type == MAC_ADB_EGRET ||
4708c2ecf20Sopenharmony_ci	           macintosh_config->adb_type == MAC_ADB_CUDA) {
4718c2ecf20Sopenharmony_ci		cuda_restart();
4728c2ecf20Sopenharmony_ci#endif
4738c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
4748c2ecf20Sopenharmony_ci	} else if (macintosh_config->adb_type == MAC_ADB_PB2) {
4758c2ecf20Sopenharmony_ci		pmu_restart();
4768c2ecf20Sopenharmony_ci#endif
4778c2ecf20Sopenharmony_ci	} else if (CPU_IS_030) {
4788c2ecf20Sopenharmony_ci
4798c2ecf20Sopenharmony_ci		/* 030-specific reset routine.  The idea is general, but the
4808c2ecf20Sopenharmony_ci		 * specific registers to reset are '030-specific.  Until I
4818c2ecf20Sopenharmony_ci		 * have a non-030 machine, I can't test anything else.
4828c2ecf20Sopenharmony_ci		 *  -- C. Scott Ananian <cananian@alumni.princeton.edu>
4838c2ecf20Sopenharmony_ci		 */
4848c2ecf20Sopenharmony_ci
4858c2ecf20Sopenharmony_ci		unsigned long rombase = 0x40000000;
4868c2ecf20Sopenharmony_ci
4878c2ecf20Sopenharmony_ci		/* make a 1-to-1 mapping, using the transparent tran. reg. */
4888c2ecf20Sopenharmony_ci		unsigned long virt = (unsigned long) mac_reset;
4898c2ecf20Sopenharmony_ci		unsigned long phys = virt_to_phys(mac_reset);
4908c2ecf20Sopenharmony_ci		unsigned long addr = (phys&0xFF000000)|0x8777;
4918c2ecf20Sopenharmony_ci		unsigned long offset = phys-virt;
4928c2ecf20Sopenharmony_ci
4938c2ecf20Sopenharmony_ci		local_irq_disable(); /* lets not screw this up, ok? */
4948c2ecf20Sopenharmony_ci		__asm__ __volatile__(".chip 68030\n\t"
4958c2ecf20Sopenharmony_ci				     "pmove %0,%/tt0\n\t"
4968c2ecf20Sopenharmony_ci				     ".chip 68k"
4978c2ecf20Sopenharmony_ci				     : : "m" (addr));
4988c2ecf20Sopenharmony_ci		/* Now jump to physical address so we can disable MMU */
4998c2ecf20Sopenharmony_ci		__asm__ __volatile__(
5008c2ecf20Sopenharmony_ci		    ".chip 68030\n\t"
5018c2ecf20Sopenharmony_ci		    "lea %/pc@(1f),%/a0\n\t"
5028c2ecf20Sopenharmony_ci		    "addl %0,%/a0\n\t"/* fixup target address and stack ptr */
5038c2ecf20Sopenharmony_ci		    "addl %0,%/sp\n\t"
5048c2ecf20Sopenharmony_ci		    "pflusha\n\t"
5058c2ecf20Sopenharmony_ci		    "jmp %/a0@\n\t" /* jump into physical memory */
5068c2ecf20Sopenharmony_ci		    "0:.long 0\n\t" /* a constant zero. */
5078c2ecf20Sopenharmony_ci		    /* OK.  Now reset everything and jump to reset vector. */
5088c2ecf20Sopenharmony_ci		    "1:\n\t"
5098c2ecf20Sopenharmony_ci		    "lea %/pc@(0b),%/a0\n\t"
5108c2ecf20Sopenharmony_ci		    "pmove %/a0@, %/tc\n\t" /* disable mmu */
5118c2ecf20Sopenharmony_ci		    "pmove %/a0@, %/tt0\n\t" /* disable tt0 */
5128c2ecf20Sopenharmony_ci		    "pmove %/a0@, %/tt1\n\t" /* disable tt1 */
5138c2ecf20Sopenharmony_ci		    "movel #0, %/a0\n\t"
5148c2ecf20Sopenharmony_ci		    "movec %/a0, %/vbr\n\t" /* clear vector base register */
5158c2ecf20Sopenharmony_ci		    "movec %/a0, %/cacr\n\t" /* disable caches */
5168c2ecf20Sopenharmony_ci		    "movel #0x0808,%/a0\n\t"
5178c2ecf20Sopenharmony_ci		    "movec %/a0, %/cacr\n\t" /* flush i&d caches */
5188c2ecf20Sopenharmony_ci		    "movew #0x2700,%/sr\n\t" /* set up status register */
5198c2ecf20Sopenharmony_ci		    "movel %1@(0x0),%/a0\n\t"/* load interrupt stack pointer */
5208c2ecf20Sopenharmony_ci		    "movec %/a0, %/isp\n\t"
5218c2ecf20Sopenharmony_ci		    "movel %1@(0x4),%/a0\n\t" /* load reset vector */
5228c2ecf20Sopenharmony_ci		    "reset\n\t" /* reset external devices */
5238c2ecf20Sopenharmony_ci		    "jmp %/a0@\n\t" /* jump to the reset vector */
5248c2ecf20Sopenharmony_ci		    ".chip 68k"
5258c2ecf20Sopenharmony_ci		    : : "r" (offset), "a" (rombase) : "a0");
5268c2ecf20Sopenharmony_ci	}
5278c2ecf20Sopenharmony_ci
5288c2ecf20Sopenharmony_ci	/* should never get here */
5298c2ecf20Sopenharmony_ci	pr_crit("Restart failed. Please restart manually.\n");
5308c2ecf20Sopenharmony_ci	local_irq_disable();
5318c2ecf20Sopenharmony_ci	while(1);
5328c2ecf20Sopenharmony_ci}
5338c2ecf20Sopenharmony_ci
5348c2ecf20Sopenharmony_ci/*
5358c2ecf20Sopenharmony_ci * This function translates seconds since 1970 into a proper date.
5368c2ecf20Sopenharmony_ci *
5378c2ecf20Sopenharmony_ci * Algorithm cribbed from glibc2.1, __offtime().
5388c2ecf20Sopenharmony_ci *
5398c2ecf20Sopenharmony_ci * This is roughly same as rtc_time64_to_tm(), which we should probably
5408c2ecf20Sopenharmony_ci * use here, but it's only available when CONFIG_RTC_LIB is enabled.
5418c2ecf20Sopenharmony_ci */
5428c2ecf20Sopenharmony_ci#define SECS_PER_MINUTE (60)
5438c2ecf20Sopenharmony_ci#define SECS_PER_HOUR  (SECS_PER_MINUTE * 60)
5448c2ecf20Sopenharmony_ci#define SECS_PER_DAY   (SECS_PER_HOUR * 24)
5458c2ecf20Sopenharmony_ci
5468c2ecf20Sopenharmony_cistatic void unmktime(time64_t time, long offset,
5478c2ecf20Sopenharmony_ci		     int *yearp, int *monp, int *dayp,
5488c2ecf20Sopenharmony_ci		     int *hourp, int *minp, int *secp)
5498c2ecf20Sopenharmony_ci{
5508c2ecf20Sopenharmony_ci        /* How many days come before each month (0-12).  */
5518c2ecf20Sopenharmony_ci	static const unsigned short int __mon_yday[2][13] =
5528c2ecf20Sopenharmony_ci	{
5538c2ecf20Sopenharmony_ci		/* Normal years.  */
5548c2ecf20Sopenharmony_ci		{ 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334, 365 },
5558c2ecf20Sopenharmony_ci		/* Leap years.  */
5568c2ecf20Sopenharmony_ci		{ 0, 31, 60, 91, 121, 152, 182, 213, 244, 274, 305, 335, 366 }
5578c2ecf20Sopenharmony_ci	};
5588c2ecf20Sopenharmony_ci	int days, rem, y, wday, yday;
5598c2ecf20Sopenharmony_ci	const unsigned short int *ip;
5608c2ecf20Sopenharmony_ci
5618c2ecf20Sopenharmony_ci	days = div_u64_rem(time, SECS_PER_DAY, &rem);
5628c2ecf20Sopenharmony_ci	rem += offset;
5638c2ecf20Sopenharmony_ci	while (rem < 0) {
5648c2ecf20Sopenharmony_ci		rem += SECS_PER_DAY;
5658c2ecf20Sopenharmony_ci		--days;
5668c2ecf20Sopenharmony_ci	}
5678c2ecf20Sopenharmony_ci	while (rem >= SECS_PER_DAY) {
5688c2ecf20Sopenharmony_ci		rem -= SECS_PER_DAY;
5698c2ecf20Sopenharmony_ci		++days;
5708c2ecf20Sopenharmony_ci	}
5718c2ecf20Sopenharmony_ci	*hourp = rem / SECS_PER_HOUR;
5728c2ecf20Sopenharmony_ci	rem %= SECS_PER_HOUR;
5738c2ecf20Sopenharmony_ci	*minp = rem / SECS_PER_MINUTE;
5748c2ecf20Sopenharmony_ci	*secp = rem % SECS_PER_MINUTE;
5758c2ecf20Sopenharmony_ci	/* January 1, 1970 was a Thursday. */
5768c2ecf20Sopenharmony_ci	wday = (4 + days) % 7; /* Day in the week. Not currently used */
5778c2ecf20Sopenharmony_ci	if (wday < 0) wday += 7;
5788c2ecf20Sopenharmony_ci	y = 1970;
5798c2ecf20Sopenharmony_ci
5808c2ecf20Sopenharmony_ci#define DIV(a, b) ((a) / (b) - ((a) % (b) < 0))
5818c2ecf20Sopenharmony_ci#define LEAPS_THRU_END_OF(y) (DIV (y, 4) - DIV (y, 100) + DIV (y, 400))
5828c2ecf20Sopenharmony_ci#define __isleap(year)	\
5838c2ecf20Sopenharmony_ci  ((year) % 4 == 0 && ((year) % 100 != 0 || (year) % 400 == 0))
5848c2ecf20Sopenharmony_ci
5858c2ecf20Sopenharmony_ci	while (days < 0 || days >= (__isleap (y) ? 366 : 365))
5868c2ecf20Sopenharmony_ci	{
5878c2ecf20Sopenharmony_ci		/* Guess a corrected year, assuming 365 days per year.  */
5888c2ecf20Sopenharmony_ci		long int yg = y + days / 365 - (days % 365 < 0);
5898c2ecf20Sopenharmony_ci
5908c2ecf20Sopenharmony_ci		/* Adjust DAYS and Y to match the guessed year.  */
5918c2ecf20Sopenharmony_ci		days -= (yg - y) * 365 +
5928c2ecf20Sopenharmony_ci			LEAPS_THRU_END_OF(yg - 1) - LEAPS_THRU_END_OF(y - 1);
5938c2ecf20Sopenharmony_ci		y = yg;
5948c2ecf20Sopenharmony_ci	}
5958c2ecf20Sopenharmony_ci	*yearp = y - 1900;
5968c2ecf20Sopenharmony_ci	yday = days; /* day in the year.  Not currently used. */
5978c2ecf20Sopenharmony_ci	ip = __mon_yday[__isleap(y)];
5988c2ecf20Sopenharmony_ci	for (y = 11; days < (long int) ip[y]; --y)
5998c2ecf20Sopenharmony_ci		continue;
6008c2ecf20Sopenharmony_ci	days -= ip[y];
6018c2ecf20Sopenharmony_ci	*monp = y;
6028c2ecf20Sopenharmony_ci	*dayp = days + 1; /* day in the month */
6038c2ecf20Sopenharmony_ci	return;
6048c2ecf20Sopenharmony_ci}
6058c2ecf20Sopenharmony_ci
6068c2ecf20Sopenharmony_ci/*
6078c2ecf20Sopenharmony_ci * Read/write the hardware clock.
6088c2ecf20Sopenharmony_ci */
6098c2ecf20Sopenharmony_ci
6108c2ecf20Sopenharmony_ciint mac_hwclk(int op, struct rtc_time *t)
6118c2ecf20Sopenharmony_ci{
6128c2ecf20Sopenharmony_ci	time64_t now;
6138c2ecf20Sopenharmony_ci
6148c2ecf20Sopenharmony_ci	if (!op) { /* read */
6158c2ecf20Sopenharmony_ci		switch (macintosh_config->adb_type) {
6168c2ecf20Sopenharmony_ci		case MAC_ADB_IOP:
6178c2ecf20Sopenharmony_ci		case MAC_ADB_II:
6188c2ecf20Sopenharmony_ci		case MAC_ADB_PB1:
6198c2ecf20Sopenharmony_ci			now = via_read_time();
6208c2ecf20Sopenharmony_ci			break;
6218c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
6228c2ecf20Sopenharmony_ci		case MAC_ADB_EGRET:
6238c2ecf20Sopenharmony_ci		case MAC_ADB_CUDA:
6248c2ecf20Sopenharmony_ci			now = cuda_get_time();
6258c2ecf20Sopenharmony_ci			break;
6268c2ecf20Sopenharmony_ci#endif
6278c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
6288c2ecf20Sopenharmony_ci		case MAC_ADB_PB2:
6298c2ecf20Sopenharmony_ci			now = pmu_get_time();
6308c2ecf20Sopenharmony_ci			break;
6318c2ecf20Sopenharmony_ci#endif
6328c2ecf20Sopenharmony_ci		default:
6338c2ecf20Sopenharmony_ci			now = 0;
6348c2ecf20Sopenharmony_ci		}
6358c2ecf20Sopenharmony_ci
6368c2ecf20Sopenharmony_ci		t->tm_wday = 0;
6378c2ecf20Sopenharmony_ci		unmktime(now, 0,
6388c2ecf20Sopenharmony_ci			 &t->tm_year, &t->tm_mon, &t->tm_mday,
6398c2ecf20Sopenharmony_ci			 &t->tm_hour, &t->tm_min, &t->tm_sec);
6408c2ecf20Sopenharmony_ci		pr_debug("%s: read %ptR\n", __func__, t);
6418c2ecf20Sopenharmony_ci	} else { /* write */
6428c2ecf20Sopenharmony_ci		pr_debug("%s: tried to write %ptR\n", __func__, t);
6438c2ecf20Sopenharmony_ci
6448c2ecf20Sopenharmony_ci		switch (macintosh_config->adb_type) {
6458c2ecf20Sopenharmony_ci		case MAC_ADB_IOP:
6468c2ecf20Sopenharmony_ci		case MAC_ADB_II:
6478c2ecf20Sopenharmony_ci		case MAC_ADB_PB1:
6488c2ecf20Sopenharmony_ci			via_set_rtc_time(t);
6498c2ecf20Sopenharmony_ci			break;
6508c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_CUDA
6518c2ecf20Sopenharmony_ci		case MAC_ADB_EGRET:
6528c2ecf20Sopenharmony_ci		case MAC_ADB_CUDA:
6538c2ecf20Sopenharmony_ci			cuda_set_rtc_time(t);
6548c2ecf20Sopenharmony_ci			break;
6558c2ecf20Sopenharmony_ci#endif
6568c2ecf20Sopenharmony_ci#ifdef CONFIG_ADB_PMU
6578c2ecf20Sopenharmony_ci		case MAC_ADB_PB2:
6588c2ecf20Sopenharmony_ci			pmu_set_rtc_time(t);
6598c2ecf20Sopenharmony_ci			break;
6608c2ecf20Sopenharmony_ci#endif
6618c2ecf20Sopenharmony_ci		default:
6628c2ecf20Sopenharmony_ci			return -ENODEV;
6638c2ecf20Sopenharmony_ci		}
6648c2ecf20Sopenharmony_ci	}
6658c2ecf20Sopenharmony_ci	return 0;
6668c2ecf20Sopenharmony_ci}
667