18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Q40 master Chip Control 48c2ecf20Sopenharmony_ci * RTC stuff merged for compactness. 58c2ecf20Sopenharmony_ci*/ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#ifndef _Q40_MASTER_H 88c2ecf20Sopenharmony_ci#define _Q40_MASTER_H 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <asm/raw_io.h> 118c2ecf20Sopenharmony_ci#include <asm/kmap.h> 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#define q40_master_addr 0xff000000 148c2ecf20Sopenharmony_ci 158c2ecf20Sopenharmony_ci#define IIRQ_REG 0x0 /* internal IRQ reg */ 168c2ecf20Sopenharmony_ci#define EIRQ_REG 0x4 /* external ... */ 178c2ecf20Sopenharmony_ci#define KEYCODE_REG 0x1c /* value of received scancode */ 188c2ecf20Sopenharmony_ci#define DISPLAY_CONTROL_REG 0x18 198c2ecf20Sopenharmony_ci#define FRAME_CLEAR_REG 0x24 208c2ecf20Sopenharmony_ci#define LED_REG 0x30 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#define Q40_LED_ON() master_outb(1,LED_REG) 238c2ecf20Sopenharmony_ci#define Q40_LED_OFF() master_outb(0,LED_REG) 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#define INTERRUPT_REG IIRQ_REG /* "native" ints */ 268c2ecf20Sopenharmony_ci#define KEY_IRQ_ENABLE_REG 0x08 /**/ 278c2ecf20Sopenharmony_ci#define KEYBOARD_UNLOCK_REG 0x20 /* clear kb int */ 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci#define SAMPLE_ENABLE_REG 0x14 /* generate SAMPLE ints */ 308c2ecf20Sopenharmony_ci#define SAMPLE_RATE_REG 0x2c 318c2ecf20Sopenharmony_ci#define SAMPLE_CLEAR_REG 0x28 328c2ecf20Sopenharmony_ci#define SAMPLE_LOW 0x00 338c2ecf20Sopenharmony_ci#define SAMPLE_HIGH 0x01 348c2ecf20Sopenharmony_ci 358c2ecf20Sopenharmony_ci#define FRAME_RATE_REG 0x38 /* generate FRAME ints at 200 HZ rate */ 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci#if 0 388c2ecf20Sopenharmony_ci#define SER_ENABLE_REG 0x0c /* allow serial ints to be generated */ 398c2ecf20Sopenharmony_ci#endif 408c2ecf20Sopenharmony_ci#define EXT_ENABLE_REG 0x10 /* ... rest of the ISA ints ... */ 418c2ecf20Sopenharmony_ci 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci#define master_inb(_reg_) in_8((unsigned char *)q40_master_addr+_reg_) 448c2ecf20Sopenharmony_ci#define master_outb(_b_,_reg_) out_8((unsigned char *)q40_master_addr+_reg_,_b_) 458c2ecf20Sopenharmony_ci 468c2ecf20Sopenharmony_ci/* RTC defines */ 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci#define Q40_RTC_BASE (0xff021ffc) 498c2ecf20Sopenharmony_ci 508c2ecf20Sopenharmony_ci#define Q40_RTC_YEAR (*(volatile unsigned char *)(Q40_RTC_BASE+0)) 518c2ecf20Sopenharmony_ci#define Q40_RTC_MNTH (*(volatile unsigned char *)(Q40_RTC_BASE-4)) 528c2ecf20Sopenharmony_ci#define Q40_RTC_DATE (*(volatile unsigned char *)(Q40_RTC_BASE-8)) 538c2ecf20Sopenharmony_ci#define Q40_RTC_DOW (*(volatile unsigned char *)(Q40_RTC_BASE-12)) 548c2ecf20Sopenharmony_ci#define Q40_RTC_HOUR (*(volatile unsigned char *)(Q40_RTC_BASE-16)) 558c2ecf20Sopenharmony_ci#define Q40_RTC_MINS (*(volatile unsigned char *)(Q40_RTC_BASE-20)) 568c2ecf20Sopenharmony_ci#define Q40_RTC_SECS (*(volatile unsigned char *)(Q40_RTC_BASE-24)) 578c2ecf20Sopenharmony_ci#define Q40_RTC_CTRL (*(volatile unsigned char *)(Q40_RTC_BASE-28)) 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci/* some control bits */ 608c2ecf20Sopenharmony_ci#define Q40_RTC_READ 64 /* prepare for reading */ 618c2ecf20Sopenharmony_ci#define Q40_RTC_WRITE 128 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* define some Q40 specific ints */ 648c2ecf20Sopenharmony_ci#include <asm/q40ints.h> 658c2ecf20Sopenharmony_ci 668c2ecf20Sopenharmony_ci/* misc defs */ 678c2ecf20Sopenharmony_ci#define DAC_LEFT ((unsigned char *)0xff008000) 688c2ecf20Sopenharmony_ci#define DAC_RIGHT ((unsigned char *)0xff008004) 698c2ecf20Sopenharmony_ci 708c2ecf20Sopenharmony_ci#endif /* _Q40_MASTER_H */ 71