18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/****************************************************************************/
38c2ecf20Sopenharmony_ci
48c2ecf20Sopenharmony_ci/*
58c2ecf20Sopenharmony_ci *	nettel.h -- Lineo (formerly Moreton Bay) NETtel support.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci *	(C) Copyright 1999-2000, Moreton Bay (www.moretonbay.com)
88c2ecf20Sopenharmony_ci * 	(C) Copyright 2000-2001, Lineo Inc. (www.lineo.com)
98c2ecf20Sopenharmony_ci * 	(C) Copyright 2001-2002, SnapGear Inc., (www.snapgear.com)
108c2ecf20Sopenharmony_ci */
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci/****************************************************************************/
138c2ecf20Sopenharmony_ci#ifndef	nettel_h
148c2ecf20Sopenharmony_ci#define	nettel_h
158c2ecf20Sopenharmony_ci/****************************************************************************/
168c2ecf20Sopenharmony_ci
178c2ecf20Sopenharmony_ci
188c2ecf20Sopenharmony_ci/****************************************************************************/
198c2ecf20Sopenharmony_ci#ifdef CONFIG_NETtel
208c2ecf20Sopenharmony_ci/****************************************************************************/
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci#ifdef CONFIG_COLDFIRE
238c2ecf20Sopenharmony_ci#include <asm/coldfire.h>
248c2ecf20Sopenharmony_ci#include <asm/mcfsim.h>
258c2ecf20Sopenharmony_ci#include <asm/io.h>
268c2ecf20Sopenharmony_ci#endif
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci/*---------------------------------------------------------------------------*/
298c2ecf20Sopenharmony_ci#if defined(CONFIG_M5307)
308c2ecf20Sopenharmony_ci/*
318c2ecf20Sopenharmony_ci *	NETtel/5307 based hardware first. DTR/DCD lines are wired to
328c2ecf20Sopenharmony_ci *	GPIO lines. Most of the LED's are driver through a latch
338c2ecf20Sopenharmony_ci *	connected to CS2.
348c2ecf20Sopenharmony_ci */
358c2ecf20Sopenharmony_ci#define	MCFPP_DCD1	0x0001
368c2ecf20Sopenharmony_ci#define	MCFPP_DCD0	0x0002
378c2ecf20Sopenharmony_ci#define	MCFPP_DTR1	0x0004
388c2ecf20Sopenharmony_ci#define	MCFPP_DTR0	0x0008
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define	NETtel_LEDADDR	0x30400000
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ciextern volatile unsigned short ppdata;
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci/*
478c2ecf20Sopenharmony_ci *	These functions defined to give quasi generic access to the
488c2ecf20Sopenharmony_ci *	PPIO bits used for DTR/DCD.
498c2ecf20Sopenharmony_ci */
508c2ecf20Sopenharmony_cistatic __inline__ unsigned int mcf_getppdata(void)
518c2ecf20Sopenharmony_ci{
528c2ecf20Sopenharmony_ci	volatile unsigned short *pp;
538c2ecf20Sopenharmony_ci	pp = (volatile unsigned short *) MCFSIM_PADAT;
548c2ecf20Sopenharmony_ci	return((unsigned int) *pp);
558c2ecf20Sopenharmony_ci}
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_cistatic __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
588c2ecf20Sopenharmony_ci{
598c2ecf20Sopenharmony_ci	volatile unsigned short *pp;
608c2ecf20Sopenharmony_ci	pp = (volatile unsigned short *) MCFSIM_PADAT;
618c2ecf20Sopenharmony_ci	ppdata = (ppdata & ~mask) | bits;
628c2ecf20Sopenharmony_ci	*pp = ppdata;
638c2ecf20Sopenharmony_ci}
648c2ecf20Sopenharmony_ci#endif
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci/*---------------------------------------------------------------------------*/
678c2ecf20Sopenharmony_ci#elif defined(CONFIG_M5206e)
688c2ecf20Sopenharmony_ci/*
698c2ecf20Sopenharmony_ci *	NETtel/5206e based hardware has leds on latch on CS3.
708c2ecf20Sopenharmony_ci *	No support modem for lines??
718c2ecf20Sopenharmony_ci */
728c2ecf20Sopenharmony_ci#define	NETtel_LEDADDR	0x50000000
738c2ecf20Sopenharmony_ci
748c2ecf20Sopenharmony_ci/*---------------------------------------------------------------------------*/
758c2ecf20Sopenharmony_ci#elif defined(CONFIG_M5272)
768c2ecf20Sopenharmony_ci/*
778c2ecf20Sopenharmony_ci *	NETtel/5272 based hardware. DTR/DCD lines are wired to GPB lines.
788c2ecf20Sopenharmony_ci */
798c2ecf20Sopenharmony_ci#define	MCFPP_DCD0	0x0080
808c2ecf20Sopenharmony_ci#define	MCFPP_DCD1	0x0000		/* Port 1 no DCD support */
818c2ecf20Sopenharmony_ci#define	MCFPP_DTR0	0x0040
828c2ecf20Sopenharmony_ci#define	MCFPP_DTR1	0x0000		/* Port 1 no DTR support */
838c2ecf20Sopenharmony_ci
848c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__
858c2ecf20Sopenharmony_ci/*
868c2ecf20Sopenharmony_ci *	These functions defined to give quasi generic access to the
878c2ecf20Sopenharmony_ci *	PPIO bits used for DTR/DCD.
888c2ecf20Sopenharmony_ci */
898c2ecf20Sopenharmony_cistatic __inline__ unsigned int mcf_getppdata(void)
908c2ecf20Sopenharmony_ci{
918c2ecf20Sopenharmony_ci	return readw(MCFSIM_PBDAT);
928c2ecf20Sopenharmony_ci}
938c2ecf20Sopenharmony_ci
948c2ecf20Sopenharmony_cistatic __inline__ void mcf_setppdata(unsigned int mask, unsigned int bits)
958c2ecf20Sopenharmony_ci{
968c2ecf20Sopenharmony_ci	writew((readw(MCFSIM_PBDAT) & ~mask) | bits, MCFSIM_PBDAT);
978c2ecf20Sopenharmony_ci}
988c2ecf20Sopenharmony_ci#endif
998c2ecf20Sopenharmony_ci
1008c2ecf20Sopenharmony_ci#endif
1018c2ecf20Sopenharmony_ci/*---------------------------------------------------------------------------*/
1028c2ecf20Sopenharmony_ci
1038c2ecf20Sopenharmony_ci/****************************************************************************/
1048c2ecf20Sopenharmony_ci#endif /* CONFIG_NETtel */
1058c2ecf20Sopenharmony_ci/****************************************************************************/
1068c2ecf20Sopenharmony_ci#endif	/* nettel_h */
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