18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * Definitions for Freescale Coldfire QSPI module
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * Copyright 2010 Steven King <sfking@fdwdc.com>
68c2ecf20Sopenharmony_ci*/
78c2ecf20Sopenharmony_ci
88c2ecf20Sopenharmony_ci#ifndef mcfqspi_h
98c2ecf20Sopenharmony_ci#define mcfqspi_h
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci/**
128c2ecf20Sopenharmony_ci * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver
138c2ecf20Sopenharmony_ci * @setup: setup the control; allocate gpio's, etc. May be NULL.
148c2ecf20Sopenharmony_ci * @teardown: finish with the control; free gpio's, etc. May be NULL.
158c2ecf20Sopenharmony_ci * @select: output the signals to select the device.  Can not be NULL.
168c2ecf20Sopenharmony_ci * @deselect: output the signals to deselect the device. Can not be NULL.
178c2ecf20Sopenharmony_ci *
188c2ecf20Sopenharmony_ci * The QSPI module has 4 hardware chip selects.  We don't use them.  Instead
198c2ecf20Sopenharmony_ci * platforms are required to supply a mcfqspi_cs_control as a part of the
208c2ecf20Sopenharmony_ci * platform data for each QSPI master controller.  Only the select and
218c2ecf20Sopenharmony_ci * deselect functions are required.
228c2ecf20Sopenharmony_ci*/
238c2ecf20Sopenharmony_cistruct mcfqspi_cs_control {
248c2ecf20Sopenharmony_ci	int 	(*setup)(struct mcfqspi_cs_control *);
258c2ecf20Sopenharmony_ci	void	(*teardown)(struct mcfqspi_cs_control *);
268c2ecf20Sopenharmony_ci	void	(*select)(struct mcfqspi_cs_control *, u8, bool);
278c2ecf20Sopenharmony_ci	void	(*deselect)(struct mcfqspi_cs_control *, u8, bool);
288c2ecf20Sopenharmony_ci};
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci/**
318c2ecf20Sopenharmony_ci * struct mcfqspi_platform_data - platform data for the coldfire qspi driver
328c2ecf20Sopenharmony_ci * @bus_num: board specific identifier for this qspi driver.
338c2ecf20Sopenharmony_ci * @num_chipselects: number of chip selects supported by this qspi driver.
348c2ecf20Sopenharmony_ci * @cs_control: platform dependent chip select control.
358c2ecf20Sopenharmony_ci*/
368c2ecf20Sopenharmony_cistruct mcfqspi_platform_data {
378c2ecf20Sopenharmony_ci	s16	bus_num;
388c2ecf20Sopenharmony_ci	u16	num_chipselect;
398c2ecf20Sopenharmony_ci	struct mcfqspi_cs_control *cs_control;
408c2ecf20Sopenharmony_ci};
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci#endif /* mcfqspi_h */
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