18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0 28c2ecf20Sopenharmony_ci/***************************************************************************/ 38c2ecf20Sopenharmony_ci 48c2ecf20Sopenharmony_ci/* 58c2ecf20Sopenharmony_ci * m5407.c -- platform support for ColdFire 5407 based boards 68c2ecf20Sopenharmony_ci * 78c2ecf20Sopenharmony_ci * Copyright (C) 1999-2002, Greg Ungerer (gerg@snapgear.com) 88c2ecf20Sopenharmony_ci * Copyright (C) 2000, Lineo (www.lineo.com) 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci 118c2ecf20Sopenharmony_ci/***************************************************************************/ 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci#include <linux/kernel.h> 148c2ecf20Sopenharmony_ci#include <linux/param.h> 158c2ecf20Sopenharmony_ci#include <linux/init.h> 168c2ecf20Sopenharmony_ci#include <linux/io.h> 178c2ecf20Sopenharmony_ci#include <asm/machdep.h> 188c2ecf20Sopenharmony_ci#include <asm/coldfire.h> 198c2ecf20Sopenharmony_ci#include <asm/mcfsim.h> 208c2ecf20Sopenharmony_ci#include <asm/mcfclk.h> 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci/***************************************************************************/ 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ciDEFINE_CLK(pll, "pll.0", MCF_CLK); 258c2ecf20Sopenharmony_ciDEFINE_CLK(sys, "sys.0", MCF_BUSCLK); 268c2ecf20Sopenharmony_ciDEFINE_CLK(mcftmr0, "mcftmr.0", MCF_BUSCLK); 278c2ecf20Sopenharmony_ciDEFINE_CLK(mcftmr1, "mcftmr.1", MCF_BUSCLK); 288c2ecf20Sopenharmony_ciDEFINE_CLK(mcfuart0, "mcfuart.0", MCF_BUSCLK); 298c2ecf20Sopenharmony_ciDEFINE_CLK(mcfuart1, "mcfuart.1", MCF_BUSCLK); 308c2ecf20Sopenharmony_ciDEFINE_CLK(mcfi2c0, "imx1-i2c.0", MCF_BUSCLK); 318c2ecf20Sopenharmony_ci 328c2ecf20Sopenharmony_cistruct clk *mcf_clks[] = { 338c2ecf20Sopenharmony_ci &clk_pll, 348c2ecf20Sopenharmony_ci &clk_sys, 358c2ecf20Sopenharmony_ci &clk_mcftmr0, 368c2ecf20Sopenharmony_ci &clk_mcftmr1, 378c2ecf20Sopenharmony_ci &clk_mcfuart0, 388c2ecf20Sopenharmony_ci &clk_mcfuart1, 398c2ecf20Sopenharmony_ci &clk_mcfi2c0, 408c2ecf20Sopenharmony_ci NULL 418c2ecf20Sopenharmony_ci}; 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_ci/***************************************************************************/ 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_cistatic void __init m5407_i2c_init(void) 468c2ecf20Sopenharmony_ci{ 478c2ecf20Sopenharmony_ci#if IS_ENABLED(CONFIG_I2C_IMX) 488c2ecf20Sopenharmony_ci writeb(MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL5 | MCFSIM_ICR_PRI0, 498c2ecf20Sopenharmony_ci MCFSIM_I2CICR); 508c2ecf20Sopenharmony_ci mcf_mapirq2imr(MCF_IRQ_I2C0, MCFINTC_I2C); 518c2ecf20Sopenharmony_ci#endif /* IS_ENABLED(CONFIG_I2C_IMX) */ 528c2ecf20Sopenharmony_ci} 538c2ecf20Sopenharmony_ci 548c2ecf20Sopenharmony_ci/***************************************************************************/ 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_civoid __init config_BSP(char *commandp, int size) 578c2ecf20Sopenharmony_ci{ 588c2ecf20Sopenharmony_ci mach_sched_init = hw_timer_init; 598c2ecf20Sopenharmony_ci 608c2ecf20Sopenharmony_ci /* Only support the external interrupts on their primary level */ 618c2ecf20Sopenharmony_ci mcf_mapirq2imr(25, MCFINTC_EINT1); 628c2ecf20Sopenharmony_ci mcf_mapirq2imr(27, MCFINTC_EINT3); 638c2ecf20Sopenharmony_ci mcf_mapirq2imr(29, MCFINTC_EINT5); 648c2ecf20Sopenharmony_ci mcf_mapirq2imr(31, MCFINTC_EINT7); 658c2ecf20Sopenharmony_ci m5407_i2c_init(); 668c2ecf20Sopenharmony_ci} 678c2ecf20Sopenharmony_ci 688c2ecf20Sopenharmony_ci/***************************************************************************/ 69