18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * intc2.c  -- support for the 2nd INTC controller of the 5249
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * (C) Copyright 2009, Greg Ungerer <gerg@snapgear.com>
58c2ecf20Sopenharmony_ci *
68c2ecf20Sopenharmony_ci * This file is subject to the terms and conditions of the GNU General Public
78c2ecf20Sopenharmony_ci * License.  See the file COPYING in the main directory of this archive
88c2ecf20Sopenharmony_ci * for more details.
98c2ecf20Sopenharmony_ci */
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci#include <linux/types.h>
128c2ecf20Sopenharmony_ci#include <linux/init.h>
138c2ecf20Sopenharmony_ci#include <linux/kernel.h>
148c2ecf20Sopenharmony_ci#include <linux/interrupt.h>
158c2ecf20Sopenharmony_ci#include <linux/irq.h>
168c2ecf20Sopenharmony_ci#include <linux/io.h>
178c2ecf20Sopenharmony_ci#include <asm/coldfire.h>
188c2ecf20Sopenharmony_ci#include <asm/mcfsim.h>
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_cistatic void intc2_irq_gpio_mask(struct irq_data *d)
218c2ecf20Sopenharmony_ci{
228c2ecf20Sopenharmony_ci	u32 imr;
238c2ecf20Sopenharmony_ci	imr = readl(MCFSIM2_GPIOINTENABLE);
248c2ecf20Sopenharmony_ci	imr &= ~(0x1 << (d->irq - MCF_IRQ_GPIO0));
258c2ecf20Sopenharmony_ci	writel(imr, MCFSIM2_GPIOINTENABLE);
268c2ecf20Sopenharmony_ci}
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_cistatic void intc2_irq_gpio_unmask(struct irq_data *d)
298c2ecf20Sopenharmony_ci{
308c2ecf20Sopenharmony_ci	u32 imr;
318c2ecf20Sopenharmony_ci	imr = readl(MCFSIM2_GPIOINTENABLE);
328c2ecf20Sopenharmony_ci	imr |= (0x1 << (d->irq - MCF_IRQ_GPIO0));
338c2ecf20Sopenharmony_ci	writel(imr, MCFSIM2_GPIOINTENABLE);
348c2ecf20Sopenharmony_ci}
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_cistatic void intc2_irq_gpio_ack(struct irq_data *d)
378c2ecf20Sopenharmony_ci{
388c2ecf20Sopenharmony_ci	writel(0x1 << (d->irq - MCF_IRQ_GPIO0), MCFSIM2_GPIOINTCLEAR);
398c2ecf20Sopenharmony_ci}
408c2ecf20Sopenharmony_ci
418c2ecf20Sopenharmony_cistatic struct irq_chip intc2_irq_gpio_chip = {
428c2ecf20Sopenharmony_ci	.name		= "CF-INTC2",
438c2ecf20Sopenharmony_ci	.irq_mask	= intc2_irq_gpio_mask,
448c2ecf20Sopenharmony_ci	.irq_unmask	= intc2_irq_gpio_unmask,
458c2ecf20Sopenharmony_ci	.irq_ack	= intc2_irq_gpio_ack,
468c2ecf20Sopenharmony_ci};
478c2ecf20Sopenharmony_ci
488c2ecf20Sopenharmony_cistatic int __init mcf_intc2_init(void)
498c2ecf20Sopenharmony_ci{
508c2ecf20Sopenharmony_ci	int irq;
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	/* GPIO interrupt sources */
538c2ecf20Sopenharmony_ci	for (irq = MCF_IRQ_GPIO0; (irq <= MCF_IRQ_GPIO7); irq++) {
548c2ecf20Sopenharmony_ci		irq_set_chip(irq, &intc2_irq_gpio_chip);
558c2ecf20Sopenharmony_ci		irq_set_handler(irq, handle_edge_irq);
568c2ecf20Sopenharmony_ci	}
578c2ecf20Sopenharmony_ci
588c2ecf20Sopenharmony_ci	return 0;
598c2ecf20Sopenharmony_ci}
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ciarch_initcall(mcf_intc2_init);
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