18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci * head.S - Common startup code for 68000 core based CPU's
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci * 2012.10.21, Luis Alves <ljalvs@gmail.com>, Single head.S file for all
68c2ecf20Sopenharmony_ci *             68000 core based CPU's. Based on the sources from:
78c2ecf20Sopenharmony_ci *             Coldfire by Greg Ungerer <gerg@snapgear.com>
88c2ecf20Sopenharmony_ci *             68328 by D. Jeff Dionne <jeff@ryeham.ee.ryerson.ca>,
98c2ecf20Sopenharmony_ci *                      Kenneth Albanowski <kjahds@kjahds.com>,
108c2ecf20Sopenharmony_ci *                      The Silver Hammer Group, Ltd.
118c2ecf20Sopenharmony_ci *
128c2ecf20Sopenharmony_ci */
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci#include <linux/linkage.h>
158c2ecf20Sopenharmony_ci#include <linux/init.h>
168c2ecf20Sopenharmony_ci#include <asm/asm-offsets.h>
178c2ecf20Sopenharmony_ci#include <asm/thread_info.h>
188c2ecf20Sopenharmony_ci
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/*****************************************************************************
218c2ecf20Sopenharmony_ci * UCSIMM and UCDIMM use CONFIG_MEMORY_RESERVE to reserve some RAM
228c2ecf20Sopenharmony_ci *****************************************************************************/
238c2ecf20Sopenharmony_ci#ifdef CONFIG_MEMORY_RESERVE
248c2ecf20Sopenharmony_ci#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)-(CONFIG_MEMORY_RESERVE*0x100000)
258c2ecf20Sopenharmony_ci#else
268c2ecf20Sopenharmony_ci#define RAMEND (CONFIG_RAMBASE+CONFIG_RAMSIZE)
278c2ecf20Sopenharmony_ci#endif
288c2ecf20Sopenharmony_ci/*****************************************************************************/
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci.global _start
318c2ecf20Sopenharmony_ci.global _rambase
328c2ecf20Sopenharmony_ci.global _ramvec
338c2ecf20Sopenharmony_ci.global _ramstart
348c2ecf20Sopenharmony_ci.global _ramend
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci#if defined(CONFIG_PILOT) || defined(CONFIG_INIT_LCD)
378c2ecf20Sopenharmony_ci.global bootlogo_bits
388c2ecf20Sopenharmony_ci#endif
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci/* Defining DEBUG_HEAD_CODE, serial port in 68x328 is inited */
418c2ecf20Sopenharmony_ci/* #define DEBUG_HEAD_CODE */
428c2ecf20Sopenharmony_ci#undef DEBUG_HEAD_CODE
438c2ecf20Sopenharmony_ci
448c2ecf20Sopenharmony_ci.data
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci/*****************************************************************************
478c2ecf20Sopenharmony_ci * RAM setup pointers. Used by the kernel to determine RAM location and size.
488c2ecf20Sopenharmony_ci *****************************************************************************/
498c2ecf20Sopenharmony_ci
508c2ecf20Sopenharmony_ci_rambase:
518c2ecf20Sopenharmony_ci	.long	0
528c2ecf20Sopenharmony_ci_ramvec:
538c2ecf20Sopenharmony_ci	.long	0
548c2ecf20Sopenharmony_ci_ramstart:
558c2ecf20Sopenharmony_ci	.long	0
568c2ecf20Sopenharmony_ci_ramend:
578c2ecf20Sopenharmony_ci	.long	0
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci__HEAD
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci/*****************************************************************************
628c2ecf20Sopenharmony_ci * Entry point, where all begins!
638c2ecf20Sopenharmony_ci *****************************************************************************/
648c2ecf20Sopenharmony_ci
658c2ecf20Sopenharmony_ci_start:
668c2ecf20Sopenharmony_ci
678c2ecf20Sopenharmony_ci/* Pilot need this specific signature at the start of ROM */
688c2ecf20Sopenharmony_ci#ifdef CONFIG_PILOT
698c2ecf20Sopenharmony_ci	.byte	0x4e, 0xfa, 0x00, 0x0a		/* bra opcode (jmp 10 bytes) */
708c2ecf20Sopenharmony_ci	.byte	'b', 'o', 'o', 't'
718c2ecf20Sopenharmony_ci	.word	10000
728c2ecf20Sopenharmony_ci	nop
738c2ecf20Sopenharmony_ci	moveq	#0, %d0
748c2ecf20Sopenharmony_ci	movew	%d0, 0xfffff618			/* Watchdog off */
758c2ecf20Sopenharmony_ci	movel	#0x00011f07, 0xfffff114		/* CS A1 Mask */
768c2ecf20Sopenharmony_ci#endif /* CONFIG_PILOT */
778c2ecf20Sopenharmony_ci
788c2ecf20Sopenharmony_ci	movew	#0x2700, %sr			/* disable all interrupts */
798c2ecf20Sopenharmony_ci
808c2ecf20Sopenharmony_ci/*****************************************************************************
818c2ecf20Sopenharmony_ci * Setup PLL and wait for it to settle (in 68x328 cpu's).
828c2ecf20Sopenharmony_ci * Also, if enabled, init serial port.
838c2ecf20Sopenharmony_ci *****************************************************************************/
848c2ecf20Sopenharmony_ci#if defined(CONFIG_M68328) || \
858c2ecf20Sopenharmony_ci    defined(CONFIG_M68EZ328) || \
868c2ecf20Sopenharmony_ci    defined(CONFIG_M68VZ328)
878c2ecf20Sopenharmony_ci
888c2ecf20Sopenharmony_ci/* Serial port setup. Should only be needed if debugging this startup code. */
898c2ecf20Sopenharmony_ci#ifdef DEBUG_HEAD_CODE
908c2ecf20Sopenharmony_ci	movew	#0x0800, 0xfffff906		/* Ignore CTS */
918c2ecf20Sopenharmony_ci	movew	#0x010b, 0xfffff902		/* BAUD to 9600 */
928c2ecf20Sopenharmony_ci	movew	#0xe100, 0xfffff900		/* enable */
938c2ecf20Sopenharmony_ci#endif /* DEBUG_HEAD */
948c2ecf20Sopenharmony_ci
958c2ecf20Sopenharmony_ci#ifdef CONFIG_PILOT
968c2ecf20Sopenharmony_ci	movew	#0x2410, 0xfffff200		/* PLLCR */
978c2ecf20Sopenharmony_ci#else
988c2ecf20Sopenharmony_ci	movew	#0x2400, 0xfffff200		/* PLLCR */
998c2ecf20Sopenharmony_ci#endif
1008c2ecf20Sopenharmony_ci	movew	#0x0123, 0xfffff202		/* PLLFSR */
1018c2ecf20Sopenharmony_ci	moveq	#0, %d0
1028c2ecf20Sopenharmony_ci	movew	#16384, %d0			/* PLL settle wait loop */
1038c2ecf20Sopenharmony_ci_pll_settle:
1048c2ecf20Sopenharmony_ci	subw	#1, %d0
1058c2ecf20Sopenharmony_ci	bne	_pll_settle
1068c2ecf20Sopenharmony_ci#endif /* CONFIG_M68x328 */
1078c2ecf20Sopenharmony_ci
1088c2ecf20Sopenharmony_ci
1098c2ecf20Sopenharmony_ci/*****************************************************************************
1108c2ecf20Sopenharmony_ci * If running kernel from ROM some specific initialization has to be done.
1118c2ecf20Sopenharmony_ci * (Assuming that everything is already init'ed when running from RAM)
1128c2ecf20Sopenharmony_ci *****************************************************************************/
1138c2ecf20Sopenharmony_ci#ifdef CONFIG_ROMKERNEL
1148c2ecf20Sopenharmony_ci
1158c2ecf20Sopenharmony_ci/*****************************************************************************
1168c2ecf20Sopenharmony_ci * Init chip registers (uCsimm specific)
1178c2ecf20Sopenharmony_ci *****************************************************************************/
1188c2ecf20Sopenharmony_ci#ifdef CONFIG_UCSIMM
1198c2ecf20Sopenharmony_ci	moveb	#0x00, 0xfffffb0b	/* Watchdog off */
1208c2ecf20Sopenharmony_ci	moveb	#0x10, 0xfffff000	/* SCR */
1218c2ecf20Sopenharmony_ci	moveb	#0x00, 0xfffff40b	/* enable chip select */
1228c2ecf20Sopenharmony_ci	moveb	#0x00, 0xfffff423	/* enable /DWE */
1238c2ecf20Sopenharmony_ci	moveb	#0x08, 0xfffffd0d	/* disable hardmap */
1248c2ecf20Sopenharmony_ci	moveb	#0x07, 0xfffffd0e	/* level 7 interrupt clear */
1258c2ecf20Sopenharmony_ci	movew	#0x8600, 0xfffff100	/* FLASH at 0x10c00000 */
1268c2ecf20Sopenharmony_ci	movew	#0x018b, 0xfffff110	/* 2Meg, enable, 0ws */
1278c2ecf20Sopenharmony_ci	movew	#0x8f00, 0xfffffc00	/* DRAM configuration */
1288c2ecf20Sopenharmony_ci	movew	#0x9667, 0xfffffc02	/* DRAM control */
1298c2ecf20Sopenharmony_ci	movew	#0x0000, 0xfffff106	/* DRAM at 0x00000000 */
1308c2ecf20Sopenharmony_ci	movew	#0x068f, 0xfffff116	/* 8Meg, enable, 0ws */
1318c2ecf20Sopenharmony_ci	moveb	#0x40, 0xfffff300	/* IVR */
1328c2ecf20Sopenharmony_ci	movel	#0x007FFFFF, %d0	/* IMR */
1338c2ecf20Sopenharmony_ci	movel	%d0, 0xfffff304
1348c2ecf20Sopenharmony_ci	moveb	0xfffff42b, %d0
1358c2ecf20Sopenharmony_ci	andb	#0xe0, %d0
1368c2ecf20Sopenharmony_ci	moveb	%d0, 0xfffff42b
1378c2ecf20Sopenharmony_ci#endif
1388c2ecf20Sopenharmony_ci
1398c2ecf20Sopenharmony_ci/*****************************************************************************
1408c2ecf20Sopenharmony_ci * Init LCD controller.
1418c2ecf20Sopenharmony_ci * (Assuming that LCD controller is already init'ed when running from RAM)
1428c2ecf20Sopenharmony_ci *****************************************************************************/
1438c2ecf20Sopenharmony_ci#ifdef CONFIG_INIT_LCD
1448c2ecf20Sopenharmony_ci#ifdef CONFIG_PILOT
1458c2ecf20Sopenharmony_ci	moveb	#0, 0xfffffA27			/* LCKCON */
1468c2ecf20Sopenharmony_ci	movel	#_start, 0xfffffA00		/* LSSA */
1478c2ecf20Sopenharmony_ci	moveb	#0xa, 0xfffffA05		/* LVPW */
1488c2ecf20Sopenharmony_ci	movew	#0x9f, 0xFFFFFa08		/* LXMAX */
1498c2ecf20Sopenharmony_ci	movew	#0x9f, 0xFFFFFa0a		/* LYMAX */
1508c2ecf20Sopenharmony_ci	moveb	#9, 0xfffffa29			/* LBAR */
1518c2ecf20Sopenharmony_ci	moveb	#0, 0xfffffa25			/* LPXCD */
1528c2ecf20Sopenharmony_ci	moveb	#0x04, 0xFFFFFa20		/* LPICF */
1538c2ecf20Sopenharmony_ci	moveb	#0x58, 0xfffffA27		/* LCKCON */
1548c2ecf20Sopenharmony_ci	moveb	#0x85, 0xfffff429		/* PFDATA */
1558c2ecf20Sopenharmony_ci	moveb	#0xd8, 0xfffffA27		/* LCKCON */
1568c2ecf20Sopenharmony_ci	moveb	#0xc5, 0xfffff429		/* PFDATA */
1578c2ecf20Sopenharmony_ci	moveb	#0xd5, 0xfffff429		/* PFDATA */
1588c2ecf20Sopenharmony_ci	movel	#bootlogo_bits, 0xFFFFFA00	/* LSSA */
1598c2ecf20Sopenharmony_ci	moveb	#10, 0xFFFFFA05			/* LVPW */
1608c2ecf20Sopenharmony_ci	movew	#160, 0xFFFFFA08		/* LXMAX */
1618c2ecf20Sopenharmony_ci	movew	#160, 0xFFFFFA0A		/* LYMAX */
1628c2ecf20Sopenharmony_ci#else /* CONFIG_PILOT */
1638c2ecf20Sopenharmony_ci	movel	#bootlogo_bits, 0xfffffA00	/* LSSA */
1648c2ecf20Sopenharmony_ci	moveb	#0x28, 0xfffffA05		/* LVPW */
1658c2ecf20Sopenharmony_ci	movew	#0x280, 0xFFFFFa08		/* LXMAX */
1668c2ecf20Sopenharmony_ci	movew	#0x1df, 0xFFFFFa0a		/* LYMAX */
1678c2ecf20Sopenharmony_ci	moveb	#0, 0xfffffa29			/* LBAR */
1688c2ecf20Sopenharmony_ci	moveb	#0, 0xfffffa25			/* LPXCD */
1698c2ecf20Sopenharmony_ci	moveb	#0x08, 0xFFFFFa20		/* LPICF */
1708c2ecf20Sopenharmony_ci	moveb	#0x01, 0xFFFFFA21		/* -ve pol */
1718c2ecf20Sopenharmony_ci	moveb	#0x81, 0xfffffA27		/* LCKCON */
1728c2ecf20Sopenharmony_ci	movew	#0xff00, 0xfffff412		/* LCD pins */
1738c2ecf20Sopenharmony_ci#endif /* CONFIG_PILOT */
1748c2ecf20Sopenharmony_ci#endif /* CONFIG_INIT_LCD */
1758c2ecf20Sopenharmony_ci
1768c2ecf20Sopenharmony_ci/*****************************************************************************
1778c2ecf20Sopenharmony_ci * Kernel is running from FLASH/ROM (XIP)
1788c2ecf20Sopenharmony_ci * Copy init text & data to RAM
1798c2ecf20Sopenharmony_ci *****************************************************************************/
1808c2ecf20Sopenharmony_ci	moveal	#_etext, %a0
1818c2ecf20Sopenharmony_ci	moveal	#_sdata, %a1
1828c2ecf20Sopenharmony_ci	moveal	#__bss_start, %a2
1838c2ecf20Sopenharmony_ci_copy_initmem:
1848c2ecf20Sopenharmony_ci	movel	%a0@+, %a1@+
1858c2ecf20Sopenharmony_ci	cmpal	%a1, %a2
1868c2ecf20Sopenharmony_ci	bhi	_copy_initmem
1878c2ecf20Sopenharmony_ci#endif /* CONFIG_ROMKERNEL */
1888c2ecf20Sopenharmony_ci
1898c2ecf20Sopenharmony_ci/*****************************************************************************
1908c2ecf20Sopenharmony_ci * Setup basic memory information for kernel
1918c2ecf20Sopenharmony_ci *****************************************************************************/
1928c2ecf20Sopenharmony_ci	movel	#CONFIG_VECTORBASE,_ramvec	/* set vector base location */
1938c2ecf20Sopenharmony_ci	movel	#CONFIG_RAMBASE,_rambase	/* set the base of RAM */
1948c2ecf20Sopenharmony_ci	movel	#RAMEND, _ramend		/* set end ram addr */
1958c2ecf20Sopenharmony_ci	lea	__bss_stop,%a1
1968c2ecf20Sopenharmony_ci	movel	%a1,_ramstart
1978c2ecf20Sopenharmony_ci
1988c2ecf20Sopenharmony_ci/*****************************************************************************
1998c2ecf20Sopenharmony_ci * If the kernel is in RAM, move romfs to right above bss and
2008c2ecf20Sopenharmony_ci * adjust _ramstart to where romfs ends.
2018c2ecf20Sopenharmony_ci *
2028c2ecf20Sopenharmony_ci * (Do this only if CONFIG_MTD_UCLINUX is true)
2038c2ecf20Sopenharmony_ci *****************************************************************************/
2048c2ecf20Sopenharmony_ci
2058c2ecf20Sopenharmony_ci#if defined(CONFIG_ROMFS_FS) && defined(CONFIG_RAMKERNEL) && \
2068c2ecf20Sopenharmony_ci    defined(CONFIG_MTD_UCLINUX)
2078c2ecf20Sopenharmony_ci	lea	__bss_start, %a0		/* get start of bss */
2088c2ecf20Sopenharmony_ci	lea	__bss_stop, %a1			/* set up destination  */
2098c2ecf20Sopenharmony_ci	movel	%a0, %a2			/* copy of bss start */
2108c2ecf20Sopenharmony_ci
2118c2ecf20Sopenharmony_ci	movel	8(%a0), %d0			/* get size of ROMFS */
2128c2ecf20Sopenharmony_ci	addql	#8, %d0				/* allow for rounding */
2138c2ecf20Sopenharmony_ci	andl	#0xfffffffc, %d0		/* whole words */
2148c2ecf20Sopenharmony_ci
2158c2ecf20Sopenharmony_ci	addl	%d0, %a0			/* copy from end */
2168c2ecf20Sopenharmony_ci	addl	%d0, %a1			/* copy from end */
2178c2ecf20Sopenharmony_ci	movel	%a1, _ramstart			/* set start of ram */
2188c2ecf20Sopenharmony_ci_copy_romfs:
2198c2ecf20Sopenharmony_ci	movel	-(%a0), -(%a1)			/* copy dword */
2208c2ecf20Sopenharmony_ci	cmpl	%a0, %a2			/* check if at end */
2218c2ecf20Sopenharmony_ci	bne	_copy_romfs
2228c2ecf20Sopenharmony_ci#endif /* CONFIG_ROMFS_FS && CONFIG_RAMKERNEL && CONFIG_MTD_UCLINUX */
2238c2ecf20Sopenharmony_ci
2248c2ecf20Sopenharmony_ci/*****************************************************************************
2258c2ecf20Sopenharmony_ci * Clear bss region
2268c2ecf20Sopenharmony_ci *****************************************************************************/
2278c2ecf20Sopenharmony_ci	lea	__bss_start, %a0		/* get start of bss */
2288c2ecf20Sopenharmony_ci	lea	__bss_stop, %a1			/* get end of bss */
2298c2ecf20Sopenharmony_ci_clear_bss:
2308c2ecf20Sopenharmony_ci	movel	#0, (%a0)+			/* clear each word */
2318c2ecf20Sopenharmony_ci	cmpl	%a0, %a1			/* check if at end */
2328c2ecf20Sopenharmony_ci	bne	_clear_bss
2338c2ecf20Sopenharmony_ci
2348c2ecf20Sopenharmony_ci/*****************************************************************************
2358c2ecf20Sopenharmony_ci * Load the current task pointer and stack.
2368c2ecf20Sopenharmony_ci *****************************************************************************/
2378c2ecf20Sopenharmony_ci	lea	init_thread_union,%a0
2388c2ecf20Sopenharmony_ci	lea	THREAD_SIZE(%a0),%sp
2398c2ecf20Sopenharmony_ci	jsr	start_kernel			/* start Linux kernel */
2408c2ecf20Sopenharmony_ci_exit:
2418c2ecf20Sopenharmony_ci	jmp	_exit				/* should never get here */
242