1/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
2/*
3 * Format of an instruction in memory.
4 *
5 * Copyright (C) 2020 Loongson Technology Corporation Limited
6 */
7#ifndef _UAPI_ASM_INST_H
8#define _UAPI_ASM_INST_H
9
10#include <asm/bitfield.h>
11
12enum reg0_op {
13	tlbclr_op = 0x19208, gtlbclr_op=0x19208,
14	tlbflush_op = 0x19209, gtlbflush_op=0x19209,
15	tlbsrch_op = 0x1920a, gtlbsrch_op=0x1920a,
16	tlbrd_op = 0x1920b, gtlbrd_op=0x1920b,
17	tlbwr_op = 0x1920c, gtlbwr_op=0x1920c,
18	tlbfill_op = 0x1920d, gtlbfill_op=0x1920d,
19	ertn_op = 0x1920e,
20};
21
22enum reg0i15_op {
23	break_op = 0x54, dbcl_op, syscall_op, hypcall_op,
24	idle_op = 0xc91, dbar_op = 0x70e4, ibar_op,
25};
26
27enum reg0i26_op {
28	b_op = 0x14, bl_op,
29};
30
31enum reg1i20_op {
32	lu12iw_op = 0xa, lu32id_op, pcaddi_op, pcalau12i_op,
33	pcaddu12i_op, pcaddu18i_op,
34};
35
36enum reg1i21_op {
37	beqz_op = 0x10, bnez_op, bceqz_op, bcnez_op=0x12, jiscr0_op=0x12, jiscr1_op=0x12,
38};
39
40enum reg2_op {
41	gr2scr_op = 0x2, scr2gr_op, clow_op,
42	clzw_op, ctow_op, ctzw_op, clod_op,
43	clzd_op, ctod_op, ctzd_op, revb2h_op,
44	revb4h_op, revb2w_op, revbd_op, revh2w_op,
45	revhd_op, bitrev4b_op, bitrev8b_op, bitrevw_op,
46	bitrevd_op, extwh_op, extwb_op, rdtimelw_op,
47	rdtimehw_op, rdtimed_op, cpucfg_op,
48	iocsrrdb_op = 0x19200, iocsrrdh_op, iocsrrdw_op, iocsrrdd_op,
49	iocsrwrb_op, iocsrwrh_op, iocsrwrw_op, iocsrwrd_op,
50	movgr2fcsr_op = 0x4530, movfcsr2gr_op = 0x4532,
51	movgr2cf_op = 0x4536, movcf2gr_op = 0x4537,
52};
53
54enum reg2ui3_op {
55	rotrib_op = 0x261, rcrib_op = 0x281,
56};
57
58enum reg2ui4_op {
59	rotrih_op = 0x131, rcrih_op = 0x141,
60};
61
62enum reg2ui5_op {
63	slliw_op = 0x81, srliw_op = 0x89, sraiw_op = 0x91, rotriw_op = 0x99,
64	rcriw_op = 0xa1,
65};
66
67enum reg2ui6_op {
68	sllid_op = 0x41, srlid_op = 0x45, sraid_op = 0x49, rotrid_op = 0x4d,
69	rcrid_op = 0x51,
70};
71
72enum reg2ui12_op {
73	andi_op = 0xd, ori_op, xori_op,
74};
75
76enum reg2lsbw_op {
77	bstrinsw_op = 0x3, bstrpickw_op = 0x3,
78};
79
80enum reg2lsbd_op {
81	bstrinsd_op = 0x2, bstrpickd_op = 0x3,
82};
83
84enum reg2i8_op {
85	lddir_op = 0x190, ldpte_op,
86};
87
88enum reg2i8idx1_op {
89	vstelmd_op = 0x622,
90};
91
92enum reg2i8idx2_op {
93	vstelmw_op = 0x312, xvstelmd_op = 0x331,
94};
95
96enum reg2i8idx3_op {
97	vstelmh_op = 0x18a, xvstelmw_op = 0x199,
98};
99
100enum reg2i8idx4_op {
101	vstelmb_op = 0xc6, xvstelmh_op = 0xcd,
102};
103
104enum reg2i8idx5_op {
105	xvstelmb_op = 0x67,
106};
107
108enum reg2i9_op {
109	vldrepld_op = 0x602, xvldrepld_op = 0x642,
110};
111
112enum reg2i10_op {
113	vldreplw_op = 0x302, xvldreplw_op = 0x322,
114};
115
116enum reg2i11_op {
117	vldreplh_op = 0x182, xvldreplh_op = 0x192,
118};
119
120enum reg2i12_op {
121	slti_op = 0x8, sltui_op, addiw_op, addid_op,
122	lu52id_op, cacop_op = 0x18, xvldreplb_op = 0xca,
123	ldb_op = 0xa0, ldh_op, ldw_op, ldd_op, stb_op, sth_op,
124	stw_op, std_op, ldbu_op, ldhu_op, ldwu_op, preld_op,
125	flds_op, fsts_op, fldd_op, fstd_op, vld_op, vst_op, xvld_op,
126	xvst_op, ldlw_op = 0xb8, ldrw_op, ldld_op, ldrd_op, stlw_op,
127	strw_op, stld_op, strd_op, vldreplb_op = 0xc2,
128};
129
130enum reg2i14_op {
131	llw_op = 0x20, scw_op, lld_op, scd_op, ldptrw_op, stptrw_op,
132	ldptrd_op, stptrd_op,
133};
134
135enum reg2i16_op {
136	addu16id_op = 0x4, jirl_op = 0x13, beq_op = 0x16, bne_op, blt_op, bge_op, bltu_op, bgeu_op,
137};
138
139enum reg2csr_op {
140	csrrd_op = 0x4, csrwr_op = 0x4, csrxchg_op = 0x4,
141	gcsrrd_op = 0x5, gcsrwr_op = 0x5, gcsrxchg_op = 0x5,
142};
143
144enum reg3_op {
145	asrtled_op = 0x2, asrtgtd_op,
146	addw_op = 0x20, addd_op, subw_op, subd_op,
147	slt_op, sltu_op, maskeqz_op, masknez_op,
148	nor_op, and_op, or_op, xor_op, orn_op,
149	andn_op, sllw_op, srlw_op, sraw_op, slld_op,
150	srld_op, srad_op, rotrb_op, rotrh_op,
151	rotrw_op, rotrd_op, mulw_op, mulhw_op,
152	mulhwu_op, muld_op, mulhd_op, mulhdu_op,
153	mulwdw_op, mulwdwu_op, divw_op, modw_op,
154	divwu_op, modwu_op, divd_op, modd_op,
155	divdu_op, moddu_op, crcwbw_op,
156	crcwhw_op, crcwww_op, crcwdw_op, crccwbw_op,
157	crccwhw_op, crccwww_op, crccwdw_op, addu12iw_op,
158	addu12id_op,
159	adcb_op = 0x60, adch_op, adcw_op, adcd_op,
160	sbcb_op, sbch_op, sbcw_op, sbcd_op,
161	rcrb_op, rcrh_op, rcrw_op, rcrd_op,
162	ldxb_op = 0x7000, ldxh_op = 0x7008, ldxw_op = 0x7010, ldxd_op = 0x7018,
163	stxb_op = 0x7020, stxh_op = 0x7028, stxw_op = 0x7030, stxd_op = 0x7038,
164	ldxbu_op = 0x7040, ldxhu_op = 0x7048, ldxwu_op = 0x7050,
165	preldx_op = 0x7058, fldxs_op = 0x7060, fldxd_op = 0x7068,
166	fstxs_op = 0x7070, fstxd_op = 0x7078, vldx_op = 0x7080,
167	vstx_op = 0x7088, xvldx_op = 0x7090, xvstx_op = 0x7098,
168	amswapw_op = 0x70c0, amswapd_op, amaddw_op, amaddd_op, amandw_op,
169	amandd_op, amorw_op, amord_op, amxorw_op, amxord_op, ammaxw_op,
170	ammaxd_op, amminw_op, ammind_op, ammaxwu_op, ammaxdu_op,
171	amminwu_op, ammindu_op, amswap_dbw_op, amswap_dbd_op, amadd_dbw_op,
172	amadd_dbd_op, amand_dbw_op, amand_dbd_op, amor_dbw_op, amor_dbd_op,
173	amxor_dbw_op, amxor_dbd_op, ammax_dbw_op, ammax_dbd_op, ammin_dbw_op,
174	ammin_dbd_op, ammax_dbwu_op, ammax_dbdu_op, ammin_dbwu_op,
175	ammin_dbdu_op, fldgts_op = 0x70e8, fldgtd_op,
176	fldles_op, fldled_op, fstgts_op, fstgtd_op, fstles_op, fstled_op,
177	ldgtb_op, ldgth_op, ldgtw_op, ldgtd_op, ldleb_op, ldleh_op, ldlew_op,
178	ldled_op, stgtb_op, stgth_op, stgtw_op, stgtd_op, stleb_op, stleh_op,
179	stlew_op, stled_op,
180};
181
182enum reg3sa2_op {
183	alslw_op = 0x2, alslwu_op, bytepickw_op, alsld_op = 0x16,
184
185};
186
187enum reg3sa3_op {
188	bytepickd_op = 0x3,
189};
190
191struct reg2_format {
192	__BITFIELD_FIELD(unsigned int opcode : 22,
193	__BITFIELD_FIELD(unsigned int rj : 5,
194	__BITFIELD_FIELD(unsigned int rd : 5,
195	;)))
196};
197
198struct reg2ui3_format {
199	__BITFIELD_FIELD(unsigned int opcode : 19,
200	__BITFIELD_FIELD(unsigned int simmediate : 3,
201	__BITFIELD_FIELD(unsigned int rj : 5,
202	__BITFIELD_FIELD(unsigned int rd : 5,
203	;))))
204};
205
206struct reg2ui4_format {
207	__BITFIELD_FIELD(unsigned int opcode : 18,
208	__BITFIELD_FIELD(unsigned int simmediate : 4,
209	__BITFIELD_FIELD(unsigned int rj : 5,
210	__BITFIELD_FIELD(unsigned int rd : 5,
211	;))))
212};
213
214struct reg2ui5_format {
215	__BITFIELD_FIELD(unsigned int opcode : 17,
216	__BITFIELD_FIELD(unsigned int simmediate : 5,
217	__BITFIELD_FIELD(unsigned int rj : 5,
218	__BITFIELD_FIELD(unsigned int rd : 5,
219	;))))
220};
221
222struct reg2ui6_format {
223	__BITFIELD_FIELD(unsigned int opcode : 16,
224	__BITFIELD_FIELD(unsigned int simmediate : 6,
225	__BITFIELD_FIELD(unsigned int rj : 5,
226	__BITFIELD_FIELD(unsigned int rd : 5,
227	;))))
228};
229
230struct reg2lsbw_format {
231	__BITFIELD_FIELD(unsigned int opcode : 11,
232	__BITFIELD_FIELD(unsigned int msbw : 5,
233	__BITFIELD_FIELD(unsigned int op : 1,
234	__BITFIELD_FIELD(unsigned int lsbw : 5,
235	__BITFIELD_FIELD(unsigned int rj : 5,
236	__BITFIELD_FIELD(unsigned int rd : 5,
237	;))))))
238};
239
240struct reg2lsbd_format {
241	__BITFIELD_FIELD(unsigned int opcode : 10,
242	__BITFIELD_FIELD(unsigned int msbd : 6,
243	__BITFIELD_FIELD(unsigned int lsbd : 6,
244	__BITFIELD_FIELD(unsigned int rj : 5,
245	__BITFIELD_FIELD(unsigned int rd : 5,
246	;)))))
247};
248
249struct reg3_format {
250	__BITFIELD_FIELD(unsigned int opcode : 17,
251	__BITFIELD_FIELD(unsigned int rk : 5,
252	__BITFIELD_FIELD(unsigned int rj : 5,
253	__BITFIELD_FIELD(unsigned int rd : 5,
254	;))))
255};
256
257struct reg3sa2_format {
258	__BITFIELD_FIELD(unsigned int opcode : 15,
259	__BITFIELD_FIELD(unsigned int simmediate : 2,
260	__BITFIELD_FIELD(unsigned int rk : 5,
261	__BITFIELD_FIELD(unsigned int rj : 5,
262	__BITFIELD_FIELD(unsigned int rd : 5,
263	;)))))
264};
265
266struct reg3sa3_format {
267	__BITFIELD_FIELD(unsigned int opcode : 14,
268	__BITFIELD_FIELD(unsigned int simmediate : 3,
269	__BITFIELD_FIELD(unsigned int rk : 5,
270	__BITFIELD_FIELD(unsigned int rj : 5,
271	__BITFIELD_FIELD(unsigned int rd : 5,
272	;)))))
273};
274
275struct reg3sa4_format {
276	__BITFIELD_FIELD(unsigned int opcode : 13,
277	__BITFIELD_FIELD(unsigned int simmediate : 4,
278	__BITFIELD_FIELD(unsigned int rk : 5,
279	__BITFIELD_FIELD(unsigned int rj : 5,
280	__BITFIELD_FIELD(unsigned int rd : 5,
281	;)))))
282};
283
284struct reg4_format {
285	__BITFIELD_FIELD(unsigned int opcode : 12,
286	__BITFIELD_FIELD(unsigned int fa : 5,
287	__BITFIELD_FIELD(unsigned int fk : 5,
288	__BITFIELD_FIELD(unsigned int fj : 5,
289	__BITFIELD_FIELD(unsigned int fd : 5,
290	;)))))
291};
292
293struct reg2i8_format {
294	__BITFIELD_FIELD(unsigned int opcode : 14,
295	__BITFIELD_FIELD(unsigned int simmediate : 8,
296	__BITFIELD_FIELD(unsigned int rj : 5,
297	__BITFIELD_FIELD(unsigned int rd : 5,
298	;))))
299};
300
301struct reg2i8idx1_format {
302	__BITFIELD_FIELD(unsigned int opcode : 13,
303	__BITFIELD_FIELD(unsigned int idx : 1,
304	__BITFIELD_FIELD(unsigned int simmediate : 8,
305	__BITFIELD_FIELD(unsigned int rj : 5,
306	__BITFIELD_FIELD(unsigned int rd : 5,
307	;)))))
308};
309
310struct reg2i8idx2_format {
311	__BITFIELD_FIELD(unsigned int opcode : 12,
312	__BITFIELD_FIELD(unsigned int idx : 2,
313	__BITFIELD_FIELD(unsigned int simmediate : 8,
314	__BITFIELD_FIELD(unsigned int rj : 5,
315	__BITFIELD_FIELD(unsigned int rd : 5,
316	;)))))
317};
318
319struct reg2i8idx3_format {
320	__BITFIELD_FIELD(unsigned int opcode : 11,
321	__BITFIELD_FIELD(unsigned int idx : 3,
322	__BITFIELD_FIELD(unsigned int simmediate : 8,
323	__BITFIELD_FIELD(unsigned int rj : 5,
324	__BITFIELD_FIELD(unsigned int rd : 5,
325	;)))))
326};
327
328struct reg2i8idx4_format {
329	__BITFIELD_FIELD(unsigned int opcode : 10,
330	__BITFIELD_FIELD(unsigned int idx : 4,
331	__BITFIELD_FIELD(unsigned int simmediate : 8,
332	__BITFIELD_FIELD(unsigned int rj : 5,
333	__BITFIELD_FIELD(unsigned int rd : 5,
334	;)))))
335};
336
337struct reg2i8idx5_format {
338	__BITFIELD_FIELD(unsigned int opcode : 9,
339	__BITFIELD_FIELD(unsigned int idx : 5,
340	__BITFIELD_FIELD(unsigned int simmediate : 8,
341	__BITFIELD_FIELD(unsigned int rj : 5,
342	__BITFIELD_FIELD(unsigned int rd : 5,
343	;)))))
344};
345
346struct reg2i9_format {
347	__BITFIELD_FIELD(unsigned int opcode : 13,
348	__BITFIELD_FIELD(unsigned int simmediate : 9,
349	__BITFIELD_FIELD(unsigned int rj : 5,
350	__BITFIELD_FIELD(unsigned int rd : 5,
351	;))))
352};
353
354struct reg2i10_format {
355	__BITFIELD_FIELD(unsigned int opcode : 12,
356	__BITFIELD_FIELD(unsigned int simmediate : 10,
357	__BITFIELD_FIELD(unsigned int rj : 5,
358	__BITFIELD_FIELD(unsigned int rd : 5,
359	;))))
360};
361
362struct reg2i11_format {
363	__BITFIELD_FIELD(unsigned int opcode : 11,
364	__BITFIELD_FIELD(unsigned int simmediate : 11,
365	__BITFIELD_FIELD(unsigned int rj : 5,
366	__BITFIELD_FIELD(unsigned int rd : 5,
367	;))))
368};
369
370struct reg2i12_format {
371	__BITFIELD_FIELD(unsigned int opcode : 10,
372	__BITFIELD_FIELD(signed int simmediate : 12,
373	__BITFIELD_FIELD(unsigned int rj : 5,
374	__BITFIELD_FIELD(unsigned int rd : 5,
375	;))))
376};
377
378struct reg2ui12_format {
379	__BITFIELD_FIELD(unsigned int opcode : 10,
380	__BITFIELD_FIELD(unsigned int simmediate : 12,
381	__BITFIELD_FIELD(unsigned int rj : 5,
382	__BITFIELD_FIELD(unsigned int rd : 5,
383	;))))
384};
385
386struct reg2i14_format {
387	__BITFIELD_FIELD(unsigned int opcode : 8,
388	__BITFIELD_FIELD(unsigned int simmediate : 14,
389	__BITFIELD_FIELD(unsigned int rj : 5,
390	__BITFIELD_FIELD(unsigned int rd : 5,
391	;))))
392};
393
394struct reg2i16_format {
395	__BITFIELD_FIELD(unsigned int opcode : 6,
396	__BITFIELD_FIELD(unsigned int simmediate : 16,
397	__BITFIELD_FIELD(unsigned int rj : 5,
398	__BITFIELD_FIELD(unsigned int rd : 5,
399	;))))
400};
401
402struct reg2csr_format {
403	__BITFIELD_FIELD(unsigned int opcode : 8,
404	__BITFIELD_FIELD(unsigned int csr : 14,
405	__BITFIELD_FIELD(unsigned int rj : 5,
406	__BITFIELD_FIELD(unsigned int rd : 5,
407	;))))
408};
409
410struct reg1i21_format {
411	__BITFIELD_FIELD(unsigned int opcode : 6,
412	__BITFIELD_FIELD(unsigned int simmediate_l : 16,
413	__BITFIELD_FIELD(unsigned int rj : 5,
414	__BITFIELD_FIELD(unsigned int simmediate_h  : 5,
415	;))))
416};
417
418struct reg1i20_format {
419	__BITFIELD_FIELD(unsigned int opcode : 7,
420	__BITFIELD_FIELD(unsigned int simmediate : 20,
421	__BITFIELD_FIELD(unsigned int rd : 5,
422	;)))
423};
424
425struct reg0i15_format {
426	__BITFIELD_FIELD(unsigned int opcode : 17,
427	__BITFIELD_FIELD(unsigned int simmediate : 15,
428	;))
429};
430
431struct reg0i26_format {
432	__BITFIELD_FIELD(unsigned int opcode : 6,
433	__BITFIELD_FIELD(unsigned int simmediate_l : 16,
434	__BITFIELD_FIELD(unsigned int simmediate_h : 10,
435	;)))
436};
437
438union loongarch_instruction {
439	unsigned int word;
440	unsigned short halfword[2];
441	unsigned char byte[4];
442	struct reg2_format reg2_format;
443	struct reg2ui3_format reg2ui3_format;
444	struct reg2ui4_format reg2ui4_format;
445	struct reg2ui5_format reg2ui5_format;
446	struct reg2ui6_format reg2ui6_format;
447	struct reg2ui12_format reg2ui12_format;
448	struct reg2lsbw_format reg2lsbw_format;
449	struct reg2lsbd_format reg2lsbd_format;
450	struct reg3_format reg3_format;
451	struct reg3sa2_format reg3sa2_format;
452	struct reg3sa3_format reg3sa3_format;
453	struct reg3sa4_format reg3sa4_format;
454	struct reg4_format reg4_format;
455	struct reg2i8_format reg2i8_format;
456	struct reg2i8idx1_format reg2i8idx1_format;
457	struct reg2i8idx2_format reg2i8idx2_format;
458	struct reg2i8idx3_format reg2i8idx3_format;
459	struct reg2i8idx4_format reg2i8idx4_format;
460	struct reg2i8idx5_format reg2i8idx5_format;
461	struct reg2i9_format reg2i9_format;
462	struct reg2i10_format reg2i10_format;
463	struct reg2i11_format reg2i11_format;
464	struct reg2i12_format reg2i12_format;
465	struct reg2i14_format reg2i14_format;
466	struct reg2i16_format reg2i16_format;
467	struct reg2csr_format reg2csr_format;
468	struct reg1i21_format reg1i21_format;
469	struct reg1i20_format reg1i20_format;
470	struct reg0i15_format reg0i15_format;
471	struct reg0i26_format reg0i26_format;
472};
473
474#endif /* _UAPI_ASM_INST_H */
475