1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright (C) 2020 Loongson Technology Co., Ltd.
4 */
5#ifndef _ASM_ADDRSPACE_H
6#define _ASM_ADDRSPACE_H
7
8#include <linux/const.h>
9
10#include <asm/loongarchregs.h>
11
12/*
13 * This gives the physical RAM offset.
14 */
15#ifndef __ASSEMBLY__
16#ifndef PHYS_OFFSET
17#define PHYS_OFFSET	_UL(0)
18#endif
19extern unsigned long vm_map_base;
20#endif /* __ASSEMBLY__ */
21
22#ifndef IO_BASE
23#define IO_BASE			CSR_DMW0_BASE
24#endif
25
26#ifndef CACHE_BASE
27#define CACHE_BASE		CSR_DMW1_BASE
28#endif
29
30#ifndef UNCACHE_BASE
31#define UNCACHE_BASE		CSR_DMW0_BASE
32#endif
33
34#define DMW_PABITS	48
35#define TO_PHYS_MASK	((1ULL << DMW_PABITS) - 1)
36
37/*
38 * Memory above this physical address will be considered highmem.
39 */
40#ifndef HIGHMEM_START
41#define HIGHMEM_START		(_UL(1) << _UL(DMW_PABITS))
42#endif
43
44#define TO_PHYS(x)		(		((x) & TO_PHYS_MASK))
45#define TO_CACHE(x)		(CACHE_BASE   |	((x) & TO_PHYS_MASK))
46#define TO_UNCACHE(x)		(UNCACHE_BASE |	((x) & TO_PHYS_MASK))
47
48/*
49 * This handles the memory map.
50 */
51#ifndef PAGE_OFFSET
52#define PAGE_OFFSET		(CACHE_BASE + PHYS_OFFSET)
53#endif
54
55#ifndef FIXADDR_TOP
56#define FIXADDR_TOP		((unsigned long)(long)(int)0xfffe0000)
57#endif
58
59#ifdef __ASSEMBLY__
60#define _ATYPE_
61#define _ATYPE32_
62#define _ATYPE64_
63#else
64#define _ATYPE_		__PTRDIFF_TYPE__
65#define _ATYPE32_	int
66#define _ATYPE64_	__s64
67#endif
68
69#ifdef CONFIG_64BIT
70#define _CONST64_(x)	_UL(x)
71#else
72#define _CONST64_(x)	_ULL(x)
73#endif
74
75/*
76 *  32/64-bit LoongArch address spaces
77 */
78#ifdef __ASSEMBLY__
79#define _ACAST32_
80#define _ACAST64_
81#else
82#define _ACAST32_		(_ATYPE_)(_ATYPE32_)	/* widen if necessary */
83#define _ACAST64_		(_ATYPE64_)		/* do _not_ narrow */
84#endif
85
86#ifdef CONFIG_32BIT
87
88#define UVRANGE			0x00000000
89#define KPRANGE0		0x80000000
90#define KPRANGE1		0xa0000000
91#define KVRANGE			0xc0000000
92
93#else
94
95#define XUVRANGE		_CONST64_(0x0000000000000000)
96#define XSPRANGE		_CONST64_(0x4000000000000000)
97#define XKPRANGE		_CONST64_(0x8000000000000000)
98#define XKVRANGE		_CONST64_(0xc000000000000000)
99
100#endif
101
102/*
103 * Returns the physical address of a KPRANGEx / XKPRANGE address
104 */
105#define PHYSADDR(a)		((_ACAST64_(a)) & TO_PHYS_MASK)
106
107/*
108 * On LoongArch, I/O ports mappring is following:
109 *
110 *              |         ....          |
111 *              |-----------------------|
112 *              | pci io ports(16K~32M) |
113 *              |-----------------------|
114 *              | isa io ports(0  ~16K) |
115 * PCI_IOBASE ->|-----------------------|
116 *              |         ....          |
117 */
118#define PCI_IOBASE	((void __iomem *)(vm_map_base + (2 * PAGE_SIZE)))
119#define PCI_IOSIZE	SZ_32M
120#define ISA_IOSIZE	SZ_16K
121#define IO_SPACE_LIMIT	(PCI_IOSIZE - 1)
122
123#endif /* _ASM_ADDRSPACE_H */
124