18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2020 Loongson Technology Co., Ltd. 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci#ifndef _ASM_ADDRSPACE_H 68c2ecf20Sopenharmony_ci#define _ASM_ADDRSPACE_H 78c2ecf20Sopenharmony_ci 88c2ecf20Sopenharmony_ci#include <linux/const.h> 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <asm/loongarchregs.h> 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci/* 138c2ecf20Sopenharmony_ci * This gives the physical RAM offset. 148c2ecf20Sopenharmony_ci */ 158c2ecf20Sopenharmony_ci#ifndef __ASSEMBLY__ 168c2ecf20Sopenharmony_ci#ifndef PHYS_OFFSET 178c2ecf20Sopenharmony_ci#define PHYS_OFFSET _UL(0) 188c2ecf20Sopenharmony_ci#endif 198c2ecf20Sopenharmony_ciextern unsigned long vm_map_base; 208c2ecf20Sopenharmony_ci#endif /* __ASSEMBLY__ */ 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci#ifndef IO_BASE 238c2ecf20Sopenharmony_ci#define IO_BASE CSR_DMW0_BASE 248c2ecf20Sopenharmony_ci#endif 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci#ifndef CACHE_BASE 278c2ecf20Sopenharmony_ci#define CACHE_BASE CSR_DMW1_BASE 288c2ecf20Sopenharmony_ci#endif 298c2ecf20Sopenharmony_ci 308c2ecf20Sopenharmony_ci#ifndef UNCACHE_BASE 318c2ecf20Sopenharmony_ci#define UNCACHE_BASE CSR_DMW0_BASE 328c2ecf20Sopenharmony_ci#endif 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_ci#define DMW_PABITS 48 358c2ecf20Sopenharmony_ci#define TO_PHYS_MASK ((1ULL << DMW_PABITS) - 1) 368c2ecf20Sopenharmony_ci 378c2ecf20Sopenharmony_ci/* 388c2ecf20Sopenharmony_ci * Memory above this physical address will be considered highmem. 398c2ecf20Sopenharmony_ci */ 408c2ecf20Sopenharmony_ci#ifndef HIGHMEM_START 418c2ecf20Sopenharmony_ci#define HIGHMEM_START (_UL(1) << _UL(DMW_PABITS)) 428c2ecf20Sopenharmony_ci#endif 438c2ecf20Sopenharmony_ci 448c2ecf20Sopenharmony_ci#define TO_PHYS(x) ( ((x) & TO_PHYS_MASK)) 458c2ecf20Sopenharmony_ci#define TO_CACHE(x) (CACHE_BASE | ((x) & TO_PHYS_MASK)) 468c2ecf20Sopenharmony_ci#define TO_UNCACHE(x) (UNCACHE_BASE | ((x) & TO_PHYS_MASK)) 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci/* 498c2ecf20Sopenharmony_ci * This handles the memory map. 508c2ecf20Sopenharmony_ci */ 518c2ecf20Sopenharmony_ci#ifndef PAGE_OFFSET 528c2ecf20Sopenharmony_ci#define PAGE_OFFSET (CACHE_BASE + PHYS_OFFSET) 538c2ecf20Sopenharmony_ci#endif 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci#ifndef FIXADDR_TOP 568c2ecf20Sopenharmony_ci#define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000) 578c2ecf20Sopenharmony_ci#endif 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_ci#ifdef __ASSEMBLY__ 608c2ecf20Sopenharmony_ci#define _ATYPE_ 618c2ecf20Sopenharmony_ci#define _ATYPE32_ 628c2ecf20Sopenharmony_ci#define _ATYPE64_ 638c2ecf20Sopenharmony_ci#else 648c2ecf20Sopenharmony_ci#define _ATYPE_ __PTRDIFF_TYPE__ 658c2ecf20Sopenharmony_ci#define _ATYPE32_ int 668c2ecf20Sopenharmony_ci#define _ATYPE64_ __s64 678c2ecf20Sopenharmony_ci#endif 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci#ifdef CONFIG_64BIT 708c2ecf20Sopenharmony_ci#define _CONST64_(x) _UL(x) 718c2ecf20Sopenharmony_ci#else 728c2ecf20Sopenharmony_ci#define _CONST64_(x) _ULL(x) 738c2ecf20Sopenharmony_ci#endif 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_ci/* 768c2ecf20Sopenharmony_ci * 32/64-bit LoongArch address spaces 778c2ecf20Sopenharmony_ci */ 788c2ecf20Sopenharmony_ci#ifdef __ASSEMBLY__ 798c2ecf20Sopenharmony_ci#define _ACAST32_ 808c2ecf20Sopenharmony_ci#define _ACAST64_ 818c2ecf20Sopenharmony_ci#else 828c2ecf20Sopenharmony_ci#define _ACAST32_ (_ATYPE_)(_ATYPE32_) /* widen if necessary */ 838c2ecf20Sopenharmony_ci#define _ACAST64_ (_ATYPE64_) /* do _not_ narrow */ 848c2ecf20Sopenharmony_ci#endif 858c2ecf20Sopenharmony_ci 868c2ecf20Sopenharmony_ci#ifdef CONFIG_32BIT 878c2ecf20Sopenharmony_ci 888c2ecf20Sopenharmony_ci#define UVRANGE 0x00000000 898c2ecf20Sopenharmony_ci#define KPRANGE0 0x80000000 908c2ecf20Sopenharmony_ci#define KPRANGE1 0xa0000000 918c2ecf20Sopenharmony_ci#define KVRANGE 0xc0000000 928c2ecf20Sopenharmony_ci 938c2ecf20Sopenharmony_ci#else 948c2ecf20Sopenharmony_ci 958c2ecf20Sopenharmony_ci#define XUVRANGE _CONST64_(0x0000000000000000) 968c2ecf20Sopenharmony_ci#define XSPRANGE _CONST64_(0x4000000000000000) 978c2ecf20Sopenharmony_ci#define XKPRANGE _CONST64_(0x8000000000000000) 988c2ecf20Sopenharmony_ci#define XKVRANGE _CONST64_(0xc000000000000000) 998c2ecf20Sopenharmony_ci 1008c2ecf20Sopenharmony_ci#endif 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci/* 1038c2ecf20Sopenharmony_ci * Returns the physical address of a KPRANGEx / XKPRANGE address 1048c2ecf20Sopenharmony_ci */ 1058c2ecf20Sopenharmony_ci#define PHYSADDR(a) ((_ACAST64_(a)) & TO_PHYS_MASK) 1068c2ecf20Sopenharmony_ci 1078c2ecf20Sopenharmony_ci/* 1088c2ecf20Sopenharmony_ci * On LoongArch, I/O ports mappring is following: 1098c2ecf20Sopenharmony_ci * 1108c2ecf20Sopenharmony_ci * | .... | 1118c2ecf20Sopenharmony_ci * |-----------------------| 1128c2ecf20Sopenharmony_ci * | pci io ports(16K~32M) | 1138c2ecf20Sopenharmony_ci * |-----------------------| 1148c2ecf20Sopenharmony_ci * | isa io ports(0 ~16K) | 1158c2ecf20Sopenharmony_ci * PCI_IOBASE ->|-----------------------| 1168c2ecf20Sopenharmony_ci * | .... | 1178c2ecf20Sopenharmony_ci */ 1188c2ecf20Sopenharmony_ci#define PCI_IOBASE ((void __iomem *)(vm_map_base + (2 * PAGE_SIZE))) 1198c2ecf20Sopenharmony_ci#define PCI_IOSIZE SZ_32M 1208c2ecf20Sopenharmony_ci#define ISA_IOSIZE SZ_16K 1218c2ecf20Sopenharmony_ci#define IO_SPACE_LIMIT (PCI_IOSIZE - 1) 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci#endif /* _ASM_ADDRSPACE_H */ 124