18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci#ifndef _ASM_IA64_PCI_H
38c2ecf20Sopenharmony_ci#define _ASM_IA64_PCI_H
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci#include <linux/mm.h>
68c2ecf20Sopenharmony_ci#include <linux/slab.h>
78c2ecf20Sopenharmony_ci#include <linux/spinlock.h>
88c2ecf20Sopenharmony_ci#include <linux/string.h>
98c2ecf20Sopenharmony_ci#include <linux/types.h>
108c2ecf20Sopenharmony_ci#include <linux/scatterlist.h>
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <asm/io.h>
138c2ecf20Sopenharmony_ci#include <asm/hw_irq.h>
148c2ecf20Sopenharmony_ci
158c2ecf20Sopenharmony_cistruct pci_vector_struct {
168c2ecf20Sopenharmony_ci	__u16 segment;	/* PCI Segment number */
178c2ecf20Sopenharmony_ci	__u16 bus;	/* PCI Bus number */
188c2ecf20Sopenharmony_ci	__u32 pci_id;	/* ACPI split 16 bits device, 16 bits function (see section 6.1.1) */
198c2ecf20Sopenharmony_ci	__u8 pin;	/* PCI PIN (0 = A, 1 = B, 2 = C, 3 = D) */
208c2ecf20Sopenharmony_ci	__u32 irq;	/* IRQ assigned */
218c2ecf20Sopenharmony_ci};
228c2ecf20Sopenharmony_ci
238c2ecf20Sopenharmony_ci/*
248c2ecf20Sopenharmony_ci * Can be used to override the logic in pci_scan_bus for skipping already-configured bus
258c2ecf20Sopenharmony_ci * numbers - to be used for buggy BIOSes or architectures with incomplete PCI setup by the
268c2ecf20Sopenharmony_ci * loader.
278c2ecf20Sopenharmony_ci */
288c2ecf20Sopenharmony_ci#define pcibios_assign_all_busses()     0
298c2ecf20Sopenharmony_ci
308c2ecf20Sopenharmony_ci#define PCIBIOS_MIN_IO		0x1000
318c2ecf20Sopenharmony_ci#define PCIBIOS_MIN_MEM		0x10000000
328c2ecf20Sopenharmony_ci
338c2ecf20Sopenharmony_ci#define HAVE_PCI_MMAP
348c2ecf20Sopenharmony_ci#define ARCH_GENERIC_PCI_MMAP_RESOURCE
358c2ecf20Sopenharmony_ci#define arch_can_pci_mmap_wc()	1
368c2ecf20Sopenharmony_ci
378c2ecf20Sopenharmony_ci#define HAVE_PCI_LEGACY
388c2ecf20Sopenharmony_ciextern int pci_mmap_legacy_page_range(struct pci_bus *bus,
398c2ecf20Sopenharmony_ci				      struct vm_area_struct *vma,
408c2ecf20Sopenharmony_ci				      enum pci_mmap_state mmap_state);
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_cichar *pci_get_legacy_mem(struct pci_bus *bus);
438c2ecf20Sopenharmony_ciint pci_legacy_read(struct pci_bus *bus, u16 port, u32 *val, u8 size);
448c2ecf20Sopenharmony_ciint pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size);
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_cistruct pci_controller {
478c2ecf20Sopenharmony_ci	struct acpi_device *companion;
488c2ecf20Sopenharmony_ci	void *iommu;
498c2ecf20Sopenharmony_ci	int segment;
508c2ecf20Sopenharmony_ci	int node;		/* nearest node with memory or NUMA_NO_NODE for global allocation */
518c2ecf20Sopenharmony_ci
528c2ecf20Sopenharmony_ci	void *platform_data;
538c2ecf20Sopenharmony_ci};
548c2ecf20Sopenharmony_ci
558c2ecf20Sopenharmony_ci
568c2ecf20Sopenharmony_ci#define PCI_CONTROLLER(busdev) ((struct pci_controller *) busdev->sysdata)
578c2ecf20Sopenharmony_ci#define pci_domain_nr(busdev)    (PCI_CONTROLLER(busdev)->segment)
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ciextern struct pci_ops pci_root_ops;
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_cistatic inline int pci_proc_domain(struct pci_bus *bus)
628c2ecf20Sopenharmony_ci{
638c2ecf20Sopenharmony_ci	return (pci_domain_nr(bus) != 0);
648c2ecf20Sopenharmony_ci}
658c2ecf20Sopenharmony_ci
668c2ecf20Sopenharmony_ci#define HAVE_ARCH_PCI_GET_LEGACY_IDE_IRQ
678c2ecf20Sopenharmony_cistatic inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
688c2ecf20Sopenharmony_ci{
698c2ecf20Sopenharmony_ci	return channel ? isa_irq_to_vector(15) : isa_irq_to_vector(14);
708c2ecf20Sopenharmony_ci}
718c2ecf20Sopenharmony_ci
728c2ecf20Sopenharmony_ci#endif /* _ASM_IA64_PCI_H */
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