18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: GPL-2.0-only 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (C) 2012 ARM Ltd. 48c2ecf20Sopenharmony_ci * Author: Catalin Marinas <catalin.marinas@arm.com> 58c2ecf20Sopenharmony_ci */ 68c2ecf20Sopenharmony_ci 78c2ecf20Sopenharmony_ci#include <linux/gfp.h> 88c2ecf20Sopenharmony_ci#include <linux/cache.h> 98c2ecf20Sopenharmony_ci#include <linux/dma-map-ops.h> 108c2ecf20Sopenharmony_ci#include <linux/dma-iommu.h> 118c2ecf20Sopenharmony_ci#include <xen/xen.h> 128c2ecf20Sopenharmony_ci#include <xen/swiotlb-xen.h> 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci#include <asm/cacheflush.h> 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_civoid arch_sync_dma_for_device(phys_addr_t paddr, size_t size, 178c2ecf20Sopenharmony_ci enum dma_data_direction dir) 188c2ecf20Sopenharmony_ci{ 198c2ecf20Sopenharmony_ci __dma_map_area(phys_to_virt(paddr), size, dir); 208c2ecf20Sopenharmony_ci} 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_civoid arch_sync_dma_for_cpu(phys_addr_t paddr, size_t size, 238c2ecf20Sopenharmony_ci enum dma_data_direction dir) 248c2ecf20Sopenharmony_ci{ 258c2ecf20Sopenharmony_ci __dma_unmap_area(phys_to_virt(paddr), size, dir); 268c2ecf20Sopenharmony_ci} 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_civoid arch_dma_prep_coherent(struct page *page, size_t size) 298c2ecf20Sopenharmony_ci{ 308c2ecf20Sopenharmony_ci __dma_flush_area(page_address(page), size); 318c2ecf20Sopenharmony_ci} 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#ifdef CONFIG_IOMMU_DMA 348c2ecf20Sopenharmony_civoid arch_teardown_dma_ops(struct device *dev) 358c2ecf20Sopenharmony_ci{ 368c2ecf20Sopenharmony_ci dev->dma_ops = NULL; 378c2ecf20Sopenharmony_ci} 388c2ecf20Sopenharmony_ci#endif 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_civoid arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size, 418c2ecf20Sopenharmony_ci const struct iommu_ops *iommu, bool coherent) 428c2ecf20Sopenharmony_ci{ 438c2ecf20Sopenharmony_ci int cls = cache_line_size_of_cpu(); 448c2ecf20Sopenharmony_ci 458c2ecf20Sopenharmony_ci WARN_TAINT(!coherent && cls > ARCH_DMA_MINALIGN, 468c2ecf20Sopenharmony_ci TAINT_CPU_OUT_OF_SPEC, 478c2ecf20Sopenharmony_ci "%s %s: ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)", 488c2ecf20Sopenharmony_ci dev_driver_string(dev), dev_name(dev), 498c2ecf20Sopenharmony_ci ARCH_DMA_MINALIGN, cls); 508c2ecf20Sopenharmony_ci 518c2ecf20Sopenharmony_ci dev->dma_coherent = coherent; 528c2ecf20Sopenharmony_ci if (iommu) 538c2ecf20Sopenharmony_ci iommu_setup_dma_ops(dev, dma_base, size); 548c2ecf20Sopenharmony_ci 558c2ecf20Sopenharmony_ci#ifdef CONFIG_XEN 568c2ecf20Sopenharmony_ci if (xen_initial_domain()) 578c2ecf20Sopenharmony_ci dev->dma_ops = &xen_swiotlb_dma_ops; 588c2ecf20Sopenharmony_ci#endif 598c2ecf20Sopenharmony_ci} 60