18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0 */
28c2ecf20Sopenharmony_ci#ifndef __ASM_ASM_UACCESS_H
38c2ecf20Sopenharmony_ci#define __ASM_ASM_UACCESS_H
48c2ecf20Sopenharmony_ci
58c2ecf20Sopenharmony_ci#include <asm/alternative-macros.h>
68c2ecf20Sopenharmony_ci#include <asm/kernel-pgtable.h>
78c2ecf20Sopenharmony_ci#include <asm/mmu.h>
88c2ecf20Sopenharmony_ci#include <asm/sysreg.h>
98c2ecf20Sopenharmony_ci#include <asm/assembler.h>
108c2ecf20Sopenharmony_ci
118c2ecf20Sopenharmony_ci/*
128c2ecf20Sopenharmony_ci * User access enabling/disabling macros.
138c2ecf20Sopenharmony_ci */
148c2ecf20Sopenharmony_ci#ifdef CONFIG_ARM64_SW_TTBR0_PAN
158c2ecf20Sopenharmony_ci	.macro	__uaccess_ttbr0_disable, tmp1
168c2ecf20Sopenharmony_ci	mrs	\tmp1, ttbr1_el1			// swapper_pg_dir
178c2ecf20Sopenharmony_ci	bic	\tmp1, \tmp1, #TTBR_ASID_MASK
188c2ecf20Sopenharmony_ci	sub	\tmp1, \tmp1, #PAGE_SIZE		// reserved_pg_dir just before swapper_pg_dir
198c2ecf20Sopenharmony_ci	msr	ttbr0_el1, \tmp1			// set reserved TTBR0_EL1
208c2ecf20Sopenharmony_ci	isb
218c2ecf20Sopenharmony_ci	add	\tmp1, \tmp1, #PAGE_SIZE
228c2ecf20Sopenharmony_ci	msr	ttbr1_el1, \tmp1		// set reserved ASID
238c2ecf20Sopenharmony_ci	isb
248c2ecf20Sopenharmony_ci	.endm
258c2ecf20Sopenharmony_ci
268c2ecf20Sopenharmony_ci	.macro	__uaccess_ttbr0_enable, tmp1, tmp2
278c2ecf20Sopenharmony_ci	get_current_task \tmp1
288c2ecf20Sopenharmony_ci	ldr	\tmp1, [\tmp1, #TSK_TI_TTBR0]	// load saved TTBR0_EL1
298c2ecf20Sopenharmony_ci	mrs	\tmp2, ttbr1_el1
308c2ecf20Sopenharmony_ci	extr    \tmp2, \tmp2, \tmp1, #48
318c2ecf20Sopenharmony_ci	ror     \tmp2, \tmp2, #16
328c2ecf20Sopenharmony_ci	msr	ttbr1_el1, \tmp2		// set the active ASID
338c2ecf20Sopenharmony_ci	isb
348c2ecf20Sopenharmony_ci	msr	ttbr0_el1, \tmp1		// set the non-PAN TTBR0_EL1
358c2ecf20Sopenharmony_ci	isb
368c2ecf20Sopenharmony_ci	.endm
378c2ecf20Sopenharmony_ci
388c2ecf20Sopenharmony_ci	.macro	uaccess_ttbr0_disable, tmp1, tmp2
398c2ecf20Sopenharmony_cialternative_if_not ARM64_HAS_PAN
408c2ecf20Sopenharmony_ci	save_and_disable_irq \tmp2		// avoid preemption
418c2ecf20Sopenharmony_ci	__uaccess_ttbr0_disable \tmp1
428c2ecf20Sopenharmony_ci	restore_irq \tmp2
438c2ecf20Sopenharmony_cialternative_else_nop_endif
448c2ecf20Sopenharmony_ci	.endm
458c2ecf20Sopenharmony_ci
468c2ecf20Sopenharmony_ci	.macro	uaccess_ttbr0_enable, tmp1, tmp2, tmp3
478c2ecf20Sopenharmony_cialternative_if_not ARM64_HAS_PAN
488c2ecf20Sopenharmony_ci	save_and_disable_irq \tmp3		// avoid preemption
498c2ecf20Sopenharmony_ci	__uaccess_ttbr0_enable \tmp1, \tmp2
508c2ecf20Sopenharmony_ci	restore_irq \tmp3
518c2ecf20Sopenharmony_cialternative_else_nop_endif
528c2ecf20Sopenharmony_ci	.endm
538c2ecf20Sopenharmony_ci#else
548c2ecf20Sopenharmony_ci	.macro	uaccess_ttbr0_disable, tmp1, tmp2
558c2ecf20Sopenharmony_ci	.endm
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci	.macro	uaccess_ttbr0_enable, tmp1, tmp2, tmp3
588c2ecf20Sopenharmony_ci	.endm
598c2ecf20Sopenharmony_ci#endif
608c2ecf20Sopenharmony_ci
618c2ecf20Sopenharmony_ci#endif
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