18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. 48c2ecf20Sopenharmony_ci */ 58c2ecf20Sopenharmony_ci 68c2ecf20Sopenharmony_ci#include <dt-bindings/gpio/gpio.h> 78c2ecf20Sopenharmony_ci#include <dt-bindings/interrupt-controller/arm-gic.h> 88c2ecf20Sopenharmony_ci#include <dt-bindings/clock/microchip,sparx5.h> 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci/ { 118c2ecf20Sopenharmony_ci compatible = "microchip,sparx5"; 128c2ecf20Sopenharmony_ci interrupt-parent = <&gic>; 138c2ecf20Sopenharmony_ci #address-cells = <2>; 148c2ecf20Sopenharmony_ci #size-cells = <1>; 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci aliases { 178c2ecf20Sopenharmony_ci spi0 = &spi0; 188c2ecf20Sopenharmony_ci serial0 = &uart0; 198c2ecf20Sopenharmony_ci serial1 = &uart1; 208c2ecf20Sopenharmony_ci }; 218c2ecf20Sopenharmony_ci 228c2ecf20Sopenharmony_ci chosen { 238c2ecf20Sopenharmony_ci stdout-path = "serial0:115200n8"; 248c2ecf20Sopenharmony_ci }; 258c2ecf20Sopenharmony_ci 268c2ecf20Sopenharmony_ci cpus { 278c2ecf20Sopenharmony_ci #address-cells = <2>; 288c2ecf20Sopenharmony_ci #size-cells = <0>; 298c2ecf20Sopenharmony_ci cpu-map { 308c2ecf20Sopenharmony_ci cluster0 { 318c2ecf20Sopenharmony_ci core0 { 328c2ecf20Sopenharmony_ci cpu = <&cpu0>; 338c2ecf20Sopenharmony_ci }; 348c2ecf20Sopenharmony_ci core1 { 358c2ecf20Sopenharmony_ci cpu = <&cpu1>; 368c2ecf20Sopenharmony_ci }; 378c2ecf20Sopenharmony_ci }; 388c2ecf20Sopenharmony_ci }; 398c2ecf20Sopenharmony_ci cpu0: cpu@0 { 408c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 418c2ecf20Sopenharmony_ci device_type = "cpu"; 428c2ecf20Sopenharmony_ci reg = <0x0 0x0>; 438c2ecf20Sopenharmony_ci enable-method = "psci"; 448c2ecf20Sopenharmony_ci next-level-cache = <&L2_0>; 458c2ecf20Sopenharmony_ci }; 468c2ecf20Sopenharmony_ci cpu1: cpu@1 { 478c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53"; 488c2ecf20Sopenharmony_ci device_type = "cpu"; 498c2ecf20Sopenharmony_ci reg = <0x0 0x1>; 508c2ecf20Sopenharmony_ci enable-method = "psci"; 518c2ecf20Sopenharmony_ci next-level-cache = <&L2_0>; 528c2ecf20Sopenharmony_ci }; 538c2ecf20Sopenharmony_ci L2_0: l2-cache0 { 548c2ecf20Sopenharmony_ci compatible = "cache"; 558c2ecf20Sopenharmony_ci }; 568c2ecf20Sopenharmony_ci }; 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci arm-pmu { 598c2ecf20Sopenharmony_ci compatible = "arm,cortex-a53-pmu"; 608c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>; 618c2ecf20Sopenharmony_ci interrupt-affinity = <&cpu0>, <&cpu1>; 628c2ecf20Sopenharmony_ci }; 638c2ecf20Sopenharmony_ci 648c2ecf20Sopenharmony_ci psci: psci { 658c2ecf20Sopenharmony_ci compatible = "arm,psci-0.2"; 668c2ecf20Sopenharmony_ci method = "smc"; 678c2ecf20Sopenharmony_ci }; 688c2ecf20Sopenharmony_ci 698c2ecf20Sopenharmony_ci timer { 708c2ecf20Sopenharmony_ci compatible = "arm,armv8-timer"; 718c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>, 728c2ecf20Sopenharmony_ci <GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>, 738c2ecf20Sopenharmony_ci <GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>, 748c2ecf20Sopenharmony_ci <GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>; 758c2ecf20Sopenharmony_ci }; 768c2ecf20Sopenharmony_ci 778c2ecf20Sopenharmony_ci lcpll_clk: lcpll-clk { 788c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 798c2ecf20Sopenharmony_ci #clock-cells = <0>; 808c2ecf20Sopenharmony_ci clock-frequency = <2500000000>; 818c2ecf20Sopenharmony_ci }; 828c2ecf20Sopenharmony_ci 838c2ecf20Sopenharmony_ci clks: clock-controller@61110000c { 848c2ecf20Sopenharmony_ci compatible = "microchip,sparx5-dpll"; 858c2ecf20Sopenharmony_ci #clock-cells = <1>; 868c2ecf20Sopenharmony_ci clocks = <&lcpll_clk>; 878c2ecf20Sopenharmony_ci reg = <0x6 0x1110000c 0x24>; 888c2ecf20Sopenharmony_ci }; 898c2ecf20Sopenharmony_ci 908c2ecf20Sopenharmony_ci ahb_clk: ahb-clk { 918c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 928c2ecf20Sopenharmony_ci #clock-cells = <0>; 938c2ecf20Sopenharmony_ci clock-frequency = <250000000>; 948c2ecf20Sopenharmony_ci }; 958c2ecf20Sopenharmony_ci 968c2ecf20Sopenharmony_ci sys_clk: sys-clk { 978c2ecf20Sopenharmony_ci compatible = "fixed-clock"; 988c2ecf20Sopenharmony_ci #clock-cells = <0>; 998c2ecf20Sopenharmony_ci clock-frequency = <625000000>; 1008c2ecf20Sopenharmony_ci }; 1018c2ecf20Sopenharmony_ci 1028c2ecf20Sopenharmony_ci axi: axi@600000000 { 1038c2ecf20Sopenharmony_ci compatible = "simple-bus"; 1048c2ecf20Sopenharmony_ci #address-cells = <2>; 1058c2ecf20Sopenharmony_ci #size-cells = <1>; 1068c2ecf20Sopenharmony_ci ranges; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci gic: interrupt-controller@600300000 { 1098c2ecf20Sopenharmony_ci compatible = "arm,gic-v3"; 1108c2ecf20Sopenharmony_ci #interrupt-cells = <3>; 1118c2ecf20Sopenharmony_ci #address-cells = <2>; 1128c2ecf20Sopenharmony_ci #size-cells = <2>; 1138c2ecf20Sopenharmony_ci interrupt-controller; 1148c2ecf20Sopenharmony_ci reg = <0x6 0x00300000 0x10000>, /* GIC Dist */ 1158c2ecf20Sopenharmony_ci <0x6 0x00340000 0xc0000>, /* GICR */ 1168c2ecf20Sopenharmony_ci <0x6 0x00200000 0x2000>, /* GICC */ 1178c2ecf20Sopenharmony_ci <0x6 0x00210000 0x2000>, /* GICV */ 1188c2ecf20Sopenharmony_ci <0x6 0x00220000 0x2000>; /* GICH */ 1198c2ecf20Sopenharmony_ci interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 1208c2ecf20Sopenharmony_ci }; 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_ci cpu_ctrl: syscon@600000000 { 1238c2ecf20Sopenharmony_ci compatible = "microchip,sparx5-cpu-syscon", "syscon", 1248c2ecf20Sopenharmony_ci "simple-mfd"; 1258c2ecf20Sopenharmony_ci reg = <0x6 0x00000000 0xd0>; 1268c2ecf20Sopenharmony_ci mux: mux-controller { 1278c2ecf20Sopenharmony_ci compatible = "mmio-mux"; 1288c2ecf20Sopenharmony_ci #mux-control-cells = <0>; 1298c2ecf20Sopenharmony_ci /* 1308c2ecf20Sopenharmony_ci * SI_OWNER and SI2_OWNER in GENERAL_CTRL 1318c2ecf20Sopenharmony_ci * SPI: value 9 - (SIMC,SIBM) = 0b1001 1328c2ecf20Sopenharmony_ci * SPI2: value 6 - (SIBM,SIMC) = 0b0110 1338c2ecf20Sopenharmony_ci */ 1348c2ecf20Sopenharmony_ci mux-reg-masks = <0x88 0xf0>; 1358c2ecf20Sopenharmony_ci }; 1368c2ecf20Sopenharmony_ci }; 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_ci uart0: serial@600100000 { 1398c2ecf20Sopenharmony_ci pinctrl-0 = <&uart_pins>; 1408c2ecf20Sopenharmony_ci pinctrl-names = "default"; 1418c2ecf20Sopenharmony_ci compatible = "ns16550a"; 1428c2ecf20Sopenharmony_ci reg = <0x6 0x00100000 0x20>; 1438c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 1448c2ecf20Sopenharmony_ci reg-io-width = <4>; 1458c2ecf20Sopenharmony_ci reg-shift = <2>; 1468c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 1478c2ecf20Sopenharmony_ci 1488c2ecf20Sopenharmony_ci status = "disabled"; 1498c2ecf20Sopenharmony_ci }; 1508c2ecf20Sopenharmony_ci 1518c2ecf20Sopenharmony_ci uart1: serial@600102000 { 1528c2ecf20Sopenharmony_ci pinctrl-0 = <&uart2_pins>; 1538c2ecf20Sopenharmony_ci pinctrl-names = "default"; 1548c2ecf20Sopenharmony_ci compatible = "ns16550a"; 1558c2ecf20Sopenharmony_ci reg = <0x6 0x00102000 0x20>; 1568c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 1578c2ecf20Sopenharmony_ci reg-io-width = <4>; 1588c2ecf20Sopenharmony_ci reg-shift = <2>; 1598c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 1608c2ecf20Sopenharmony_ci 1618c2ecf20Sopenharmony_ci status = "disabled"; 1628c2ecf20Sopenharmony_ci }; 1638c2ecf20Sopenharmony_ci 1648c2ecf20Sopenharmony_ci spi0: spi@600104000 { 1658c2ecf20Sopenharmony_ci #address-cells = <1>; 1668c2ecf20Sopenharmony_ci #size-cells = <0>; 1678c2ecf20Sopenharmony_ci compatible = "microchip,sparx5-spi"; 1688c2ecf20Sopenharmony_ci reg = <0x6 0x00104000 0x40>; 1698c2ecf20Sopenharmony_ci num-cs = <16>; 1708c2ecf20Sopenharmony_ci reg-io-width = <4>; 1718c2ecf20Sopenharmony_ci reg-shift = <2>; 1728c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 1738c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1748c2ecf20Sopenharmony_ci status = "disabled"; 1758c2ecf20Sopenharmony_ci }; 1768c2ecf20Sopenharmony_ci 1778c2ecf20Sopenharmony_ci timer1: timer@600105000 { 1788c2ecf20Sopenharmony_ci compatible = "snps,dw-apb-timer"; 1798c2ecf20Sopenharmony_ci reg = <0x6 0x00105000 0x1000>; 1808c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 1818c2ecf20Sopenharmony_ci clock-names = "timer"; 1828c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 1838c2ecf20Sopenharmony_ci }; 1848c2ecf20Sopenharmony_ci 1858c2ecf20Sopenharmony_ci sdhci0: mmc@600800000 { 1868c2ecf20Sopenharmony_ci compatible = "microchip,dw-sparx5-sdhci"; 1878c2ecf20Sopenharmony_ci status = "disabled"; 1888c2ecf20Sopenharmony_ci reg = <0x6 0x00800000 0x1000>; 1898c2ecf20Sopenharmony_ci pinctrl-0 = <&emmc_pins>; 1908c2ecf20Sopenharmony_ci pinctrl-names = "default"; 1918c2ecf20Sopenharmony_ci clocks = <&clks CLK_ID_AUX1>; 1928c2ecf20Sopenharmony_ci clock-names = "core"; 1938c2ecf20Sopenharmony_ci assigned-clocks = <&clks CLK_ID_AUX1>; 1948c2ecf20Sopenharmony_ci assigned-clock-rates = <800000000>; 1958c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 1968c2ecf20Sopenharmony_ci bus-width = <8>; 1978c2ecf20Sopenharmony_ci }; 1988c2ecf20Sopenharmony_ci 1998c2ecf20Sopenharmony_ci gpio: pinctrl@6110101e0 { 2008c2ecf20Sopenharmony_ci compatible = "microchip,sparx5-pinctrl"; 2018c2ecf20Sopenharmony_ci reg = <0x6 0x110101e0 0x90>, <0x6 0x10508010 0x100>; 2028c2ecf20Sopenharmony_ci gpio-controller; 2038c2ecf20Sopenharmony_ci #gpio-cells = <2>; 2048c2ecf20Sopenharmony_ci gpio-ranges = <&gpio 0 0 64>; 2058c2ecf20Sopenharmony_ci interrupt-controller; 2068c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 2078c2ecf20Sopenharmony_ci #interrupt-cells = <2>; 2088c2ecf20Sopenharmony_ci 2098c2ecf20Sopenharmony_ci cs1_pins: cs1-pins { 2108c2ecf20Sopenharmony_ci pins = "GPIO_16"; 2118c2ecf20Sopenharmony_ci function = "si"; 2128c2ecf20Sopenharmony_ci }; 2138c2ecf20Sopenharmony_ci 2148c2ecf20Sopenharmony_ci cs2_pins: cs2-pins { 2158c2ecf20Sopenharmony_ci pins = "GPIO_17"; 2168c2ecf20Sopenharmony_ci function = "si"; 2178c2ecf20Sopenharmony_ci }; 2188c2ecf20Sopenharmony_ci 2198c2ecf20Sopenharmony_ci cs3_pins: cs3-pins { 2208c2ecf20Sopenharmony_ci pins = "GPIO_18"; 2218c2ecf20Sopenharmony_ci function = "si"; 2228c2ecf20Sopenharmony_ci }; 2238c2ecf20Sopenharmony_ci 2248c2ecf20Sopenharmony_ci si2_pins: si2-pins { 2258c2ecf20Sopenharmony_ci pins = "GPIO_39", "GPIO_40", "GPIO_41"; 2268c2ecf20Sopenharmony_ci function = "si2"; 2278c2ecf20Sopenharmony_ci }; 2288c2ecf20Sopenharmony_ci 2298c2ecf20Sopenharmony_ci uart_pins: uart-pins { 2308c2ecf20Sopenharmony_ci pins = "GPIO_10", "GPIO_11"; 2318c2ecf20Sopenharmony_ci function = "uart"; 2328c2ecf20Sopenharmony_ci }; 2338c2ecf20Sopenharmony_ci 2348c2ecf20Sopenharmony_ci uart2_pins: uart2-pins { 2358c2ecf20Sopenharmony_ci pins = "GPIO_26", "GPIO_27"; 2368c2ecf20Sopenharmony_ci function = "uart2"; 2378c2ecf20Sopenharmony_ci }; 2388c2ecf20Sopenharmony_ci 2398c2ecf20Sopenharmony_ci i2c_pins: i2c-pins { 2408c2ecf20Sopenharmony_ci pins = "GPIO_14", "GPIO_15"; 2418c2ecf20Sopenharmony_ci function = "twi"; 2428c2ecf20Sopenharmony_ci }; 2438c2ecf20Sopenharmony_ci 2448c2ecf20Sopenharmony_ci i2c2_pins: i2c2-pins { 2458c2ecf20Sopenharmony_ci pins = "GPIO_28", "GPIO_29"; 2468c2ecf20Sopenharmony_ci function = "twi2"; 2478c2ecf20Sopenharmony_ci }; 2488c2ecf20Sopenharmony_ci 2498c2ecf20Sopenharmony_ci emmc_pins: emmc-pins { 2508c2ecf20Sopenharmony_ci pins = "GPIO_34", "GPIO_35", "GPIO_36", 2518c2ecf20Sopenharmony_ci "GPIO_37", "GPIO_38", "GPIO_39", 2528c2ecf20Sopenharmony_ci "GPIO_40", "GPIO_41", "GPIO_42", 2538c2ecf20Sopenharmony_ci "GPIO_43", "GPIO_44", "GPIO_45", 2548c2ecf20Sopenharmony_ci "GPIO_46", "GPIO_47"; 2558c2ecf20Sopenharmony_ci function = "emmc"; 2568c2ecf20Sopenharmony_ci }; 2578c2ecf20Sopenharmony_ci }; 2588c2ecf20Sopenharmony_ci 2598c2ecf20Sopenharmony_ci i2c0: i2c@600101000 { 2608c2ecf20Sopenharmony_ci compatible = "snps,designware-i2c"; 2618c2ecf20Sopenharmony_ci status = "disabled"; 2628c2ecf20Sopenharmony_ci pinctrl-0 = <&i2c_pins>; 2638c2ecf20Sopenharmony_ci pinctrl-names = "default"; 2648c2ecf20Sopenharmony_ci reg = <0x6 0x00101000 0x100>; 2658c2ecf20Sopenharmony_ci #address-cells = <1>; 2668c2ecf20Sopenharmony_ci #size-cells = <0>; 2678c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 2688c2ecf20Sopenharmony_ci i2c-sda-hold-time-ns = <300>; 2698c2ecf20Sopenharmony_ci clock-frequency = <100000>; 2708c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 2718c2ecf20Sopenharmony_ci }; 2728c2ecf20Sopenharmony_ci 2738c2ecf20Sopenharmony_ci i2c1: i2c@600103000 { 2748c2ecf20Sopenharmony_ci compatible = "snps,designware-i2c"; 2758c2ecf20Sopenharmony_ci status = "disabled"; 2768c2ecf20Sopenharmony_ci pinctrl-0 = <&i2c2_pins>; 2778c2ecf20Sopenharmony_ci pinctrl-names = "default"; 2788c2ecf20Sopenharmony_ci reg = <0x6 0x00103000 0x100>; 2798c2ecf20Sopenharmony_ci #address-cells = <1>; 2808c2ecf20Sopenharmony_ci #size-cells = <0>; 2818c2ecf20Sopenharmony_ci interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 2828c2ecf20Sopenharmony_ci i2c-sda-hold-time-ns = <300>; 2838c2ecf20Sopenharmony_ci clock-frequency = <100000>; 2848c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 2858c2ecf20Sopenharmony_ci }; 2868c2ecf20Sopenharmony_ci 2878c2ecf20Sopenharmony_ci tmon0: tmon@610508110 { 2888c2ecf20Sopenharmony_ci compatible = "microchip,sparx5-temp"; 2898c2ecf20Sopenharmony_ci reg = <0x6 0x10508110 0xc>; 2908c2ecf20Sopenharmony_ci #thermal-sensor-cells = <0>; 2918c2ecf20Sopenharmony_ci clocks = <&ahb_clk>; 2928c2ecf20Sopenharmony_ci }; 2938c2ecf20Sopenharmony_ci }; 2948c2ecf20Sopenharmony_ci}; 295