18c2ecf20Sopenharmony_ci// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * Device Tree file for Globalscale Marvell ESPRESSOBin Board 48c2ecf20Sopenharmony_ci * Copyright (C) 2016 Marvell 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * Romain Perier <romain.perier@free-electrons.com> 78c2ecf20Sopenharmony_ci * 88c2ecf20Sopenharmony_ci */ 98c2ecf20Sopenharmony_ci 108c2ecf20Sopenharmony_ci#include <dt-bindings/gpio/gpio.h> 118c2ecf20Sopenharmony_ci#include "armada-372x.dtsi" 128c2ecf20Sopenharmony_ci 138c2ecf20Sopenharmony_ci/ { 148c2ecf20Sopenharmony_ci aliases { 158c2ecf20Sopenharmony_ci ethernet0 = ð0; 168c2ecf20Sopenharmony_ci /* for dsa slave device */ 178c2ecf20Sopenharmony_ci ethernet1 = &switch0port1; 188c2ecf20Sopenharmony_ci ethernet2 = &switch0port2; 198c2ecf20Sopenharmony_ci ethernet3 = &switch0port3; 208c2ecf20Sopenharmony_ci serial0 = &uart0; 218c2ecf20Sopenharmony_ci serial1 = &uart1; 228c2ecf20Sopenharmony_ci }; 238c2ecf20Sopenharmony_ci 248c2ecf20Sopenharmony_ci chosen { 258c2ecf20Sopenharmony_ci stdout-path = "serial0:115200n8"; 268c2ecf20Sopenharmony_ci }; 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_ci memory@0 { 298c2ecf20Sopenharmony_ci device_type = "memory"; 308c2ecf20Sopenharmony_ci reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 318c2ecf20Sopenharmony_ci }; 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci vcc_sd_reg1: regulator { 348c2ecf20Sopenharmony_ci compatible = "regulator-gpio"; 358c2ecf20Sopenharmony_ci regulator-name = "vcc_sd1"; 368c2ecf20Sopenharmony_ci regulator-min-microvolt = <1800000>; 378c2ecf20Sopenharmony_ci regulator-max-microvolt = <3300000>; 388c2ecf20Sopenharmony_ci regulator-boot-on; 398c2ecf20Sopenharmony_ci 408c2ecf20Sopenharmony_ci gpios = <&gpionb 4 GPIO_ACTIVE_HIGH>; 418c2ecf20Sopenharmony_ci gpios-states = <0>; 428c2ecf20Sopenharmony_ci states = <1800000 0x1 438c2ecf20Sopenharmony_ci 3300000 0x0>; 448c2ecf20Sopenharmony_ci enable-active-high; 458c2ecf20Sopenharmony_ci }; 468c2ecf20Sopenharmony_ci}; 478c2ecf20Sopenharmony_ci 488c2ecf20Sopenharmony_ci/* J9 */ 498c2ecf20Sopenharmony_ci&pcie0 { 508c2ecf20Sopenharmony_ci status = "okay"; 518c2ecf20Sopenharmony_ci pinctrl-names = "default"; 528c2ecf20Sopenharmony_ci pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; 538c2ecf20Sopenharmony_ci reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; 548c2ecf20Sopenharmony_ci}; 558c2ecf20Sopenharmony_ci 568c2ecf20Sopenharmony_ci/* J6 */ 578c2ecf20Sopenharmony_ci&sata { 588c2ecf20Sopenharmony_ci status = "okay"; 598c2ecf20Sopenharmony_ci phys = <&comphy2 0>; 608c2ecf20Sopenharmony_ci phy-names = "sata-phy"; 618c2ecf20Sopenharmony_ci}; 628c2ecf20Sopenharmony_ci 638c2ecf20Sopenharmony_ci/* J1 */ 648c2ecf20Sopenharmony_ci&sdhci1 { 658c2ecf20Sopenharmony_ci wp-inverted; 668c2ecf20Sopenharmony_ci bus-width = <4>; 678c2ecf20Sopenharmony_ci cd-gpios = <&gpionb 3 GPIO_ACTIVE_LOW>; 688c2ecf20Sopenharmony_ci marvell,pad-type = "sd"; 698c2ecf20Sopenharmony_ci vqmmc-supply = <&vcc_sd_reg1>; 708c2ecf20Sopenharmony_ci 718c2ecf20Sopenharmony_ci pinctrl-names = "default"; 728c2ecf20Sopenharmony_ci pinctrl-0 = <&sdio_pins>; 738c2ecf20Sopenharmony_ci status = "okay"; 748c2ecf20Sopenharmony_ci}; 758c2ecf20Sopenharmony_ci 768c2ecf20Sopenharmony_ci&spi0 { 778c2ecf20Sopenharmony_ci status = "okay"; 788c2ecf20Sopenharmony_ci 798c2ecf20Sopenharmony_ci flash@0 { 808c2ecf20Sopenharmony_ci reg = <0>; 818c2ecf20Sopenharmony_ci compatible = "jedec,spi-nor"; 828c2ecf20Sopenharmony_ci spi-max-frequency = <104000000>; 838c2ecf20Sopenharmony_ci m25p,fast-read; 848c2ecf20Sopenharmony_ci }; 858c2ecf20Sopenharmony_ci}; 868c2ecf20Sopenharmony_ci 878c2ecf20Sopenharmony_ci/* Exported on the micro USB connector J5 through an FTDI */ 888c2ecf20Sopenharmony_ci&uart0 { 898c2ecf20Sopenharmony_ci pinctrl-names = "default"; 908c2ecf20Sopenharmony_ci pinctrl-0 = <&uart1_pins>; 918c2ecf20Sopenharmony_ci status = "okay"; 928c2ecf20Sopenharmony_ci}; 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_ci/* 958c2ecf20Sopenharmony_ci * Connector J17 and J18 expose a number of different features. Some pins are 968c2ecf20Sopenharmony_ci * multiplexed. This is the case for instance for the following features: 978c2ecf20Sopenharmony_ci * - UART1 (pin 24 = RX, pin 26 = TX). See armada-3720-db.dts for an example of 988c2ecf20Sopenharmony_ci * how to enable it. Beware that the signals are 1.8V TTL. 998c2ecf20Sopenharmony_ci * - I2C 1008c2ecf20Sopenharmony_ci * - SPI 1018c2ecf20Sopenharmony_ci * - MMC 1028c2ecf20Sopenharmony_ci */ 1038c2ecf20Sopenharmony_ci 1048c2ecf20Sopenharmony_ci/* J7 */ 1058c2ecf20Sopenharmony_ci&usb3 { 1068c2ecf20Sopenharmony_ci status = "okay"; 1078c2ecf20Sopenharmony_ci}; 1088c2ecf20Sopenharmony_ci 1098c2ecf20Sopenharmony_ci/* J8 */ 1108c2ecf20Sopenharmony_ci&usb2 { 1118c2ecf20Sopenharmony_ci status = "okay"; 1128c2ecf20Sopenharmony_ci}; 1138c2ecf20Sopenharmony_ci 1148c2ecf20Sopenharmony_ci&mdio { 1158c2ecf20Sopenharmony_ci switch0: switch0@1 { 1168c2ecf20Sopenharmony_ci compatible = "marvell,mv88e6085"; 1178c2ecf20Sopenharmony_ci #address-cells = <1>; 1188c2ecf20Sopenharmony_ci #size-cells = <0>; 1198c2ecf20Sopenharmony_ci reg = <1>; 1208c2ecf20Sopenharmony_ci 1218c2ecf20Sopenharmony_ci dsa,member = <0 0>; 1228c2ecf20Sopenharmony_ci 1238c2ecf20Sopenharmony_ci ports { 1248c2ecf20Sopenharmony_ci #address-cells = <1>; 1258c2ecf20Sopenharmony_ci #size-cells = <0>; 1268c2ecf20Sopenharmony_ci 1278c2ecf20Sopenharmony_ci switch0port0: port@0 { 1288c2ecf20Sopenharmony_ci reg = <0>; 1298c2ecf20Sopenharmony_ci label = "cpu"; 1308c2ecf20Sopenharmony_ci ethernet = <ð0>; 1318c2ecf20Sopenharmony_ci phy-mode = "rgmii-id"; 1328c2ecf20Sopenharmony_ci fixed-link { 1338c2ecf20Sopenharmony_ci speed = <1000>; 1348c2ecf20Sopenharmony_ci full-duplex; 1358c2ecf20Sopenharmony_ci }; 1368c2ecf20Sopenharmony_ci }; 1378c2ecf20Sopenharmony_ci 1388c2ecf20Sopenharmony_ci switch0port1: port@1 { 1398c2ecf20Sopenharmony_ci reg = <1>; 1408c2ecf20Sopenharmony_ci label = "wan"; 1418c2ecf20Sopenharmony_ci phy-handle = <&switch0phy0>; 1428c2ecf20Sopenharmony_ci }; 1438c2ecf20Sopenharmony_ci 1448c2ecf20Sopenharmony_ci switch0port2: port@2 { 1458c2ecf20Sopenharmony_ci reg = <2>; 1468c2ecf20Sopenharmony_ci label = "lan0"; 1478c2ecf20Sopenharmony_ci phy-handle = <&switch0phy1>; 1488c2ecf20Sopenharmony_ci }; 1498c2ecf20Sopenharmony_ci 1508c2ecf20Sopenharmony_ci switch0port3: port@3 { 1518c2ecf20Sopenharmony_ci reg = <3>; 1528c2ecf20Sopenharmony_ci label = "lan1"; 1538c2ecf20Sopenharmony_ci phy-handle = <&switch0phy2>; 1548c2ecf20Sopenharmony_ci }; 1558c2ecf20Sopenharmony_ci 1568c2ecf20Sopenharmony_ci }; 1578c2ecf20Sopenharmony_ci 1588c2ecf20Sopenharmony_ci mdio { 1598c2ecf20Sopenharmony_ci #address-cells = <1>; 1608c2ecf20Sopenharmony_ci #size-cells = <0>; 1618c2ecf20Sopenharmony_ci 1628c2ecf20Sopenharmony_ci switch0phy0: switch0phy0@11 { 1638c2ecf20Sopenharmony_ci reg = <0x11>; 1648c2ecf20Sopenharmony_ci }; 1658c2ecf20Sopenharmony_ci switch0phy1: switch0phy1@12 { 1668c2ecf20Sopenharmony_ci reg = <0x12>; 1678c2ecf20Sopenharmony_ci }; 1688c2ecf20Sopenharmony_ci switch0phy2: switch0phy2@13 { 1698c2ecf20Sopenharmony_ci reg = <0x13>; 1708c2ecf20Sopenharmony_ci }; 1718c2ecf20Sopenharmony_ci }; 1728c2ecf20Sopenharmony_ci }; 1738c2ecf20Sopenharmony_ci}; 1748c2ecf20Sopenharmony_ci 1758c2ecf20Sopenharmony_cið0 { 1768c2ecf20Sopenharmony_ci pinctrl-names = "default"; 1778c2ecf20Sopenharmony_ci pinctrl-0 = <&rgmii_pins>, <&smi_pins>; 1788c2ecf20Sopenharmony_ci phy-mode = "rgmii-id"; 1798c2ecf20Sopenharmony_ci status = "okay"; 1808c2ecf20Sopenharmony_ci 1818c2ecf20Sopenharmony_ci fixed-link { 1828c2ecf20Sopenharmony_ci speed = <1000>; 1838c2ecf20Sopenharmony_ci full-duplex; 1848c2ecf20Sopenharmony_ci }; 1858c2ecf20Sopenharmony_ci}; 186