18c2ecf20Sopenharmony_ci/*
28c2ecf20Sopenharmony_ci * ARM Ltd.
38c2ecf20Sopenharmony_ci *
48c2ecf20Sopenharmony_ci * ARMv8 Foundation model DTS (GICv3 configuration)
58c2ecf20Sopenharmony_ci */
68c2ecf20Sopenharmony_ci
78c2ecf20Sopenharmony_ci/ {
88c2ecf20Sopenharmony_ci	gic: interrupt-controller@2f000000 {
98c2ecf20Sopenharmony_ci		compatible = "arm,gic-v3";
108c2ecf20Sopenharmony_ci		#interrupt-cells = <3>;
118c2ecf20Sopenharmony_ci		#address-cells = <1>;
128c2ecf20Sopenharmony_ci		#size-cells = <1>;
138c2ecf20Sopenharmony_ci		ranges = <0x0 0x0 0x2f000000 0x100000>;
148c2ecf20Sopenharmony_ci		interrupt-controller;
158c2ecf20Sopenharmony_ci		reg =	<0x0 0x2f000000 0x0 0x10000>,
168c2ecf20Sopenharmony_ci			<0x0 0x2f100000 0x0 0x200000>,
178c2ecf20Sopenharmony_ci			<0x0 0x2c000000 0x0 0x2000>,
188c2ecf20Sopenharmony_ci			<0x0 0x2c010000 0x0 0x2000>,
198c2ecf20Sopenharmony_ci			<0x0 0x2c02f000 0x0 0x2000>;
208c2ecf20Sopenharmony_ci		interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
218c2ecf20Sopenharmony_ci
228c2ecf20Sopenharmony_ci		its: msi-controller@2f020000 {
238c2ecf20Sopenharmony_ci			compatible = "arm,gic-v3-its";
248c2ecf20Sopenharmony_ci			msi-controller;
258c2ecf20Sopenharmony_ci			#msi-cells = <1>;
268c2ecf20Sopenharmony_ci			reg = <0x20000 0x20000>;
278c2ecf20Sopenharmony_ci		};
288c2ecf20Sopenharmony_ci	};
298c2ecf20Sopenharmony_ci};
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