1/* SPDX-License-Identifier: GPL-2.0 */
2/*
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 *      Ben Dooks <ben@simtec.co.uk>
6 *      http://armlinux.simtec.co.uk/
7 *
8 * S3C64XX - PM core support for arch/arm/plat-s3c/pm.c
9 */
10
11#ifndef __MACH_S3C64XX_PM_CORE_H
12#define __MACH_S3C64XX_PM_CORE_H __FILE__
13
14#include <linux/serial_s3c.h>
15#include <linux/delay.h>
16
17#include "regs-gpio.h"
18#include "regs-clock.h"
19#include "map.h"
20
21static inline void s3c_pm_debug_init_uart(void)
22{
23#ifdef CONFIG_SAMSUNG_PM_DEBUG
24	u32 tmp = __raw_readl(S3C_PCLK_GATE);
25
26	/* As a note, since the S3C64XX UARTs generally have multiple
27	 * clock sources, we simply enable PCLK at the moment and hope
28	 * that the resume settings for the UART are suitable for the
29	 * use with PCLK.
30	 */
31
32	tmp |= S3C_CLKCON_PCLK_UART0;
33	tmp |= S3C_CLKCON_PCLK_UART1;
34	tmp |= S3C_CLKCON_PCLK_UART2;
35	tmp |= S3C_CLKCON_PCLK_UART3;
36
37	__raw_writel(tmp, S3C_PCLK_GATE);
38	udelay(10);
39#endif
40}
41
42static inline void s3c_pm_arch_prepare_irqs(void)
43{
44	/* VIC should have already been taken care of */
45
46	/* clear any pending EINT0 interrupts */
47	__raw_writel(__raw_readl(S3C64XX_EINT0PEND), S3C64XX_EINT0PEND);
48}
49
50static inline void s3c_pm_arch_stop_clocks(void)
51{
52}
53
54static inline void s3c_pm_arch_show_resume_irqs(void)
55{
56}
57
58/* make these defines, we currently do not have any need to change
59 * the IRQ wake controls depending on the CPU we are running on */
60#ifdef CONFIG_PM_SLEEP
61#define s3c_irqwake_eintallow	((1 << 28) - 1)
62#define s3c_irqwake_intallow	(~0)
63#else
64#define s3c_irqwake_eintallow 0
65#define s3c_irqwake_intallow  0
66#endif
67
68static inline void s3c_pm_restored_gpios(void)
69{
70	/* ensure sleep mode has been cleared from the system */
71
72	__raw_writel(0, S3C64XX_SLPEN);
73}
74
75static inline void samsung_pm_saved_gpios(void)
76{
77	/* turn on the sleep mode and keep it there, as it seems that during
78	 * suspend the xCON registers get re-set and thus you can end up with
79	 * problems between going to sleep and resuming.
80	 */
81
82	__raw_writel(S3C64XX_SLPEN_USE_xSLP, S3C64XX_SLPEN);
83}
84#endif /* __MACH_S3C64XX_PM_CORE_H */
85