1// SPDX-License-Identifier: GPL-2.0+
2//
3// Copyright (c) 2006-2007 Simtec Electronics
4//	http://armlinux.simtec.co.uk/
5//	Ben Dooks <ben@simtec.co.uk>
6//	Vincent Sanders <vince@arm.linux.org.uk>
7//
8// S3C2410 CPU PLL tables
9
10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/device.h>
14#include <linux/list.h>
15#include <linux/clk.h>
16#include <linux/err.h>
17
18#include <linux/soc/samsung/s3c-cpufreq-core.h>
19#include <linux/soc/samsung/s3c-pm.h>
20
21/* This array should be sorted in ascending order of the frequencies */
22static struct cpufreq_frequency_table pll_vals_12MHz[] = {
23    { .frequency = 34000000,  .driver_data = PLLVAL(82, 2, 3),   },
24    { .frequency = 45000000,  .driver_data = PLLVAL(82, 1, 3),   },
25    { .frequency = 48000000,  .driver_data = PLLVAL(120, 2, 3),  },
26    { .frequency = 51000000,  .driver_data = PLLVAL(161, 3, 3),  },
27    { .frequency = 56000000,  .driver_data = PLLVAL(142, 2, 3),  },
28    { .frequency = 68000000,  .driver_data = PLLVAL(82, 2, 2),   },
29    { .frequency = 79000000,  .driver_data = PLLVAL(71, 1, 2),   },
30    { .frequency = 85000000,  .driver_data = PLLVAL(105, 2, 2),  },
31    { .frequency = 90000000,  .driver_data = PLLVAL(112, 2, 2),  },
32    { .frequency = 101000000, .driver_data = PLLVAL(127, 2, 2),  },
33    { .frequency = 113000000, .driver_data = PLLVAL(105, 1, 2),  },
34    { .frequency = 118000000, .driver_data = PLLVAL(150, 2, 2),  },
35    { .frequency = 124000000, .driver_data = PLLVAL(116, 1, 2),  },
36    { .frequency = 135000000, .driver_data = PLLVAL(82, 2, 1),   },
37    { .frequency = 147000000, .driver_data = PLLVAL(90, 2, 1),   },
38    { .frequency = 152000000, .driver_data = PLLVAL(68, 1, 1),   },
39    { .frequency = 158000000, .driver_data = PLLVAL(71, 1, 1),   },
40    { .frequency = 170000000, .driver_data = PLLVAL(77, 1, 1),   },
41    { .frequency = 180000000, .driver_data = PLLVAL(82, 1, 1),   },
42    { .frequency = 186000000, .driver_data = PLLVAL(85, 1, 1),   },
43    { .frequency = 192000000, .driver_data = PLLVAL(88, 1, 1),   },
44    { .frequency = 203000000, .driver_data = PLLVAL(161, 3, 1),  },
45
46    /* 2410A extras */
47
48    { .frequency = 210000000, .driver_data = PLLVAL(132, 2, 1),  },
49    { .frequency = 226000000, .driver_data = PLLVAL(105, 1, 1),  },
50    { .frequency = 266000000, .driver_data = PLLVAL(125, 1, 1),  },
51    { .frequency = 268000000, .driver_data = PLLVAL(126, 1, 1),  },
52    { .frequency = 270000000, .driver_data = PLLVAL(127, 1, 1),  },
53};
54
55static int s3c2410_plls_add(struct device *dev, struct subsys_interface *sif)
56{
57	return s3c_plltab_register(pll_vals_12MHz, ARRAY_SIZE(pll_vals_12MHz));
58}
59
60static struct subsys_interface s3c2410_plls_interface = {
61	.name		= "s3c2410_plls",
62	.subsys		= &s3c2410_subsys,
63	.add_dev	= s3c2410_plls_add,
64};
65
66static int __init s3c2410_pll_init(void)
67{
68	return subsys_interface_register(&s3c2410_plls_interface);
69
70}
71arch_initcall(s3c2410_pll_init);
72
73static struct subsys_interface s3c2410a_plls_interface = {
74	.name		= "s3c2410a_plls",
75	.subsys		= &s3c2410a_subsys,
76	.add_dev	= s3c2410_plls_add,
77};
78
79static int __init s3c2410a_pll_init(void)
80{
81	return subsys_interface_register(&s3c2410a_plls_interface);
82}
83arch_initcall(s3c2410a_pll_init);
84