18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */
28c2ecf20Sopenharmony_ci/*
38c2ecf20Sopenharmony_ci *  arch/arm/mach-rpc/include/mach/hardware.h
48c2ecf20Sopenharmony_ci *
58c2ecf20Sopenharmony_ci *  Copyright (C) 1996-1999 Russell King.
68c2ecf20Sopenharmony_ci *
78c2ecf20Sopenharmony_ci *  This file contains the hardware definitions of the RiscPC series machines.
88c2ecf20Sopenharmony_ci */
98c2ecf20Sopenharmony_ci#ifndef __ASM_ARCH_HARDWARE_H
108c2ecf20Sopenharmony_ci#define __ASM_ARCH_HARDWARE_H
118c2ecf20Sopenharmony_ci
128c2ecf20Sopenharmony_ci#include <mach/memory.h>
138c2ecf20Sopenharmony_ci
148c2ecf20Sopenharmony_ci/*
158c2ecf20Sopenharmony_ci * What hardware must be present
168c2ecf20Sopenharmony_ci */
178c2ecf20Sopenharmony_ci#define HAS_IOMD
188c2ecf20Sopenharmony_ci#define HAS_VIDC20
198c2ecf20Sopenharmony_ci
208c2ecf20Sopenharmony_ci/* Hardware addresses of major areas.
218c2ecf20Sopenharmony_ci *  *_START is the physical address
228c2ecf20Sopenharmony_ci *  *_SIZE  is the size of the region
238c2ecf20Sopenharmony_ci *  *_BASE  is the virtual address
248c2ecf20Sopenharmony_ci */
258c2ecf20Sopenharmony_ci#define RPC_RAM_SIZE		0x10000000
268c2ecf20Sopenharmony_ci#define RPC_RAM_START		0x10000000
278c2ecf20Sopenharmony_ci
288c2ecf20Sopenharmony_ci#define EASI_SIZE		0x08000000	/* EASI I/O */
298c2ecf20Sopenharmony_ci#define EASI_START		0x08000000
308c2ecf20Sopenharmony_ci#define EASI_BASE		IOMEM(0xe5000000)
318c2ecf20Sopenharmony_ci
328c2ecf20Sopenharmony_ci#define IO_START		0x03000000	/* I/O */
338c2ecf20Sopenharmony_ci#define IO_SIZE			0x01000000
348c2ecf20Sopenharmony_ci#define IO_BASE			IOMEM(0xe0000000)
358c2ecf20Sopenharmony_ci
368c2ecf20Sopenharmony_ci#define SCREEN_START		0x02000000	/* VRAM */
378c2ecf20Sopenharmony_ci#define SCREEN_END		0xdfc00000
388c2ecf20Sopenharmony_ci#define SCREEN_BASE		0xdf800000
398c2ecf20Sopenharmony_ci
408c2ecf20Sopenharmony_ci#define UNCACHEABLE_ADDR	(FLUSH_BASE + 0x10000)
418c2ecf20Sopenharmony_ci
428c2ecf20Sopenharmony_ci/*
438c2ecf20Sopenharmony_ci * IO Addresses
448c2ecf20Sopenharmony_ci */
458c2ecf20Sopenharmony_ci#define ECARD_EASI_BASE		(EASI_BASE)
468c2ecf20Sopenharmony_ci#define VIDC_BASE		(IO_BASE + 0x00400000)
478c2ecf20Sopenharmony_ci#define EXPMASK_BASE		(IO_BASE + 0x00360000)
488c2ecf20Sopenharmony_ci#define ECARD_IOC4_BASE		(IO_BASE + 0x00270000)
498c2ecf20Sopenharmony_ci#define ECARD_IOC_BASE		(IO_BASE + 0x00240000)
508c2ecf20Sopenharmony_ci#define IOMD_BASE		(IO_BASE + 0x00200000)
518c2ecf20Sopenharmony_ci#define IOC_BASE		(IO_BASE + 0x00200000)
528c2ecf20Sopenharmony_ci#define ECARD_MEMC8_BASE	(IO_BASE + 0x0002b000)
538c2ecf20Sopenharmony_ci#define FLOPPYDMA_BASE		(IO_BASE + 0x0002a000)
548c2ecf20Sopenharmony_ci#define PCIO_BASE		(IO_BASE + 0x00010000)
558c2ecf20Sopenharmony_ci#define ECARD_MEMC_BASE		(IO_BASE + 0x00000000)
568c2ecf20Sopenharmony_ci
578c2ecf20Sopenharmony_ci#define vidc_writel(val)	__raw_writel(val, VIDC_BASE)
588c2ecf20Sopenharmony_ci
598c2ecf20Sopenharmony_ci#define NETSLOT_BASE		0x0302b000
608c2ecf20Sopenharmony_ci#define NETSLOT_SIZE		0x00001000
618c2ecf20Sopenharmony_ci
628c2ecf20Sopenharmony_ci#define PODSLOT_IOC0_BASE	0x03240000
638c2ecf20Sopenharmony_ci#define PODSLOT_IOC4_BASE	0x03270000
648c2ecf20Sopenharmony_ci#define PODSLOT_IOC_SIZE	(1 << 14)
658c2ecf20Sopenharmony_ci#define PODSLOT_MEMC_BASE	0x03000000
668c2ecf20Sopenharmony_ci#define PODSLOT_MEMC_SIZE	(1 << 14)
678c2ecf20Sopenharmony_ci#define PODSLOT_EASI_BASE	0x08000000
688c2ecf20Sopenharmony_ci#define PODSLOT_EASI_SIZE	(1 << 24)
698c2ecf20Sopenharmony_ci
708c2ecf20Sopenharmony_ci#define	EXPMASK_STATUS		(EXPMASK_BASE + 0x00)
718c2ecf20Sopenharmony_ci#define EXPMASK_ENABLE		(EXPMASK_BASE + 0x04)
728c2ecf20Sopenharmony_ci
738c2ecf20Sopenharmony_ci#endif
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