1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * linux/arch/arm/mach-pxa/mainstone.c 4 * 5 * Support for the Intel HCDDBBVA0 Development Platform. 6 * (go figure how they came up with such name...) 7 * 8 * Author: Nicolas Pitre 9 * Created: Nov 05, 2002 10 * Copyright: MontaVista Software Inc. 11 */ 12#include <linux/gpio.h> 13#include <linux/gpio/gpio-reg.h> 14#include <linux/gpio/machine.h> 15#include <linux/init.h> 16#include <linux/platform_device.h> 17#include <linux/syscore_ops.h> 18#include <linux/interrupt.h> 19#include <linux/sched.h> 20#include <linux/bitops.h> 21#include <linux/fb.h> 22#include <linux/ioport.h> 23#include <linux/mtd/mtd.h> 24#include <linux/mtd/partitions.h> 25#include <linux/input.h> 26#include <linux/gpio_keys.h> 27#include <linux/pwm.h> 28#include <linux/pwm_backlight.h> 29#include <linux/smc91x.h> 30#include <linux/platform_data/i2c-pxa.h> 31#include <linux/slab.h> 32#include <linux/leds.h> 33 34#include <asm/types.h> 35#include <asm/setup.h> 36#include <asm/memory.h> 37#include <asm/mach-types.h> 38#include <mach/hardware.h> 39#include <asm/irq.h> 40#include <linux/sizes.h> 41 42#include <asm/mach/arch.h> 43#include <asm/mach/map.h> 44#include <asm/mach/irq.h> 45#include <asm/mach/flash.h> 46 47#include "pxa27x.h" 48#include <mach/mainstone.h> 49#include <mach/audio.h> 50#include <linux/platform_data/video-pxafb.h> 51#include <linux/platform_data/mmc-pxamci.h> 52#include <linux/platform_data/irda-pxaficp.h> 53#include <linux/platform_data/usb-ohci-pxa27x.h> 54#include <linux/platform_data/keypad-pxa27x.h> 55#include <mach/smemc.h> 56 57#include "generic.h" 58#include "devices.h" 59 60static unsigned long mainstone_pin_config[] = { 61 /* Chip Select */ 62 GPIO15_nCS_1, 63 64 /* LCD - 16bpp Active TFT */ 65 GPIOxx_LCD_TFT_16BPP, 66 GPIO16_PWM0_OUT, /* Backlight */ 67 68 /* MMC */ 69 GPIO32_MMC_CLK, 70 GPIO112_MMC_CMD, 71 GPIO92_MMC_DAT_0, 72 GPIO109_MMC_DAT_1, 73 GPIO110_MMC_DAT_2, 74 GPIO111_MMC_DAT_3, 75 76 /* USB Host Port 1 */ 77 GPIO88_USBH1_PWR, 78 GPIO89_USBH1_PEN, 79 80 /* PC Card */ 81 GPIO48_nPOE, 82 GPIO49_nPWE, 83 GPIO50_nPIOR, 84 GPIO51_nPIOW, 85 GPIO85_nPCE_1, 86 GPIO54_nPCE_2, 87 GPIO79_PSKTSEL, 88 GPIO55_nPREG, 89 GPIO56_nPWAIT, 90 GPIO57_nIOIS16, 91 92 /* AC97 */ 93 GPIO28_AC97_BITCLK, 94 GPIO29_AC97_SDATA_IN_0, 95 GPIO30_AC97_SDATA_OUT, 96 GPIO31_AC97_SYNC, 97 GPIO45_AC97_SYSCLK, 98 99 /* Keypad */ 100 GPIO93_KP_DKIN_0, 101 GPIO94_KP_DKIN_1, 102 GPIO95_KP_DKIN_2, 103 GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH, 104 GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH, 105 GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH, 106 GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH, 107 GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH, 108 GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH, 109 GPIO103_KP_MKOUT_0, 110 GPIO104_KP_MKOUT_1, 111 GPIO105_KP_MKOUT_2, 112 GPIO106_KP_MKOUT_3, 113 GPIO107_KP_MKOUT_4, 114 GPIO108_KP_MKOUT_5, 115 GPIO96_KP_MKOUT_6, 116 117 /* I2C */ 118 GPIO117_I2C_SCL, 119 GPIO118_I2C_SDA, 120 121 /* GPIO */ 122 GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH, 123}; 124 125static struct resource smc91x_resources[] = { 126 [0] = { 127 .start = (MST_ETH_PHYS + 0x300), 128 .end = (MST_ETH_PHYS + 0xfffff), 129 .flags = IORESOURCE_MEM, 130 }, 131 [1] = { 132 .start = MAINSTONE_IRQ(3), 133 .end = MAINSTONE_IRQ(3), 134 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE, 135 } 136}; 137 138static struct smc91x_platdata mainstone_smc91x_info = { 139 .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT | 140 SMC91X_NOWAIT | SMC91X_USE_DMA, 141 .pxa_u16_align4 = true, 142}; 143 144static struct platform_device smc91x_device = { 145 .name = "smc91x", 146 .id = 0, 147 .num_resources = ARRAY_SIZE(smc91x_resources), 148 .resource = smc91x_resources, 149 .dev = { 150 .platform_data = &mainstone_smc91x_info, 151 }, 152}; 153 154static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv) 155{ 156 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 157 MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF; 158 return 0; 159} 160 161static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv) 162{ 163 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) 164 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; 165} 166 167static long mst_audio_suspend_mask; 168 169static void mst_audio_suspend(void *priv) 170{ 171 mst_audio_suspend_mask = MST_MSCWR2; 172 MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF; 173} 174 175static void mst_audio_resume(void *priv) 176{ 177 MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF; 178} 179 180static pxa2xx_audio_ops_t mst_audio_ops = { 181 .startup = mst_audio_startup, 182 .shutdown = mst_audio_shutdown, 183 .suspend = mst_audio_suspend, 184 .resume = mst_audio_resume, 185}; 186 187static struct resource flash_resources[] = { 188 [0] = { 189 .start = PXA_CS0_PHYS, 190 .end = PXA_CS0_PHYS + SZ_64M - 1, 191 .flags = IORESOURCE_MEM, 192 }, 193 [1] = { 194 .start = PXA_CS1_PHYS, 195 .end = PXA_CS1_PHYS + SZ_64M - 1, 196 .flags = IORESOURCE_MEM, 197 }, 198}; 199 200static struct mtd_partition mainstoneflash0_partitions[] = { 201 { 202 .name = "Bootloader", 203 .size = 0x00040000, 204 .offset = 0, 205 .mask_flags = MTD_WRITEABLE /* force read-only */ 206 },{ 207 .name = "Kernel", 208 .size = 0x00400000, 209 .offset = 0x00040000, 210 },{ 211 .name = "Filesystem", 212 .size = MTDPART_SIZ_FULL, 213 .offset = 0x00440000 214 } 215}; 216 217static struct flash_platform_data mst_flash_data[2] = { 218 { 219 .map_name = "cfi_probe", 220 .parts = mainstoneflash0_partitions, 221 .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions), 222 }, { 223 .map_name = "cfi_probe", 224 .parts = NULL, 225 .nr_parts = 0, 226 } 227}; 228 229static struct platform_device mst_flash_device[2] = { 230 { 231 .name = "pxa2xx-flash", 232 .id = 0, 233 .dev = { 234 .platform_data = &mst_flash_data[0], 235 }, 236 .resource = &flash_resources[0], 237 .num_resources = 1, 238 }, 239 { 240 .name = "pxa2xx-flash", 241 .id = 1, 242 .dev = { 243 .platform_data = &mst_flash_data[1], 244 }, 245 .resource = &flash_resources[1], 246 .num_resources = 1, 247 }, 248}; 249 250#if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE) 251static struct pwm_lookup mainstone_pwm_lookup[] = { 252 PWM_LOOKUP("pxa27x-pwm.0", 0, "pwm-backlight.0", NULL, 78770, 253 PWM_POLARITY_NORMAL), 254}; 255 256static struct platform_pwm_backlight_data mainstone_backlight_data = { 257 .max_brightness = 1023, 258 .dft_brightness = 1023, 259}; 260 261static struct platform_device mainstone_backlight_device = { 262 .name = "pwm-backlight", 263 .dev = { 264 .parent = &pxa27x_device_pwm0.dev, 265 .platform_data = &mainstone_backlight_data, 266 }, 267}; 268 269static void __init mainstone_backlight_register(void) 270{ 271 int ret; 272 273 pwm_add_table(mainstone_pwm_lookup, ARRAY_SIZE(mainstone_pwm_lookup)); 274 275 ret = platform_device_register(&mainstone_backlight_device); 276 if (ret) { 277 printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret); 278 pwm_remove_table(mainstone_pwm_lookup, 279 ARRAY_SIZE(mainstone_pwm_lookup)); 280 } 281} 282#else 283#define mainstone_backlight_register() do { } while (0) 284#endif 285 286static struct pxafb_mode_info toshiba_ltm04c380k_mode = { 287 .pixclock = 50000, 288 .xres = 640, 289 .yres = 480, 290 .bpp = 16, 291 .hsync_len = 1, 292 .left_margin = 0x9f, 293 .right_margin = 1, 294 .vsync_len = 44, 295 .upper_margin = 0, 296 .lower_margin = 0, 297 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, 298}; 299 300static struct pxafb_mode_info toshiba_ltm035a776c_mode = { 301 .pixclock = 110000, 302 .xres = 240, 303 .yres = 320, 304 .bpp = 16, 305 .hsync_len = 4, 306 .left_margin = 8, 307 .right_margin = 20, 308 .vsync_len = 3, 309 .upper_margin = 1, 310 .lower_margin = 10, 311 .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT, 312}; 313 314static struct pxafb_mach_info mainstone_pxafb_info = { 315 .num_modes = 1, 316 .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL, 317}; 318 319static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data) 320{ 321 int err; 322 323 /* make sure SD/Memory Stick multiplexer's signals 324 * are routed to MMC controller 325 */ 326 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; 327 328 err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, 0, 329 "MMC card detect", data); 330 if (err) 331 printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n"); 332 333 return err; 334} 335 336static int mainstone_mci_setpower(struct device *dev, unsigned int vdd) 337{ 338 struct pxamci_platform_data* p_d = dev->platform_data; 339 340 if (( 1 << vdd) & p_d->ocr_mask) { 341 printk(KERN_DEBUG "%s: on\n", __func__); 342 MST_MSCWR1 |= MST_MSCWR1_MMC_ON; 343 MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL; 344 } else { 345 printk(KERN_DEBUG "%s: off\n", __func__); 346 MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON; 347 } 348 return 0; 349} 350 351static void mainstone_mci_exit(struct device *dev, void *data) 352{ 353 free_irq(MAINSTONE_MMC_IRQ, data); 354} 355 356static struct pxamci_platform_data mainstone_mci_platform_data = { 357 .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34, 358 .init = mainstone_mci_init, 359 .setpower = mainstone_mci_setpower, 360 .exit = mainstone_mci_exit, 361}; 362 363static void mainstone_irda_transceiver_mode(struct device *dev, int mode) 364{ 365 unsigned long flags; 366 367 local_irq_save(flags); 368 if (mode & IR_SIRMODE) { 369 MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR; 370 } else if (mode & IR_FIRMODE) { 371 MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR; 372 } 373 pxa2xx_transceiver_mode(dev, mode); 374 if (mode & IR_OFF) { 375 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF; 376 } else { 377 MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL; 378 } 379 local_irq_restore(flags); 380} 381 382static struct pxaficp_platform_data mainstone_ficp_platform_data = { 383 .gpio_pwdown = -1, 384 .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF, 385 .transceiver_mode = mainstone_irda_transceiver_mode, 386}; 387 388static struct gpio_keys_button gpio_keys_button[] = { 389 [0] = { 390 .desc = "wakeup", 391 .code = KEY_SUSPEND, 392 .type = EV_KEY, 393 .gpio = 1, 394 .wakeup = 1, 395 }, 396}; 397 398static struct gpio_keys_platform_data mainstone_gpio_keys = { 399 .buttons = gpio_keys_button, 400 .nbuttons = 1, 401}; 402 403static struct platform_device mst_gpio_keys_device = { 404 .name = "gpio-keys", 405 .id = -1, 406 .dev = { 407 .platform_data = &mainstone_gpio_keys, 408 }, 409}; 410 411static struct resource mst_cplds_resources[] = { 412 [0] = { 413 .start = MST_FPGA_PHYS + 0xc0, 414 .end = MST_FPGA_PHYS + 0xe0 - 1, 415 .flags = IORESOURCE_MEM, 416 }, 417 [1] = { 418 .start = PXA_GPIO_TO_IRQ(0), 419 .end = PXA_GPIO_TO_IRQ(0), 420 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWEDGE, 421 }, 422 [2] = { 423 .start = MAINSTONE_IRQ(0), 424 .end = MAINSTONE_IRQ(15), 425 .flags = IORESOURCE_IRQ, 426 }, 427}; 428 429static struct platform_device mst_cplds_device = { 430 .name = "pxa_cplds_irqs", 431 .id = -1, 432 .resource = &mst_cplds_resources[0], 433 .num_resources = 3, 434}; 435 436static struct platform_device *platform_devices[] __initdata = { 437 &smc91x_device, 438 &mst_flash_device[0], 439 &mst_flash_device[1], 440 &mst_gpio_keys_device, 441 &mst_cplds_device, 442}; 443 444static struct pxaohci_platform_data mainstone_ohci_platform_data = { 445 .port_mode = PMM_PERPORT_MODE, 446 .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW, 447}; 448 449#if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE) 450static const unsigned int mainstone_matrix_keys[] = { 451 KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C), 452 KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F), 453 KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I), 454 KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L), 455 KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O), 456 KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R), 457 KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U), 458 KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X), 459 KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z), 460 461 KEY(0, 4, KEY_DOT), /* . */ 462 KEY(1, 4, KEY_CLOSE), /* @ */ 463 KEY(4, 4, KEY_SLASH), 464 KEY(5, 4, KEY_BACKSLASH), 465 KEY(0, 5, KEY_HOME), 466 KEY(1, 5, KEY_LEFTSHIFT), 467 KEY(2, 5, KEY_SPACE), 468 KEY(3, 5, KEY_SPACE), 469 KEY(4, 5, KEY_ENTER), 470 KEY(5, 5, KEY_BACKSPACE), 471 472 KEY(0, 6, KEY_UP), 473 KEY(1, 6, KEY_DOWN), 474 KEY(2, 6, KEY_LEFT), 475 KEY(3, 6, KEY_RIGHT), 476 KEY(4, 6, KEY_SELECT), 477}; 478 479static struct matrix_keymap_data mainstone_matrix_keymap_data = { 480 .keymap = mainstone_matrix_keys, 481 .keymap_size = ARRAY_SIZE(mainstone_matrix_keys), 482}; 483 484struct pxa27x_keypad_platform_data mainstone_keypad_info = { 485 .matrix_key_rows = 6, 486 .matrix_key_cols = 7, 487 .matrix_keymap_data = &mainstone_matrix_keymap_data, 488 489 .enable_rotary0 = 1, 490 .rotary0_up_key = KEY_UP, 491 .rotary0_down_key = KEY_DOWN, 492 493 .debounce_interval = 30, 494}; 495 496static void __init mainstone_init_keypad(void) 497{ 498 pxa_set_keypad_info(&mainstone_keypad_info); 499} 500#else 501static inline void mainstone_init_keypad(void) {} 502#endif 503 504static int mst_pcmcia0_irqs[11] = { 505 [0 ... 10] = -1, 506 [5] = MAINSTONE_S0_CD_IRQ, 507 [8] = MAINSTONE_S0_STSCHG_IRQ, 508 [10] = MAINSTONE_S0_IRQ, 509}; 510 511static int mst_pcmcia1_irqs[11] = { 512 [0 ... 10] = -1, 513 [5] = MAINSTONE_S1_CD_IRQ, 514 [8] = MAINSTONE_S1_STSCHG_IRQ, 515 [10] = MAINSTONE_S1_IRQ, 516}; 517 518static struct gpiod_lookup_table mainstone_pcmcia_gpio_table = { 519 .dev_id = "pxa2xx-pcmcia", 520 .table = { 521 GPIO_LOOKUP("mst-pcmcia0", 0, "a0vpp", GPIO_ACTIVE_HIGH), 522 GPIO_LOOKUP("mst-pcmcia0", 1, "a1vpp", GPIO_ACTIVE_HIGH), 523 GPIO_LOOKUP("mst-pcmcia0", 2, "a0vcc", GPIO_ACTIVE_HIGH), 524 GPIO_LOOKUP("mst-pcmcia0", 3, "a1vcc", GPIO_ACTIVE_HIGH), 525 GPIO_LOOKUP("mst-pcmcia0", 4, "areset", GPIO_ACTIVE_HIGH), 526 GPIO_LOOKUP("mst-pcmcia0", 5, "adetect", GPIO_ACTIVE_LOW), 527 GPIO_LOOKUP("mst-pcmcia0", 6, "avs1", GPIO_ACTIVE_LOW), 528 GPIO_LOOKUP("mst-pcmcia0", 7, "avs2", GPIO_ACTIVE_LOW), 529 GPIO_LOOKUP("mst-pcmcia0", 8, "abvd1", GPIO_ACTIVE_HIGH), 530 GPIO_LOOKUP("mst-pcmcia0", 9, "abvd2", GPIO_ACTIVE_HIGH), 531 GPIO_LOOKUP("mst-pcmcia0", 10, "aready", GPIO_ACTIVE_HIGH), 532 GPIO_LOOKUP("mst-pcmcia1", 0, "b0vpp", GPIO_ACTIVE_HIGH), 533 GPIO_LOOKUP("mst-pcmcia1", 1, "b1vpp", GPIO_ACTIVE_HIGH), 534 GPIO_LOOKUP("mst-pcmcia1", 2, "b0vcc", GPIO_ACTIVE_HIGH), 535 GPIO_LOOKUP("mst-pcmcia1", 3, "b1vcc", GPIO_ACTIVE_HIGH), 536 GPIO_LOOKUP("mst-pcmcia1", 4, "breset", GPIO_ACTIVE_HIGH), 537 GPIO_LOOKUP("mst-pcmcia1", 5, "bdetect", GPIO_ACTIVE_LOW), 538 GPIO_LOOKUP("mst-pcmcia1", 6, "bvs1", GPIO_ACTIVE_LOW), 539 GPIO_LOOKUP("mst-pcmcia1", 7, "bvs2", GPIO_ACTIVE_LOW), 540 GPIO_LOOKUP("mst-pcmcia1", 8, "bbvd1", GPIO_ACTIVE_HIGH), 541 GPIO_LOOKUP("mst-pcmcia1", 9, "bbvd2", GPIO_ACTIVE_HIGH), 542 GPIO_LOOKUP("mst-pcmcia1", 10, "bready", GPIO_ACTIVE_HIGH), 543 { }, 544 }, 545}; 546 547static void __init mainstone_init(void) 548{ 549 int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */ 550 551 pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config)); 552 553 /* Register board control register(s) as GPIOs */ 554 gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA0, -1, 11, 555 "mst-pcmcia0", MST_PCMCIA_INPUTS, 0, NULL, 556 NULL, mst_pcmcia0_irqs); 557 gpio_reg_init(NULL, (void __iomem *)&MST_PCMCIA1, -1, 11, 558 "mst-pcmcia1", MST_PCMCIA_INPUTS, 0, NULL, 559 NULL, mst_pcmcia1_irqs); 560 gpiod_add_lookup_table(&mainstone_pcmcia_gpio_table); 561 562 pxa_set_ffuart_info(NULL); 563 pxa_set_btuart_info(NULL); 564 pxa_set_stuart_info(NULL); 565 566 mst_flash_data[0].width = (__raw_readl(BOOT_DEF) & 1) ? 2 : 4; 567 mst_flash_data[1].width = 4; 568 569 /* Compensate for SW7 which swaps the flash banks */ 570 mst_flash_data[SW7].name = "processor-flash"; 571 mst_flash_data[SW7 ^ 1].name = "mainboard-flash"; 572 573 printk(KERN_NOTICE "Mainstone configured to boot from %s\n", 574 mst_flash_data[0].name); 575 576 /* system bus arbiter setting 577 * - Core_Park 578 * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4 579 */ 580 ARB_CNTRL = ARB_CORE_PARK | 0x234; 581 582 platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); 583 584 /* reading Mainstone's "Virtual Configuration Register" 585 might be handy to select LCD type here */ 586 if (0) 587 mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode; 588 else 589 mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode; 590 591 pxa_set_fb_info(NULL, &mainstone_pxafb_info); 592 mainstone_backlight_register(); 593 594 pxa_set_mci_info(&mainstone_mci_platform_data); 595 pxa_set_ficp_info(&mainstone_ficp_platform_data); 596 pxa_set_ohci_info(&mainstone_ohci_platform_data); 597 pxa_set_i2c_info(NULL); 598 pxa_set_ac97_info(&mst_audio_ops); 599 600 mainstone_init_keypad(); 601} 602 603 604static struct map_desc mainstone_io_desc[] __initdata = { 605 { /* CPLD */ 606 .virtual = MST_FPGA_VIRT, 607 .pfn = __phys_to_pfn(MST_FPGA_PHYS), 608 .length = 0x00100000, 609 .type = MT_DEVICE 610 } 611}; 612 613static void __init mainstone_map_io(void) 614{ 615 pxa27x_map_io(); 616 iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc)); 617 618 /* for use I SRAM as framebuffer. */ 619 PSLR |= 0xF04; 620 PCFR = 0x66; 621} 622 623/* 624 * Driver for the 8 discrete LEDs available for general use: 625 * Note: bits [15-8] are used to enable/blank the 8 7 segment hex displays 626 * so be sure to not monkey with them here. 627 */ 628 629#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS) 630struct mainstone_led { 631 struct led_classdev cdev; 632 u8 mask; 633}; 634 635/* 636 * The triggers lines up below will only be used if the 637 * LED triggers are compiled in. 638 */ 639static const struct { 640 const char *name; 641 const char *trigger; 642} mainstone_leds[] = { 643 { "mainstone:D28", "default-on", }, 644 { "mainstone:D27", "cpu0", }, 645 { "mainstone:D26", "heartbeat" }, 646 { "mainstone:D25", }, 647 { "mainstone:D24", }, 648 { "mainstone:D23", }, 649 { "mainstone:D22", }, 650 { "mainstone:D21", }, 651}; 652 653static void mainstone_led_set(struct led_classdev *cdev, 654 enum led_brightness b) 655{ 656 struct mainstone_led *led = container_of(cdev, 657 struct mainstone_led, cdev); 658 u32 reg = MST_LEDCTRL; 659 660 if (b != LED_OFF) 661 reg |= led->mask; 662 else 663 reg &= ~led->mask; 664 665 MST_LEDCTRL = reg; 666} 667 668static enum led_brightness mainstone_led_get(struct led_classdev *cdev) 669{ 670 struct mainstone_led *led = container_of(cdev, 671 struct mainstone_led, cdev); 672 u32 reg = MST_LEDCTRL; 673 674 return (reg & led->mask) ? LED_FULL : LED_OFF; 675} 676 677static int __init mainstone_leds_init(void) 678{ 679 int i; 680 681 if (!machine_is_mainstone()) 682 return -ENODEV; 683 684 /* All ON */ 685 MST_LEDCTRL |= 0xff; 686 for (i = 0; i < ARRAY_SIZE(mainstone_leds); i++) { 687 struct mainstone_led *led; 688 689 led = kzalloc(sizeof(*led), GFP_KERNEL); 690 if (!led) 691 break; 692 693 led->cdev.name = mainstone_leds[i].name; 694 led->cdev.brightness_set = mainstone_led_set; 695 led->cdev.brightness_get = mainstone_led_get; 696 led->cdev.default_trigger = mainstone_leds[i].trigger; 697 led->mask = BIT(i); 698 699 if (led_classdev_register(NULL, &led->cdev) < 0) { 700 kfree(led); 701 break; 702 } 703 } 704 705 return 0; 706} 707 708/* 709 * Since we may have triggers on any subsystem, defer registration 710 * until after subsystem_init. 711 */ 712fs_initcall(mainstone_leds_init); 713#endif 714 715MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") 716 /* Maintainer: MontaVista Software Inc. */ 717 .atag_offset = 0x100, /* BLOB boot parameter setting */ 718 .map_io = mainstone_map_io, 719 .nr_irqs = MAINSTONE_NR_IRQS, 720 .init_irq = pxa27x_init_irq, 721 .handle_irq = pxa27x_handle_irq, 722 .init_time = pxa_timer_init, 723 .init_machine = mainstone_init, 724 .restart = pxa_restart, 725MACHINE_END 726