18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * Marvell Orion-1-90 AP GE Reference Design Setup 58c2ecf20Sopenharmony_ci * 68c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 78c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any 88c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied. 98c2ecf20Sopenharmony_ci */ 108c2ecf20Sopenharmony_ci#include <linux/gpio.h> 118c2ecf20Sopenharmony_ci#include <linux/kernel.h> 128c2ecf20Sopenharmony_ci#include <linux/init.h> 138c2ecf20Sopenharmony_ci#include <linux/platform_device.h> 148c2ecf20Sopenharmony_ci#include <linux/pci.h> 158c2ecf20Sopenharmony_ci#include <linux/irq.h> 168c2ecf20Sopenharmony_ci#include <linux/mtd/physmap.h> 178c2ecf20Sopenharmony_ci#include <linux/mv643xx_eth.h> 188c2ecf20Sopenharmony_ci#include <linux/spi/spi.h> 198c2ecf20Sopenharmony_ci#include <linux/spi/flash.h> 208c2ecf20Sopenharmony_ci#include <linux/ethtool.h> 218c2ecf20Sopenharmony_ci#include <linux/platform_data/dsa.h> 228c2ecf20Sopenharmony_ci#include <asm/mach-types.h> 238c2ecf20Sopenharmony_ci#include <asm/mach/arch.h> 248c2ecf20Sopenharmony_ci#include <asm/mach/pci.h> 258c2ecf20Sopenharmony_ci#include "common.h" 268c2ecf20Sopenharmony_ci#include "orion5x.h" 278c2ecf20Sopenharmony_ci 288c2ecf20Sopenharmony_cistatic struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = { 298c2ecf20Sopenharmony_ci .phy_addr = -1, 308c2ecf20Sopenharmony_ci .speed = SPEED_1000, 318c2ecf20Sopenharmony_ci .duplex = DUPLEX_FULL, 328c2ecf20Sopenharmony_ci}; 338c2ecf20Sopenharmony_ci 348c2ecf20Sopenharmony_cistatic struct dsa_chip_data rd88f6183ap_ge_switch_chip_data = { 358c2ecf20Sopenharmony_ci .port_names[0] = "lan1", 368c2ecf20Sopenharmony_ci .port_names[1] = "lan2", 378c2ecf20Sopenharmony_ci .port_names[2] = "lan3", 388c2ecf20Sopenharmony_ci .port_names[3] = "lan4", 398c2ecf20Sopenharmony_ci .port_names[4] = "wan", 408c2ecf20Sopenharmony_ci .port_names[5] = "cpu", 418c2ecf20Sopenharmony_ci}; 428c2ecf20Sopenharmony_ci 438c2ecf20Sopenharmony_cistatic struct mtd_partition rd88f6183ap_ge_partitions[] = { 448c2ecf20Sopenharmony_ci { 458c2ecf20Sopenharmony_ci .name = "kernel", 468c2ecf20Sopenharmony_ci .offset = 0x00000000, 478c2ecf20Sopenharmony_ci .size = 0x00200000, 488c2ecf20Sopenharmony_ci }, { 498c2ecf20Sopenharmony_ci .name = "rootfs", 508c2ecf20Sopenharmony_ci .offset = 0x00200000, 518c2ecf20Sopenharmony_ci .size = 0x00500000, 528c2ecf20Sopenharmony_ci }, { 538c2ecf20Sopenharmony_ci .name = "nvram", 548c2ecf20Sopenharmony_ci .offset = 0x00700000, 558c2ecf20Sopenharmony_ci .size = 0x00080000, 568c2ecf20Sopenharmony_ci }, 578c2ecf20Sopenharmony_ci}; 588c2ecf20Sopenharmony_ci 598c2ecf20Sopenharmony_cistatic struct flash_platform_data rd88f6183ap_ge_spi_slave_data = { 608c2ecf20Sopenharmony_ci .type = "m25p64", 618c2ecf20Sopenharmony_ci .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions), 628c2ecf20Sopenharmony_ci .parts = rd88f6183ap_ge_partitions, 638c2ecf20Sopenharmony_ci}; 648c2ecf20Sopenharmony_ci 658c2ecf20Sopenharmony_cistatic struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = { 668c2ecf20Sopenharmony_ci { 678c2ecf20Sopenharmony_ci .modalias = "m25p80", 688c2ecf20Sopenharmony_ci .platform_data = &rd88f6183ap_ge_spi_slave_data, 698c2ecf20Sopenharmony_ci .max_speed_hz = 20000000, 708c2ecf20Sopenharmony_ci .bus_num = 0, 718c2ecf20Sopenharmony_ci .chip_select = 0, 728c2ecf20Sopenharmony_ci }, 738c2ecf20Sopenharmony_ci}; 748c2ecf20Sopenharmony_ci 758c2ecf20Sopenharmony_cistatic void __init rd88f6183ap_ge_init(void) 768c2ecf20Sopenharmony_ci{ 778c2ecf20Sopenharmony_ci /* 788c2ecf20Sopenharmony_ci * Setup basic Orion functions. Need to be called early. 798c2ecf20Sopenharmony_ci */ 808c2ecf20Sopenharmony_ci orion5x_init(); 818c2ecf20Sopenharmony_ci 828c2ecf20Sopenharmony_ci /* 838c2ecf20Sopenharmony_ci * Configure peripherals. 848c2ecf20Sopenharmony_ci */ 858c2ecf20Sopenharmony_ci orion5x_ehci0_init(); 868c2ecf20Sopenharmony_ci orion5x_eth_init(&rd88f6183ap_ge_eth_data); 878c2ecf20Sopenharmony_ci orion5x_eth_switch_init(&rd88f6183ap_ge_switch_chip_data); 888c2ecf20Sopenharmony_ci spi_register_board_info(rd88f6183ap_ge_spi_slave_info, 898c2ecf20Sopenharmony_ci ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info)); 908c2ecf20Sopenharmony_ci orion5x_spi_init(); 918c2ecf20Sopenharmony_ci orion5x_uart0_init(); 928c2ecf20Sopenharmony_ci} 938c2ecf20Sopenharmony_ci 948c2ecf20Sopenharmony_cistatic struct hw_pci rd88f6183ap_ge_pci __initdata = { 958c2ecf20Sopenharmony_ci .nr_controllers = 2, 968c2ecf20Sopenharmony_ci .setup = orion5x_pci_sys_setup, 978c2ecf20Sopenharmony_ci .scan = orion5x_pci_sys_scan_bus, 988c2ecf20Sopenharmony_ci .map_irq = orion5x_pci_map_irq, 998c2ecf20Sopenharmony_ci}; 1008c2ecf20Sopenharmony_ci 1018c2ecf20Sopenharmony_cistatic int __init rd88f6183ap_ge_pci_init(void) 1028c2ecf20Sopenharmony_ci{ 1038c2ecf20Sopenharmony_ci if (machine_is_rd88f6183ap_ge()) { 1048c2ecf20Sopenharmony_ci orion5x_pci_disable(); 1058c2ecf20Sopenharmony_ci pci_common_init(&rd88f6183ap_ge_pci); 1068c2ecf20Sopenharmony_ci } 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ci return 0; 1098c2ecf20Sopenharmony_ci} 1108c2ecf20Sopenharmony_cisubsys_initcall(rd88f6183ap_ge_pci_init); 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ciMACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design") 1138c2ecf20Sopenharmony_ci /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */ 1148c2ecf20Sopenharmony_ci .atag_offset = 0x100, 1158c2ecf20Sopenharmony_ci .nr_irqs = ORION5X_NR_IRQS, 1168c2ecf20Sopenharmony_ci .init_machine = rd88f6183ap_ge_init, 1178c2ecf20Sopenharmony_ci .map_io = orion5x_map_io, 1188c2ecf20Sopenharmony_ci .init_early = orion5x_init_early, 1198c2ecf20Sopenharmony_ci .init_irq = orion5x_init_irq, 1208c2ecf20Sopenharmony_ci .init_time = orion5x_timer_init, 1218c2ecf20Sopenharmony_ci .fixup = tag_fixup_mem32, 1228c2ecf20Sopenharmony_ci .restart = orion5x_restart, 1238c2ecf20Sopenharmony_ciMACHINE_END 124