18c2ecf20Sopenharmony_ci/* 28c2ecf20Sopenharmony_ci * Orion CPU Bridge Registers 38c2ecf20Sopenharmony_ci * 48c2ecf20Sopenharmony_ci * This file is licensed under the terms of the GNU General Public 58c2ecf20Sopenharmony_ci * License version 2. This program is licensed "as is" without any 68c2ecf20Sopenharmony_ci * warranty of any kind, whether express or implied. 78c2ecf20Sopenharmony_ci */ 88c2ecf20Sopenharmony_ci 98c2ecf20Sopenharmony_ci#ifndef __ASM_ARCH_BRIDGE_REGS_H 108c2ecf20Sopenharmony_ci#define __ASM_ARCH_BRIDGE_REGS_H 118c2ecf20Sopenharmony_ci 128c2ecf20Sopenharmony_ci#include "orion5x.h" 138c2ecf20Sopenharmony_ci 148c2ecf20Sopenharmony_ci#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) 158c2ecf20Sopenharmony_ci 168c2ecf20Sopenharmony_ci#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) 178c2ecf20Sopenharmony_ci 188c2ecf20Sopenharmony_ci#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) 198c2ecf20Sopenharmony_ci#define RSTOUTn_MASK_PHYS (ORION5X_BRIDGE_PHYS_BASE + 0x108) 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) 228c2ecf20Sopenharmony_ci 238c2ecf20Sopenharmony_ci#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) 248c2ecf20Sopenharmony_ci 258c2ecf20Sopenharmony_ci#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) 268c2ecf20Sopenharmony_ci 278c2ecf20Sopenharmony_ci#define BRIDGE_INT_TIMER1_CLR (~0x0004) 288c2ecf20Sopenharmony_ci 298c2ecf20Sopenharmony_ci#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) 308c2ecf20Sopenharmony_ci 318c2ecf20Sopenharmony_ci#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) 328c2ecf20Sopenharmony_ci 338c2ecf20Sopenharmony_ci#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300) 348c2ecf20Sopenharmony_ci#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300) 358c2ecf20Sopenharmony_ci#endif 36