18c2ecf20Sopenharmony_ci/* SPDX-License-Identifier: GPL-2.0-only */ 28c2ecf20Sopenharmony_ci/* 38c2ecf20Sopenharmony_ci * OMAP3/4 Voltage Controller (VC) structure and macro definitions 48c2ecf20Sopenharmony_ci * 58c2ecf20Sopenharmony_ci * Copyright (C) 2007, 2010 Texas Instruments, Inc. 68c2ecf20Sopenharmony_ci * Rajendra Nayak <rnayak@ti.com> 78c2ecf20Sopenharmony_ci * Lesly A M <x0080970@ti.com> 88c2ecf20Sopenharmony_ci * Thara Gopinath <thara@ti.com> 98c2ecf20Sopenharmony_ci * 108c2ecf20Sopenharmony_ci * Copyright (C) 2008, 2011 Nokia Corporation 118c2ecf20Sopenharmony_ci * Kalle Jokiniemi 128c2ecf20Sopenharmony_ci * Paul Walmsley 138c2ecf20Sopenharmony_ci */ 148c2ecf20Sopenharmony_ci#ifndef __ARCH_ARM_MACH_OMAP2_VC_H 158c2ecf20Sopenharmony_ci#define __ARCH_ARM_MACH_OMAP2_VC_H 168c2ecf20Sopenharmony_ci 178c2ecf20Sopenharmony_ci#include <linux/kernel.h> 188c2ecf20Sopenharmony_ci 198c2ecf20Sopenharmony_cistruct voltagedomain; 208c2ecf20Sopenharmony_ci 218c2ecf20Sopenharmony_ci/** 228c2ecf20Sopenharmony_ci * struct omap_vc_common - per-VC register/bitfield data 238c2ecf20Sopenharmony_ci * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register 248c2ecf20Sopenharmony_ci * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register 258c2ecf20Sopenharmony_ci * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start 268c2ecf20Sopenharmony_ci * @data_shift: DATA field shift in PRM_VC_BYPASS_VAL register 278c2ecf20Sopenharmony_ci * @slaveaddr_shift: SLAVEADDR field shift in PRM_VC_BYPASS_VAL register 288c2ecf20Sopenharmony_ci * @regaddr_shift: REGADDR field shift in PRM_VC_BYPASS_VAL register 298c2ecf20Sopenharmony_ci * @cmd_on_shift: ON field shift in PRM_VC_CMD_VAL_* register 308c2ecf20Sopenharmony_ci * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register 318c2ecf20Sopenharmony_ci * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register 328c2ecf20Sopenharmony_ci * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register 338c2ecf20Sopenharmony_ci * @i2c_cfg_reg: I2C configuration register offset 348c2ecf20Sopenharmony_ci * @i2c_cfg_clear_mask: high-speed mode bit clear mask in I2C config register 358c2ecf20Sopenharmony_ci * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register 368c2ecf20Sopenharmony_ci * @i2c_mcode_mask: MCODE field mask for I2C config register 378c2ecf20Sopenharmony_ci * 388c2ecf20Sopenharmony_ci * XXX One of cmd_on_mask and cmd_on_shift are not needed 398c2ecf20Sopenharmony_ci * XXX VALID should probably be a shift, not a mask 408c2ecf20Sopenharmony_ci */ 418c2ecf20Sopenharmony_cistruct omap_vc_common { 428c2ecf20Sopenharmony_ci u32 cmd_on_mask; 438c2ecf20Sopenharmony_ci u32 valid; 448c2ecf20Sopenharmony_ci u8 bypass_val_reg; 458c2ecf20Sopenharmony_ci u8 data_shift; 468c2ecf20Sopenharmony_ci u8 slaveaddr_shift; 478c2ecf20Sopenharmony_ci u8 regaddr_shift; 488c2ecf20Sopenharmony_ci u8 cmd_on_shift; 498c2ecf20Sopenharmony_ci u8 cmd_onlp_shift; 508c2ecf20Sopenharmony_ci u8 cmd_ret_shift; 518c2ecf20Sopenharmony_ci u8 cmd_off_shift; 528c2ecf20Sopenharmony_ci u8 i2c_cfg_reg; 538c2ecf20Sopenharmony_ci u8 i2c_cfg_clear_mask; 548c2ecf20Sopenharmony_ci u8 i2c_cfg_hsen_mask; 558c2ecf20Sopenharmony_ci u8 i2c_mcode_mask; 568c2ecf20Sopenharmony_ci}; 578c2ecf20Sopenharmony_ci 588c2ecf20Sopenharmony_ci/* omap_vc_channel.flags values */ 598c2ecf20Sopenharmony_ci#define OMAP_VC_CHANNEL_DEFAULT BIT(0) 608c2ecf20Sopenharmony_ci#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) 618c2ecf20Sopenharmony_ci 628c2ecf20Sopenharmony_ci/** 638c2ecf20Sopenharmony_ci * struct omap_vc_channel - VC per-instance data 648c2ecf20Sopenharmony_ci * @i2c_slave_addr: I2C slave address of PMIC for this VC channel 658c2ecf20Sopenharmony_ci * @volt_reg_addr: voltage configuration register address 668c2ecf20Sopenharmony_ci * @cmd_reg_addr: command configuration register address 678c2ecf20Sopenharmony_ci * @setup_time: setup time (in sys_clk cycles) of regulator for this channel 688c2ecf20Sopenharmony_ci * @cfg_channel: current value of VC channel configuration register 698c2ecf20Sopenharmony_ci * @i2c_high_speed: whether or not to use I2C high-speed mode 708c2ecf20Sopenharmony_ci * 718c2ecf20Sopenharmony_ci * @common: pointer to VC common data for this platform 728c2ecf20Sopenharmony_ci * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register 738c2ecf20Sopenharmony_ci * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register 748c2ecf20Sopenharmony_ci * @smps_cmdra_mask: CMDRA* bitmask in the PRM_VC_CMD_RA register 758c2ecf20Sopenharmony_ci * @cmdval_reg: register for on/ret/off voltage level values for this channel 768c2ecf20Sopenharmony_ci * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start 778c2ecf20Sopenharmony_ci * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start 788c2ecf20Sopenharmony_ci * @smps_cmdra_reg: Offset of PRM_VC_SMPS_CMD_RA reg from PRM start 798c2ecf20Sopenharmony_ci * @cfg_channel_reg: VC channel configuration register 808c2ecf20Sopenharmony_ci * @cfg_channel_sa_shift: bit shift for slave address cfg_channel register 818c2ecf20Sopenharmony_ci * @flags: VC channel-specific flags (optional) 828c2ecf20Sopenharmony_ci */ 838c2ecf20Sopenharmony_cistruct omap_vc_channel { 848c2ecf20Sopenharmony_ci /* channel state */ 858c2ecf20Sopenharmony_ci u16 i2c_slave_addr; 868c2ecf20Sopenharmony_ci u16 volt_reg_addr; 878c2ecf20Sopenharmony_ci u16 cmd_reg_addr; 888c2ecf20Sopenharmony_ci u8 cfg_channel; 898c2ecf20Sopenharmony_ci bool i2c_high_speed; 908c2ecf20Sopenharmony_ci 918c2ecf20Sopenharmony_ci /* register access data */ 928c2ecf20Sopenharmony_ci const struct omap_vc_common *common; 938c2ecf20Sopenharmony_ci u32 smps_sa_mask; 948c2ecf20Sopenharmony_ci u32 smps_volra_mask; 958c2ecf20Sopenharmony_ci u32 smps_cmdra_mask; 968c2ecf20Sopenharmony_ci u8 cmdval_reg; 978c2ecf20Sopenharmony_ci u8 smps_sa_reg; 988c2ecf20Sopenharmony_ci u8 smps_volra_reg; 998c2ecf20Sopenharmony_ci u8 smps_cmdra_reg; 1008c2ecf20Sopenharmony_ci u8 cfg_channel_reg; 1018c2ecf20Sopenharmony_ci u8 cfg_channel_sa_shift; 1028c2ecf20Sopenharmony_ci u8 flags; 1038c2ecf20Sopenharmony_ci}; 1048c2ecf20Sopenharmony_ci 1058c2ecf20Sopenharmony_ciextern struct omap_vc_channel omap3_vc_mpu; 1068c2ecf20Sopenharmony_ciextern struct omap_vc_channel omap3_vc_core; 1078c2ecf20Sopenharmony_ci 1088c2ecf20Sopenharmony_ciextern struct omap_vc_channel omap4_vc_mpu; 1098c2ecf20Sopenharmony_ciextern struct omap_vc_channel omap4_vc_iva; 1108c2ecf20Sopenharmony_ciextern struct omap_vc_channel omap4_vc_core; 1118c2ecf20Sopenharmony_ci 1128c2ecf20Sopenharmony_ciextern struct omap_vc_param omap3_mpu_vc_data; 1138c2ecf20Sopenharmony_ciextern struct omap_vc_param omap3_core_vc_data; 1148c2ecf20Sopenharmony_ci 1158c2ecf20Sopenharmony_ciextern struct omap_vc_param omap4_mpu_vc_data; 1168c2ecf20Sopenharmony_ciextern struct omap_vc_param omap4_iva_vc_data; 1178c2ecf20Sopenharmony_ciextern struct omap_vc_param omap4_core_vc_data; 1188c2ecf20Sopenharmony_ci 1198c2ecf20Sopenharmony_civoid omap3_vc_set_pmic_signaling(int core_next_state); 1208c2ecf20Sopenharmony_civoid omap4_vc_set_pmic_signaling(int core_next_state); 1218c2ecf20Sopenharmony_ci 1228c2ecf20Sopenharmony_civoid omap_vc_init_channel(struct voltagedomain *voltdm); 1238c2ecf20Sopenharmony_ciint omap_vc_pre_scale(struct voltagedomain *voltdm, 1248c2ecf20Sopenharmony_ci unsigned long target_volt, 1258c2ecf20Sopenharmony_ci u8 *target_vsel, u8 *current_vsel); 1268c2ecf20Sopenharmony_civoid omap_vc_post_scale(struct voltagedomain *voltdm, 1278c2ecf20Sopenharmony_ci unsigned long target_volt, 1288c2ecf20Sopenharmony_ci u8 target_vsel, u8 current_vsel); 1298c2ecf20Sopenharmony_ciint omap_vc_bypass_scale(struct voltagedomain *voltdm, 1308c2ecf20Sopenharmony_ci unsigned long target_volt); 1318c2ecf20Sopenharmony_ci 1328c2ecf20Sopenharmony_ci#endif 1338c2ecf20Sopenharmony_ci 134